Aeroflex ACT-S512K8N-045F4Q Act-s512k8 high speed 4 megabit monolithic sram Datasheet

ACT–S512K8 High Speed
4 Megabit Monolithic SRAM
Features
Low Power Monolithic CMOS 512K x 8 SRAM
■ Full Military (-55°C to +125°C) Temperature Range
■ Input and Output TTL Compatible Design
■ Fast 17,20,25,35,45 & 55ns Maximum Access Times
■ +5 V Power Supply
■ MIL-PRF-38534 Compliant MCMs Available
■ Industry Standard Pinouts
■ Packaging – Hermetic Ceramic
■
36 Lead, .92" x .51" x .13" Flat Package (FP), Aeroflex code# "F3"
36 Lead, .92" x .43" x .184" Small Outline J lead (CSOJ),
Aeroflex code# "F4"
(.155 MAX thickness available, contact factory for details)
● 32 Lead, 1.6" x .60" x .20" Dual-in-line (DIP), Aeroflex code# "P4"
●
●
■
DESC SMD# 5962–95613 Released(F3,F4,P4)
Block Diagram – Flat Package(F3,F16), DIP(P4) & CSOJ(F4)
CE
WE
OE
A0 – A18
Vss
Vcc
512Kx8
8
I/O0-7
Pin Description
I/O0-7
Data I/O
A0–18
Address Inputs
WE
Write Enable
CE
Chip Enable
OE
Output Enable
VCC
Power Supply
VSS
Ground
NC
Not Connected
CIRCUIT TECHNOLOGY
www.aeroflex.com
General Description
The ACT–S512K8 is a high
speed, 4 Megabit CMOS
Monolithic SRAM designed for
full temperature range military,
space, or high reliability mass
memory and fast cache
applications.
The MCM is input and output
TTL compatible. Writing is
executed when the write
enable (WE) and chip enable
(CE) inputs are low and output
enable (OE) is high. Reading is
accomplished when WE is high
and CE and OE are both low.
Access time grades of 17ns,
20ns, 25ns, 35ns, 45ns and
55ns maximum are standard.
The +5 Volt power supply
version is standard and +3.3
Volt lower power model is a
future optional product.
The products are designed
for
operation
over
the
temperature range of -55°C to
+125°C and under the full
military environment. A DESC
Standard Military Drawing
(SMD) number is released.
The
ACT-S512K8
is
manufactured in Aeroflex’s
80,000
square
foot
MIL-PRF-38534
certified
facility in Plainview, N.Y.
eroflex Circuit Technology - Advanced Multichip Modules © SCD1664 REV C 5/10/00
Absolute Maximum Ratings
Symbol
TC
TSTG
Parameter
MINIMUM
MAXIMUM
Units
Case Operating Temp.
-55
+125
°C
Storage Temperature
-65
+150
°C
-
1.1
W
PD
Maximum Package Power Dissipation
VG
Maximum Signal Voltage to Ground
-0.5
VCC + 0.5
V
VCC
Power Supply Voltage
-0.5
+7.0
V
TJ
Junction Temperature
-
+150
°C
Recommended Operating Conditions
Symbol
Parameter
Minimum
Maximum
Units
VCC
Power Supply Voltage
+4.5
+5.5
V
VIH
Input High Voltage
+2.2
VCC + 0.3
V
VIL
Input Low Voltage
-0.5
+0.8
V
TA
Operating Temp. (Mil)
-55
+125
°C
Truth Table
Mode
CE
OE
WE
Data I/O
Power
Standby
H
X
X
High Z
Standby (deselect/power down)
Read
L
L
H
Data OUT
Active
Output Disable
L
H
H
High Z
Active (deselected)
Write
L
X
L
Data IN
Active
Capacitance
(VIN = 0V, f = 1MHz, Tc = 25°C, unless otherwise noted, Guaranteed but not tested)
Symbol
Parameter
CIN
COUT
Maximum
Units
Input Capacitance (A0-18, WE & OE)
20
pF
Output Capacitance (I/O0-7 & CE)
20
pF
DC Characteristics
(VCC = 5.0V, VSS = 0V, Tc = -55°C to +125°C, unless otherwise specified)
Parameter
Sym
ALL SPEEDS
Units
Min Max
Conditions
Input Leakage Current
ILI
VCC = Max, VIN = 0 to VCC
-10
+10
µA
Output Leakage Current
ILO
CE = VIH, OE = VIH, VOUT = 0 to VCC
-10
+10
µA
Operating Supply Current
ICC
CE = VIL, OE = VIH, Vcc=5.5V,
f =5MHz CMOS Compatible
-
170
mA
Standby Current
ISB
CE = Vcc, OE= VIH, Vcc=5.5V,
f =5MHz CMOS Compatible
-
20
mA
Output Low Voltage
VOL IOL = 8 mA, Vcc = 4.5V
-
0.4
V
Output High Voltage
VOH IOH = -4 mA, Vcc = 4.5V
2.4
-
V
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AC Characteristics
(VCC = 5.0V, VSS= 0V, Tc= -55°C to +125°C)
Read Cycle
Parameter
Sym
–017
–020
–025
–035
–045
–055
Min Max Min Max Min Max Min Max Min Max Min Max
Units
Read Cycle Time
tRC
17
-
20
-
25
-
35
-
45
-
55
-
ns
Address Access Time
tAA
-
17
-
20
-
25
-
35
-
45
-
55
ns
Chip Select Access Time
tACS
-
17
-
20
-
25
-
35
-
45
-
55
ns
Output Hold from Address Change
tOH
0
-
0
-
0
-
0
-
0
-
0
-
ns
Output Enable to Output Valid
tOE
-
9
-
10
-
12
-
25
25
ns
Chip Select to Output in Low Z (1)
tCLZ
2
-
2
-
2
-
4
-
4
-
4
-
ns
Output Enable to Output in Low Z (1)
tOLZ
0
-
0
-
0
-
0
-
0
-
0
-
ns
Chip Deselect to Output in High Z (1)
tCHZ
-
9
-
10
-
12
-
15
-
20
-
20
ns
Output Disable to Output in High Z (1)
tOHZ
-
9
-
10
-
12
-
15
-
20
-
20
ns
25
Note 1. Guaranteed by design, but not tested
Write Cycle
–017
–020
–025
–035
–045
–055
Min Max Min Max Min Max Min Max Min Max Min Max
Parameter
Sym
Write Cycle Time
tWC
17
-
20
-
25
-
35
-
45
-
55
-
ns
Chip Select to End of Write
tCW
15
-
15
-
20
-
25
-
35
-
50
-
ns
Address Valid to End of Write
tAW
15
-
15
-
20
-
25
-
35
-
50
-
ns
Data Valid to End of Write
tDW
12
-
12
-
15
-
20
-
25
-
25
-
ns
Write Pulse Width
tWP
14
-
14
-
15
-
25
-
35
-
40
-
ns
Address Setup Time
tAS
2
-
2
-
2
-
2
-
2
-
2
-
ns
Address Hold Time
tAH
0
-
0
-
0
-
0
-
5
-
5
-
ns
Output Active from End of Write (1)
tOW
0
-
0
-
0
5
-
5
-
ns
Write to Output in High Z (1)
tWHZ
-
9
-
9
-
10
-
15
-
20
-
25
ns
tDH
0
-
0
-
0
-
0
-
0
-
0
-
ns
Data Hold from Write Time
0
Units
Note 1. Guaranteed by design, but not tested
Data Retention Electrical Characteristics (Special Order Only)
(Tc = -55°C to +125°C)
ALL SPEEDS
Typ
Max
Units
Parameter
Sym
Test Conditions
VCC for Data Retention
VDR
CE ≥ VCC – 0.2V
2
-
5.5
V
VCC = 3V
-
0.5
7.0
mA
Data Retention Current (1) ICCDR1
Min
Available in Low Power version. Call For Information.
Truth Table
Mode
Standby
Read
Output Disable
Write
Aeroflex Circuit Technology
CE
H
L
L
L
OE
X
L
H
X
WE
X
H
H
L
Data I/O
High Z
Data Out
High Z
Data In
3
Power
Standby (deselect/power down)
Active
Active (deselected)
Active
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Timing Diagrams
Read Cycle Timing Diagrams
Write Cycle Timing Diagrams
Read Cycle 1 (CE = OE = VIL, WE = VIH)
Write Cycle 1 (WE Controlled, OE = VIL)
tWC
tRC
A0-18
A0-16
tAA
tAW
tCW
tOH
DI/O
Previous Data Valid
Data Valid
tAH
CE
tAS
tWP
WE
tOW
SEE NOTE
tWHZ
tDW
SEE NOTE
D I/O
tDH
Data Valid
Read Cycle 2 (WE = VIH)
tRC
Write Cycle 2 (CE Controlled, OE = VIH )
A0-18
tWC
tAA
A0-18
tAH
tAW
CE
tACS
tAS
tCHZ
tCLZ
SEE NOTE
CE
tOHZ
WE
tCW
SEE NOTE
OE
tWP
tOE
SEE NOTE
tOLZ
SEE NOTE
D I/O
UNDEFINED
tDW
Data Valid
High Z
DI/O
tDH
Data Valid
Note: Guaranteed by design, but not tested.
DON’T CARE
AC Test Circuit
Current Source
IOL
VZ ~ 1.5 V (Bipolar Supply)
To Device Under Test
CL =
50 pF
Parameter
Typical
Units
Input Pulse Level
0 – 3.0
V
Input Rise and Fall
5
ns
Input and Output Timing Reference Level
1.5
V
IOH
Current Source
Notes:
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance
ZO = 75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
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Pin Numbers & Functions
36 Pins — Flat Package
Pin #
Function
Pin #
Function
1
A0
19
NC
2
A1
20
A10
3
A2
21
A11
4
A3
22
A12
5
A4
23
A13
6
CE
24
A14
7
I/O0
25
I/O4
8
I/O1
26
I/O5
9
VCC
27
VCC
10
VSS
28
VSS
11
I/O2
29
I/O6
12
I/O3
30
I/O7
13
WE
31
OE
14
A5
32
A15
15
A6
33
A16
16
A7
34
A17
17
A8
35
A18
18
A9
36
NC
Package Outline "F3" — Small Flat Package, 36 Leads
.930
MAX
Pin 19
Pin 36
.035±.003
.125 MAX
.515
MAX
Pin 18
Pin 1
.350
MIN
.005 ±.002
.017
±.002
.850 REF
(17 spaces at .050)
2 sides
All dimensions in inches
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Pin Numbers & Functions
36 Pins — CSOJ
1
A0
19
NC
2
A1
20
A10
3
A2
21
A11
4
A3
22
A12
5
A4
23
A13
6
CE
24
A14
7
I/O0
25
I/O4
8
I/O1
26
I/O5
9
VCC
27
VCC
10
VSS
28
VSS
11
I/O2
29
I/O6
12
I/O3
30
I/O7
13
WE
31
OE
14
A5
32
A15
15
A6
33
A16
16
A7
34
A17
17
A8
35
A18
18
A9
36
NC
Package Outline "F4" — .435" x .920" CSOJ, 36 Pins
*.184
.930
MAX
MAX
0.008
±.002
.435
MAX
.376
±.01
.050 ±.01
All dimensions in inches
Pin 1
.050
TYP
.017 ±..002
.850
TYP
*.155 MAX thickness available, contact factory for details
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Pin Numbers & Functions
32 Pins — DIP
1
A18
17
I/O3
2
A16
18
I/O4
3
A14
19
I/O5
4
A12
20
I/O6
5
A7
21
I/O7
6
A6
22
CE
7
A5
23
A10
8
A4
24
OE
9
A3
25
A11
10
A2
26
A9
11
A1
27
A8
12
A0
28
A13
13
I/O0
29
WE
14
I/O1
30
A17
15
I/O2
31
A15
16
VSS
32
VCC
Package Outline "P4" — .590" x 1.67" DIP Package, 32 Leads
1.623
MAX
Pin 32
.165
MAX
Pin 1
.604
MAX
Pin 1
Identifier
.100
TYP
.020
.016
TYP
.055
.045
.060
.040
TYP
.125
MIN
.012
.009
.610
.590
All dimensions in inches
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CIRCUIT TECHNOLOGY
Ordering Information
Model Number
DESC Part Number
Speed
Package
ACT–S512K8N–017F3Q
5962–9561310HUC
17ns
36 Lead Flat
ACT–S512K8N–020F3Q
5962–9561309HUC
20ns
36 Lead Flat
ACT–S512K8N–025F3Q
5962–9561308HUC
25ns
36 Lead Flat
ACT–S512K8N–035F3Q
5962–9561307HUC
35ns
36 Lead Flat
ACT–S512K8N–045F3Q
5962–9561306HUC
45ns
36 Lead Flat
ACT–S512K8N–055F3Q
5962–9561305HUC
55ns
36 Lead Flat
ACT–S512K8N–017P4Q
5962–9561310HYC
17ns
32 Pin DIP
ACT–S512K8N–020P4Q
5962–9561309HYC
20ns
32 Pin DIP
ACT–S512K8N–025P4Q
5962–9561308HYC
25ns
32 Pin DIP
ACT–S512K8N–035P4Q
5962–9561307HYC
35ns
32 Pin DIP
ACT–S512K8N–045P4Q
5962–9561306HYC
45ns
32 Pin DIP
ACT–S512K8N–055P4Q
5962–9561305HYC
55ns
32 Pin DIP
ACT–S512K8N–017F4Q
5962–9561310HZC
17ns
36 Lead CSOJ
ACT–S512K8N–020F4Q
5962–9561309HZC
20ns
36 Lead CSOJ
ACT–S512K8N–025F4Q
5962–9561308HZC
25ns
36 Lead CSOJ
ACT–S512K8N–035F4Q
5962–9561307HZC
35ns
36 Lead CSOJ
ACT–S512K8N–045F4Q
5962–9561306HZC
45ns
36 Lead CSOJ
ACT–S512K8N–055F4Q
5962–9561305HZC
55ns
36 Lead CSOJ
* Pending
Model Number Breakdown
ACT– S 512K 8 N– 020 F4 Q
Aeroflex Circuit
Technology
Screening
C = Commercial Temp, 0°C to +70°C
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
M = Military Temp, -55°C to +125°C, Screening *
Q = MIL-PRF-38534 Compliant/SMD if applicable
Memory Type
S = SRAM
Memory Depth
Package Type & Size
Memory Width, Bits
Surface Mount Packages
F3 = 36 Pin FP
F4 = 36 Pin CSOJ
Pinout Options
N = None
Thru-Hole Packages
P4 = 32 Pin DIP
Memory Speed, ns
* Screened to the individual test methods of MIL-STD-883
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800) 843-1553
Specification subject to change without notice
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
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