AD AD7817ARUZ-REEL Dual, low power cmos, analog front end with dsp microcomputer Datasheet

FEATURES
FUNCTIONAL BLOCK DIAGRAMS
AD7817
OVERTEMP
REG
TEMP
SENSOR
REF
2.5V
VIN1
VIN2
B
A>B
OTI
A
CHARGE
REDISTRIBUTION
DAC
DATA
OUT
CONTROL
LOGIC
REG
CONTROL
MUX
VIN3
SAMPLING
CAPACITOR
VIN4
AGND
DGND
DOUT
DIN
SCLK
RD/WR
VBALANCE
CLOCK
BUSY
CS
CONVST
Figure 1. AD7817 Functional Block Diagram
VDD
AD7818
OVERTEMP
REG
TEMP
SENSOR
REF
2.5V
APPLICATIONS
Data acquisition systems with ambient temperature
monitoring
Industrial process control
Automotive
Battery charging applications
VDD
REFIN
01316-001
10-bit ADC with 9 µs conversion time
1 AD7818 and 4 AD7817 single-ended analog input channels
On-chip temperature sensor
Resolution of 0.25°C
±2°C error from −40°C to +85°C
−55°C to +125°C operating range
Wide operating supply range: 2.7 V to 5.5 V
Inherent track-and-hold functionality
On-chip reference (2.5 V ± 1%)
Overtemperature indicator
Automatic power-down at the end of a conversion
Low power operation
4 µW at a throughput rate of 10 SPS
40 µW at a throughput rate of 1 kSPS
400 µW at a throughput rate of 10 kSPS
Flexible serial interface
VIN1
B
A>B
OTI
A
CHARGE
REDISTRIBUTION
DAC
DATA
OUT
DIN/OUT
MUX
SAMPLING
CAPACITOR
VBALANCE
AGND
CONTROL
LOGIC
CONTROL
REG
CLOCK
GENERATOR
SCLK
RD/WR
CONVST
01316-002
Data Sheet
Dual, Low Power CMOS, Analog Front End
with DSP Microcomputer
AD7817/AD7818
Figure 2. AD7818 Functional Block Diagram
GENERAL DESCRIPTION
The AD7817/AD7818 are 10-bit, single- and 4-channel analog-todigital converters (ADCs) with an on-chip temperature sensor that
can operate from a single 2.7 V to 5.5 V power supply. Each part
contains a 9 µs successive approximation converter based around
a capacitor digital-to-analog converter (DAC), an on-chip
temperature sensor with an accuracy of ±2°C, an on-chip clock
oscillator, inherent track-and-hold functionality, and an on-chip
reference (2.5 V).
The on-chip temperature sensor of the AD7817/AD7818 can
be accessed via Channel 0. When Channel 0 is selected and a
conversion is initiated, the resulting ADC code at the end of the
conversion gives a measurement of the ambient temperature with a
resolution of ±0.25°C. See the Temperature Measurement section.
The AD7817/AD7818 have a flexible serial interface that allows
easy interfacing to most microcontrollers. The interface is
compatible with the Intel 8051, Motorola SPI and QSPI, and
National Semiconductors MICROWIRE protocols. For more
Rev. D
information, refer to the AD7817 Serial Interface section and
the AD7818 Serial Interface Mode section.
The AD7817 is available in a narrow body, 0.15 inch, 16-lead
SOIC and a 16-lead TSSOP, and the AD7818 comes in an 8-lead
SOIC and an 8-lead MSOP.
PRODUCT HIGHLIGHTS
1. The devices have an on-chip temperature sensor that allows
an accurate measurement of the ambient temperature to be
made. The measurable temperature range is −55°C to +125°C.
2. An overtemperature indicator is implemented by carrying out a
digital comparison of the ADC code for Channel 0 (temperature
sensor) with the contents of the on-chip overtemperature
register. The overtemperature indicator pin goes logic low
when a predetermined temperature is exceeded.
3. The automatic power-down feature enables the AD7817 and
AD7818 to achieve superior power performance at slower
throughput rates, that is, 40 µW at 1 kSPS throughput rate.
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AD7817/AD7818
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Converter Details ....................................................................... 12
Applications ....................................................................................... 1
Typical Connection Diagram ................................................... 12
Functional Block Diagrams ............................................................. 1
Analog Inputs.............................................................................. 12
General Description ......................................................................... 1
On-Chip Reference .................................................................... 13
Product Highlights ........................................................................... 1
ADC Transfer Function ............................................................. 13
Revision History ............................................................................... 2
Temperature Measurement ....................................................... 14
Specifications..................................................................................... 3
Temperature Measurement Error Due to Reference Error... 14
Timing Characteristics ................................................................ 6
Self-Heating Considerations ..................................................... 14
Absolute Maximum Ratings ............................................................ 7
Operating Modes ........................................................................ 15
ESD Caution .................................................................................. 7
Power vs. Throughput................................................................ 17
Pin Configurations and Function Descriptions ........................... 8
AD7817 Serial Interface ............................................................. 17
Terminology .................................................................................... 10
AD7818 Serial Interface Mode ................................................. 18
Control Byte .................................................................................... 11
Outline Dimensions ....................................................................... 19
Circuit Information .................................................................... 12
Ordering Guide .......................................................................... 20
REVISION HISTORY
10/12—Rev. C to Rev. D
Deleted AD7816.................................................................. Universal
Changes to Format ............................................................. Universal
Deleted Figure 15; Renumbered Sequentially............................. 14
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
9/04—Rev. B to Rev. C
Changes to Ordering Guide .............................................................6
Changes to Operating Modes Section and Figure 16 ................ 13
Changes to Figure 17...................................................................... 14
Changes to AD7817 Serial Interface, Read Operation Section
and Figure 20................................................................................... 15
Changes to Figure 21...................................................................... 16
Rev. D | Page 2 of 20
Data Sheet
AD7817/AD7818
SPECIFICATIONS
VDD = 2.7 V to 5.5 V, GND = 0 V, REFIN = 2.5 V, unless otherwise noted. The AD7817 temperature sensor is specified with an external
2.5 V reference, and the AD7818 temperature sensor is specified with an on-chip reference. For VDD = 2.7 V, TA = 85°C maximum and
temperature sensor measurement error = ±3°C.
Table 1.
Parameter
DYNAMIC PERFORMANCE (AD7817 ONLY)
A Version 1
B Version1
S Version1
Unit
Signal-to-(Noise + Distortion) Ratio 2
Total Harmonic Distortion2
Peak Harmonic or Spurious Noise2
Intermodulation Distortion2
Second-Order Terms
Third-Order Terms
Channel-to-Channel Isolation2
DC ACCURACY (AD7817 ONLY)
Resolution
Minimum Resolution for Which No
Missing Codes are Guaranteed
Relative Accuracy2
Differential Nonlinearity2
Gain Error2
58
–65
–65
58
−65
−65
58
−65
−65
dB min
dB max
dB max
–67
–67
–80
−67
−67
−80
−67
−67
−80
dB typ
dB typ
dB typ
10
10
10
10
10
10
Bits
±1
±1
±2
±10
±1/2
±2
±1/2
±1
±1
±2
±10
±1/2
±2
±1/2
±1
±1
±2
+20/−10
±1/2
±2
±1/2
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
±2
±3
±1
±2
±2
±3
°C max
°C max
±2.25
±3
1/4
±2.25
±3
1/4
±2.25
±6
1/4
°C max
°C max
°C/LSB
2.625
2.375
40
10
2.625
2.375
40
10
2.625
2.375
40
10
V max
V min
kΩ min
pF max
80
80
150
ppm/°C typ
400
400
400
ns max
27
9
27
9
27
9
µs max
μs max
Gain Error Match2
Offset Error2
Offset Error Match
TEMPERATURE SENSOR (AD7817 ONLY)
Measurement Error
Ambient Temperature 25°C
TMIN to TMAX
Measurement Error
Ambient Temperature 25°C
TMIN to TMAX
Temperature Resolution
REFERENCE INPUT (AD7817 ONLY) 3, 4
REFIN Input Voltage Range3
Input Impedance
Input Capacitance
ON-CHIP REFERENCE (AD7817 ONLY) 5
Temperature Coefficient3
CONVERSION RATE (AD7817 ONLY)
Track-and-Hold Acquisition Time4
Conversion Time
Temperature Sensor
Channel 1 to Channel 4
Test Conditions/Comments
Sample rate = 100 kSPS, any channel,
fIN = 20 kHz
−75 dB typical
−75 dB typical
fa =19.9 kHz, fb = 20.1 kHz
fIN = 20 kHz
Any channel
External reference
Internal reference
External reference VREF = 2.5 V
On-chip reference
2.5 V + 5%
2.5 V − 5%
Nominal 2.5 V
Rev. D | Page 3 of 20
Source Impedance < 10 Ω
AD7817/AD7818
Parameter
POWER REQUIREMENTS (AD7817 ONLY)
VDD
IDD
Normal Operation
Using External Reference
Power-Down (VDD = 5 V)
Power-Down (VDD = 3 V)
Auto Power-Down Mode
10 SPS Throughput Rate
1 kSPS Throughput Rate
10 kSPS Throughput Rate
Power-Down
DYNAMIC PERFORMANCE (AD7818 ONLY) 6
Signal-to-(Noise + Distortion) Ratio2
Total Harmonic Distortion2
Peak Harmonic or Spurious Noise2
Intermodulation Distortion2
Second-Order Terms
Third-Order Terms
Channel-to-Channel Isolation2
DC ACCURACY (AD7818 ONLY)6
Resolution
Minimum Resolution for Which No
Missing Codes are Guaranteed
Relative Accuracy2
Differential Nonlinearity2
Gain Error2
Offset Error2
TEMPERATURE SENSOR (AD7818 ONLY)6
Measurement Error
Ambient Temperature 25°C
TMIN to TMAX
Measurement Error
Ambient Temperature 25°C
TMIN to TMAX
Temperature Resolution
ON-CHIP REFERENCE (AD7818 ONLY)5
Temperature Coefficient3
CONVERSION RATE (AD7818 ONLY)6
Track-and-Hold Acquisition Time4
Conversion Time
Temperature Sensor
Channel 1
Data Sheet
A Version 1
B Version1
S Version1
Unit
Test Conditions/Comments
5.5
2.7
5.5
2.7
5.5
2.7
V max
V min
For specified performance
2
1.75
10
4
2
1.75
10
4
2
1.75
12.5
4.5
mA max
mA max
µA max
µA max
6.4
48.8
434
12
6.4
48.8
434
12
6.4
48.8
434
13.5
µW typ
µW typ
µW typ
µW max
57
–65
–67
dB min
dB max
dB typ
–67
–67
–80
dB typ
dB typ
dB typ
10
10
Bits
Bits
±1
±1
±10
±4
LSB max
LSB max
LSB max
LSB max
±2
±3
°C max
°C max
±2
±3
1/4
°C max
°C max
°C/LSB
30
ppm/°C typ
400
ns max
27
9
µs max
µs max
Logic inputs = 0 V or VDD
1.6 mA typical
2.5 V external reference connected
5.5 µA typical
2 µA typical
VDD = 3 V
See the Power vs. Throughput
section for description of power
dissipation in auto power-down mode
Typically 6 µW
Sample rate = 100 kSPS, any channel,
fIN = 20 kHz
−75 dB typical
−75 dB typical
fa = 19.9 kHz, fb = 20.1 kHz
fIN = 20 kHz
Any channel
External reference VREF = 2.5 V
On-chip reference
Nominal 2.5 V
Rev. D | Page 4 of 20
Source impedance < 10 Ω
Data Sheet
Parameter
POWER REQUIREMENTS (AD7818 ONLY)6
VDD
IDD
Normal Operation
Using External Reference
Power-Down (VDD = 5 V)
Power-Down (VDD = 3 V)
Auto Power-Down Mode
10 SPS Throughput Rate
1 kSPS Throughput Rate
10 kSPS Throughput Rate
Power-Down
ANALOG INPUTS (AD7817/AD7818) 7
Input Voltage Range
Input Leakage
Input Capacitance
LOGIC INPUTS (AD7817/AD7818)4
Input High Voltage, VINH
Input Low Voltage, VINL
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
LOGIC OUTPUTS (AD7817/AD7818)4
Output High Voltage, VOH
AD7817/AD7818
A Version 1
B Version1
S Version1
Unit
Test Conditions/Comments
5.5
2.7
V max
V min
For specified performance
2
1.75
10.75
4.5
mA max
mA max
µA max
µA max
6.4
48.8
434
13.5
µW typ
µW typ
µW typ
µW max
VREF
0
±1
10
VREF
0
±1
10
VREF
0
±1
10
V max
V min
µA min
pF max
2.4
0.8
2
0.4
±3
10
2.4
0.8
2
0.4
±3
10
2.4
0.8
2
0.4
±3
10
V min
V max
V min
V max
µA max
pF max
4
2.4
4
2.4
4
2.4
V min
V min
0.4
0.2
±1
15
0.4
0.2
±1
15
0.4
0.2
±1
15
V max
V max
µA max
pF max
Output Low Voltage, VOL
High Impedance Leakage Current
High Impedance Capacitance
1
Logic inputs = 0 V or VDD
1.3 mA typical
2.5 V external reference connected
6 µA typ
2 µA typ
VDD = 3 V
See the Power vs Throughput section
for description of power dissipation
in auto power-down mode
Typically 6 µW
VDD = 5 V ±10%
VDD = 5 V ±10%
VDD = 3 V ±10%
VDD = 3 V ±10%
Typically 10 nA, VIN = 0 V to VDD
ISOURCE = 200 µA
VDD = 5 V ± 10%
VDD = 3 V ± 10%
ISINK = 200 µA
VDD = 5 V ± 10%
VDD = 3 V ± 10%
The B Version and the S Version only apply to the AD7817. The A Version applies to the AD7817 or the AD7818 (as stated in specification).
See Terminology.
3
The accuracy of the temperature sensor is affected by reference tolerance. The relationship between the two is explained in the Temperature Measurement Error Due
to Reference Error section.
4
Sample tested during initial release and after any redesign or process change that may affect this parameter.
5
On-chip reference shuts down when external reference is applied.
6
These specifications are typical for AD7818 at temperatures above 85°C and with VDD greater than 3.6 V.
7
This refers to the input current when the part is not converting. Primarily due to the reverse leakage current in the ESD protection diodes.
2
Rev. D | Page 5 of 20
AD7817/AD7818
Data Sheet
TIMING CHARACTERISTICS
VDD = 2.7 V to 5.5 V, GND = 0 V, REFIN = 2.5 V. All specifications TMIN to TMAX, unless otherwise noted. Sample tested during initial
release and after any redesign or process changes that may affect the parameters. All input signals are measured with tr = tf = 1 ns (10% to
90% of 5 V) and timed from a voltage level of 1.6 V. See Figure 17, Figure 18, Figure 21, and Figure 22.
Table 2.
Parameter
tPOWER-UP
t1a
t1b
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12 1
t131
t14a1, 2
t14b1, 2
t15
t16
t17
2
Unit
µs max
µs max
µs max
ns min
ns max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns max
ns max
ns max
ns max
ns min
ns min
Test Conditions/Comments
Power-up time from rising edge of CONVST
Conversion time Channel 1 to Channel 4
Conversion time temperature sensor
CONVST pulse width
CONVST falling edge to BUSY rising edge
CS falling edge to RD/WR falling edge setup time
RD/WR falling edge to SCLK falling edge setup
DIN setup time before SCLK rising edge
DIN hold time after SCLK rising edge
SCLK low pulse width
SCLK high pulse width
CS falling edge to RD/WR rising edge setup time
RD/WR rising edge to SCLK falling edge setup time
DOUT access time after RD/WR rising edge
DOUT access time after SCLK falling edge
DOUT bus relinquish time after falling edge of RD/WR
DOUT bus relinquish time after rising edge of CS
BUSY falling edge to OTI falling edge
RD/WR rising edge to OTI rising edge
SCLK rising edge to CONVST falling edge (acquisition time of T/H)
These figures are measured with the load circuit of Figure 3. They are defined as the time required for DOUT to cross 0.8 V or 2.4 V for VDD = 5 V ± 10% and 0.4 V or 2 V for
VDD = 3 V ± 10%, as shown in Table 1.
These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 3. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of the external bus loading capacitances.
200µA
TO OUTPUT
PIN
IOL
1.6V
CL
50pF
200µA
IOL
01316-003
1
A Version/B Version
2
9
27
20
50
0
0
10
10
40
40
0
0
20
20
30
30
150
40
400
Figure 3. Load Circuit for Access Time and Bus Relinquish Time
Rev. D | Page 6 of 20
Data Sheet
AD7817/AD7818
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Parameter
VDD to AGND
VDD to DGND
Analog Input Voltage to AGND
VIN1 to VIN4
Reference Input Voltage to AGND1
Digital Input Voltage to DGND
Digital Output Voltage to DGND
Storage Temperature Range
Junction Temperature
16-Lead TSSOP, Power Dissipation
θJA Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
16-Lead SOIC Package, Power Dissipation
θJA Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
8-Lead SOIC Package, Power Dissipation
θJA Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
8-Lead MSOP Package, Power Dissipation
θJA Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
1
Rating
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3V
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
−65°C to +150°C
150°C
450 mW
120°C/W
260°C
215°C
220°C
450 mW
100°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
215°C
220°C
450 mW
157°C/W
215°C
220°C
450 mW
206°C/W
215°C
220°C
If the reference input voltage is likely to exceed VDD by more than 0.3 V (that
is, during power-up) and the reference is capable of supplying 30 mA or more, it
is recommended to use a clamping diode between the REFIN pin and VDD pin.
Connect the diode as shown in this figure.
Rev. D | Page 7 of 20
AD7817/AD7818
Data Sheet
CONVST 1
16
RD/WR
2
15
SCLK
14
DIN
BUSY
OTI 3
AD7817
CS 4
TOP VIEW
(Not to Scale)
13
DOUT
AGND 5
12
DGND
REFIN 6
11
VDD
VIN1 7
10
VIN4
VIN2 8
9
VIN3
01316-004
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 4. AD7817 Pin Configuration
Table 4. AD7817 Pin Function Descriptions
Pin
No.
1
Mnemonic
CONVST
2
BUSY
3
OTI
4
CS
5
6
AGND
REFIN
7
to
10
11
12
13
VIN1 to VIN4
14
15
DIN
SCLK
16
RD/WR
VDD
DGND
DOUT
Description
Logic Input Signal. The convert start signal. A 10-bit analog-to-digital conversion is initiated on the falling edge of this
signal. The falling edge of this signal places track-and-hold in hold mode. Track-and-hold goes into track mode again at
the end of the conversion. The state of the CONVST signal is checked at the end of a conversion. If it is logic low, the
AD7817 powers down. See the Operating Modes section.
Logic Output. The busy signal is logic high during a temperature or voltage A/D conversion. The signal can be used to
interrupt a microcontroller when a conversion has finished.
Logic Output. The overtemperature indicator (OTI) is set logic low if the result of a conversion on Channel 0
(temperature sensor) is greater that an 8-bit word in the overtemperature register (OTR). The signal is reset at the end
of a serial read operation, that is, a rising RD/WR edge when CS is low.
Logic Input Signal. The chip select signal is used to enable the serial port of the AD7817. This is necessary if the AD7817
is sharing the serial bus with more than one device.
Analog Ground. Ground reference for track-and-hold comparator and capacitor DAC.
Analog Input. An external 2.5 V reference can be connected to the AD7817 at this pin. To enable the on-chip reference,
tie the REFIN pin to AGND. If an external reference is connected to the AD7817, the internal reference shuts down.
Analog Input Channels. The AD7817 has four analog input channels. The input channels are single-ended with respect
to AGND (analog ground). The input channels can convert voltage signals in the range 0 V to VREF. A channel is selected
by writing to the address register of the AD7817. See the Control Byte section.
Positive Supply Voltage, 2.7 V to 5.5 V.
Digital Ground. Ground reference for digital circuitry.
Logic Output with a High Impedance State. Data is clocked out of the AD7817 serial port at this pin. This output goes
into a high impedance state on the falling edge of RD/WR or on the rising edge of the CS signal, whichever occurs first.
Logic Input. Data is clocked into the AD7817 at this pin.
Clock Input for the Serial Port. The serial clock is used to clock data into and out of the AD7817. Data is clocked out on
the falling edge and clocked in on the rising edge.
Logic Input Signal. The read/write signal is used to indicate to the AD7817 whether the data transfer operation is a read
or a write. Set the RD/WR logic high for a read operation and logic low for a write operation.
Rev. D | Page 8 of 20
Data Sheet
AD7817/AD7818
OTI 2
8
AD7818
RD/WR
SCLK
TOP VIEW
GND 3 (Not to Scale) 6 DIN/OUT
VIN 4
7
5
VDD
01316-005
CONVST 1
Figure 5. AD7818 Pin Configuration
Table 5. AD7818 Pin Function Descriptions
Pin
No.
1
Mnemonic
CONVST
2
OTI
3
4
GND
VIN
5
6
7
VDD
DIN/OUT
SCLK
8
RD/WR
Description
Logic Input Signal. The convert start signal initiates a 10-bit analog-to-digital conversion on the falling edge of this
signal. The falling edge of this signal places track-and-hold in hold mode. Track-and-hold goes into track mode again at
the end of the conversion. The state of the CONVST signal is checked at the end of a conversion. If it is logic low, the
AD7818 powers down. See the Operating Modes section.
Logic Output. The overtemperature indicator (OTI) is set logic low if the result of a conversion on Channel 0
(temperature sensor) is greater that an 8-bit word in the overtemperature register (OTR). The signal is reset at the end
of a serial read operation, that is, a rising RD/WR edge.
Analog and Digital Ground.
Analog Input Channel. The input channel is single-ended with respect to GND. The input channel can convert voltage
signals in the range 0 V to 2.5 V. The input channel is selected by writing to the address register of the AD7818. See the
Control Byte section.
Positive Supply Voltage, 2.7 V to 5.5 V.
Logic Input and Output. Serial data is clocked in and out of the AD7818 at this pin.
Clock Input for the Serial Port. The serial clock is used to clock data into and out of the AD7818. Data is clocked out on
the falling edge and clocked in on the rising edge.
Logic Input. The read/write signal is used to indicate to the AD7818 whether the next data transfer operation is a read
or a write. Set the RD/WR logic high for a read operation and logic low for a write.
Rev. D | Page 9 of 20
AD7817/AD7818
Data Sheet
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal-to-(noise + distortion) at
the output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal-to-(noise + distortion)
ratio for an ideal N-bit converter with a sine wave input is given by:
Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
Thus, for a 10-bit converter, this is 62 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the fundamental.
For the AD7817/AD7818, it is defined as:
THD (dB ) = 20 log
V2 2 + V3 2 + V4 2 + V5 2 + V6 2
V1
specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio
of the rms sum of the individual distortion products to the rms
amplitude of the fundamental expressed in dBs.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of crosstalk
between channels. It is measured by applying a full-scale 20 kHz
sine wave signal to one input channel and determining how much
that signal is attenuated in each of the other channels. The figure
given is the worst case across all four channels.
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints
of the ADC transfer function.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Gain Error
This is the deviation of the last code transition (1111 . . . 110) to
(1111 . . . 111) from the ideal, that is, VREF – 1 LSB, after the
offset error has been adjusted out.
where:
V1 is the rms amplitude of the fundamental.
V2, V3, V4, V5, and V6 are the rms amplitudes of the second
through the sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of
the fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum; however,
for parts where the harmonics are buried in the noise floor, it is
a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities creates distortion products
at sum and difference frequencies of mfa ± nfb, where m, n = 0,
1, 2, 3, etc. Intermodulation terms are those for which neither m
nor n are equal to zero. For example, the second-order terms
include (fa + fb) and (fa − fb), while the third-order terms
include (2fa + fb), (2fa − fb), (fa + 2fb), and (fa − 2fb).
The AD7817/AD7818 are tested using the CCIF standard where
two input frequencies near the top end of the input bandwidth
are used. In this case, the second- and third-order terms are of
different significance. The second-order terms are usually
distanced in frequency from the original sine waves, while the
third-order terms are usually at a frequency close to the input
frequencies. As a result, the second- and third-order terms are
Gain Error Match
This is the difference in gain error between any two channels.
Offset Error
This is the deviation of the first code transition (0000 . . . 000) to
(0000 . . . 001) from the ideal, that is, AGND + 1 LSB.
Offset Error Match
This is the difference in offset error between any two channels.
Track-and-Hold Acquisition Time
The track-and-hold acquisition time is the time required for the
output of the track-and-hold amplifier to reach its final value,
within ±1/2 LSB, after the end of conversion (the point at which
the track-and-hold returns to track mode). It also applies to
situations where a change in the selected input channel takes
place or where there is a step input change on the input voltage
applied to the selected VIN input of the AD7817 or the AD7818.
It means that the user must wait for the duration of the trackand-hold acquisition time after the end of conversion or after a
channel change/step input change to VIN before starting another
conversion, to ensure that the part operates to specification.
Rev. D | Page 10 of 20
Data Sheet
AD7817/AD7818
CONTROL BYTE
Overtemperature Register
The AD7817/AD7818 contain two on-chip registers, the address
register and the overtemperature register. These registers can be
accessed by carrying out an 8-bit serial write operation to the devices.
The 8-bit word or control byte written to the AD7817/AD7818 is
transferred to one of the two on-chip registers as follows.
If any of the five MSBs of the control byte are logic one, the entire
eight bits of the control byte are transferred to the overtemperature
register (see Figure 6). At the end of a temperature conversion,
a digital comparison is carried out between the 8 MSBs of the
temperature conversion result (10 bits) and the contents of the
overtemperature register (8 bits). If the result of the temperature
conversion is greater than the contents of the overtemperature
register (OTR), the overtemperature indicator (OTI) goes logic
low. The resolution of the OTR is 1°C. The lowest temperature
that can be written to the OTR is −95°C and the highest is
+152°C (see Figure 7). However, the usable temperature range of
the temperature sensor is −55°C to +125°C. Figure 7 shows the
OTR and how to set TALARM (the temperature at which the OTI
goes low).
Address Register
If the five MSBs of the control byte are logic zero, the three LSBs
of the control byte are transferred to the address register (see
Figure 6). The address register is a 3-bit-wide register used to
select the analog input channel on which to carry out a conversion.
It is also used to select the temperature sensor, which has the 000
address. Table 6 shows the channel selection. The internal reference
selection connects the input of the ADC to a band gap reference.
When this selection is made and a conversion is initiated, the ADC
output must be approximately midscale. After power-up, the
default channel selection is DB2 = DB1 = DB0 = 0 (temperature
sensor).
OTR (Dec) = TALARM (°C) + 103°C
For example, to set TALARM to 50°C, OTR = 50 + 103 = 153 Dec
or 10011001 bin. If the result of a temperature conversion exceeds
50°C, OTI goes logic low. The OTI logic output is reset high at the
end of a serial read operation or if a new temperature measurement
is lower than TALARM. The default power on TALARM is 50°C.
Table 6. Channel Selection
DB0
0
1
0
1
0
1
Channel Selection
Temperature sensor
Channel 1
Channel 2
Channel 3
Channel 4
Internal reference (1.23 V)
Device
All
All
AD7817
AD7817
AD7817
All
DB2
DB1
DB0
ADDRESS REGISTER
IF ANY BIT DB7 TO DB3 ARE LOGIC 0
THEN DB2 TO DB0 ARE WRITTEN TO
THE ADDRESS REGISTER
MSB
DB7
LSB
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CONTROL BYTE
DB0
OVERTEMPERATURE
REGISTER (OTR)
IF ANY BIT DB7 TO DB3 IS SET TO A
LOGIC 1, THEN THE FULL 8 BITS OF THE
CONTROL WORD ARE WRITTEN TO THE
OVERTEMPERATURE REGISTER
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Figure 6. Address and Overtemperature Register Selection
OVERTEMPERATURE REGISTER
MSB
LSB
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
0
1
0
1
0
1
1
1
0
1
0
1
0
1
MINIMUM TEMPERATURE = –95°C
MAXIMUM TEMPERATURE = +152°C
OVERTEMPERATURE REGISTER (DEC) = TALARM + 103°C
TALARM RESOLUTION = 18/LSB
Figure 7. The Overtemperature Register (OTR)
Rev. D | Page 11 of 20
01316-011
DB1
0
0
1
1
0
1
01316-012
DB2
0
0
0
0
1
1
AD7817/AD7818
Data Sheet
CIRCUIT INFORMATION
TYPICAL CONNECTION DIAGRAM
The AD7817/AD7818 are single- and four-channel, 9 µs
conversion time, 10-bit ADCs with an on-chip temperature
sensor, reference, and serial interface logic functions on a single
chip. The ADC section consists of a conventional, successive
approximation converter based around a capacitor DAC. The
AD7817/AD7818 are capable of running on a 2.7 V to 5.5 V power
supply, and they accept an analog input range of 0 V to VREF.
The on-chip temperature sensor allows an accurate measurement
of the ambient device temperature to be made. The working
measurement range of the temperature sensor is −55°C to +125°C.
The AD7817/AD7818 require a 2.5 V reference, which can be
provided from their internal reference or from an external
reference source. The on-chip reference is selected by connecting
the REFIN pin to analog ground.
Figure 8 shows a typical connection diagram for the AD7817.
The AGND and DGND are connected together at the device for
good noise suppression. The BUSY line is used to interrupt the
microcontroller at the end of the conversion process, and the
serial interface is implemented using three wires (see the AD7817
Serial Interface section for more details). An external 2.5 V
reference can be connected at the REFIN pin. If an external reference
is used, connect a 10 µF capacitor between REFIN and AGND.
For applications where power consumption is a concern, use the
automatic power-down at the end of a conversion to improve
power performance. See the Power vs. Throughput section.
10µF
3-WIRE
SERIAL
INTERFACE
0.1µF
VDD
CONVERTER DETAILS
A temperature measurement is made by selecting the Channel 0
of the on-chip mux and carrying out a conversion on this channel.
A conversion on Channel 0 takes 27 µs to complete. Temperature
measurement is explained in the Temperature Measurement
section.
The on-chip reference is not available, however, REFIN can be
overdriven by an external reference source (2.5 V only). The effect
of reference tolerances on temperature measurements is discussed
in the Temperature Measurement Error Due to Reference Error
section.
Tie all unused analog inputs to a voltage within the nominal
analog input range to avoid noise pickup. For minimum power
consumption, tie the unused analog inputs to AGND.
0V TO 2.5V
INPUT
SCLK
RD/WR
DOUT
DIN
AD7817
AGND
DGND
CONVST
BUSY
OTI
REFIN
AD780/
REF-192
CS
10µF
EXTERNAL
REFERENCE
01316-013
OPTIONAL
EXTERNAL
REFERENCE
Figure 8. Typical Connection Diagram
ANALOG INPUTS
Analog Input
Figure 9 shows an equivalent circuit of the analog input structure of
the AD7817/AD7818. The two diodes, D1 and D2, provide ESD
protection for the analog inputs. Take care to ensure that the
analog input signal never exceeds the supply rails by more than
200 mV. This causes these diodes to become forward-biased
and start conducting current into the substrate. The maximum
current these diodes can conduct without causing irreversible
damage to the part is 20 mA. The C2 capacitor in Figure 9 is
typically about 4 pF and can mostly be attributed to pin
capacitance. The R1 resistor is a lumped component made up
of the on resistance of a multiplexer and a switch. This resistor
is typically about 1 kΩ. The C1 capacitor is the ADC sampling
capacitor and has a capacitance of 3 pF.
VDD
D1
AIN
C2
4pF
R1
1kΩ
C1
3pF
VBALANCE
D2
CONVERT PHASE—SWITCH OPEN
TRACK PHASE—SWITCH CLOSED
Figure 9. Equivalent Analog Input Circuit
Rev. D | Page 12 of 20
01316-014
Conversion is initiated by pulsing the CONVST input. The
conversion clock for the part is internally generated; therefore,
an external clock is not required, except when reading from and
writing to the serial port. The on-chip, track-and-hold goes from
track mode to hold mode, and the conversion sequence is started
on the falling edge of the CONVST signal. At this point, the BUSY
signal goes high and low again 9 µs or 27 µs later (depending on
whether an analog input or the temperature sensor is selected)
to indicate the end of the conversion process. A microcontroller
can use this signal to determine when the result of the conversion
should be read. The track-and-hold acquisition time of the
AD7817/AD7818 is 400 ns.
AIN1
AIN2
AIN3
AIN4
MICROCONVERTER/
MICROPROCESSOR
SUPPLY
2.7V TO 5.5V
Data Sheet
AD7817/AD7818
DC Acquisition Time
ON-CHIP REFERENCE
The ADC starts a new acquisition phase at the end of a conversion
and ends on the falling edge of the CONVST signal. At the end
of a conversion, a settling time is associated with the sampling
circuit. This settling time lasts approximately 100 ns. The
analog signal on VIN is also being acquired during this settling
time. Therefore, the minimum acquisition time needed is
approximately 100 ns.
The AD7817/AD7818 have an on-chip, 1.2 V band gap reference
that is gained up to give an output of 2.5 V. By connecting the
REFIN pin to analog ground, the on-chip reference is selected.
This selection causes SW1 to open and the reference amplifier
to power up during a conversion (see Figure 11). Therefore, the
on-chip reference is not available externally. An external 2.5 V
reference can be connected to the REFIN pin, which has the
effect of shutting down the on-chip reference circuitry and
reducing IDD by approximately 0.25 mA.
Figure 10 shows the equivalent charging circuit for the sampling
capacitor when the ADC is in its acquisition phase. R2 represents
the source impedance of a buffer amplifier or resistive network,
R1 is an internal multiplexer resistance, and C1 is the sampling
capacitor.
EXTERNAL
REFERENCE
DETECT
REFIN
1.2V
R2
R1
1kΩ
SW1
C1
3pF
1.2V
01316-015
VIN
26kΩ
2.5V
BUFFER
Figure 10. Equivalent Sampling Circuit
TCHARGE = 7.6 × (R2 + 1 kΩ) × 3 pF
For small values of source impedance, the settling time associated
with the sampling circuit (100 ns) is, in effect, the acquisition
time of the ADC. For example, with a source impedance (R2) of
10 Ω, the charge time for the sampling capacitor is approximately
23 ns. The charge time becomes significant for source impedances
of 1 kΩ and greater.
24kΩ
01316-016
During the acquisition phase, the sampling capacitor must be
charged to within a 1/2 LSB of its final value. The time it takes
to charge the sampling capacitor (TCHARGE) is given by
Figure 11. On-Chip Reference
ADC TRANSFER FUNCTION
The output coding of the AD7817/AD7818 is straight binary. The
designed code transitions occur at successive integer LSB values
(that is, 1 LSB, 2 LSBs, and so on). The LSB size is = 2.5 V/1024 =
2.44 mV. The ideal transfer characteristic is shown in Figure 12.
111...111
AC Acquisition Time
In ac applications, it is recommended to always buffer analog
input signals. The source impedance of the drive circuitry must
be kept as low as possible to minimize the acquisition time of
the ADC. Large values of source impedance cause the THD to
degrade at high throughput rates.
ADC CODE
111...110
111...000
1LSB = 2.5/1024
2.44mV
011...111
000...010
000...000
1LSB
0V
+2.5V × 1LSB
ANALOG INPUT
Figure 12. ADC Transfer Function
Rev. D | Page 13 of 20
01316-017
000...001
AD7817/AD7818
Data Sheet
TEMPERATURE MEASUREMENT
The on-chip temperature sensor can be accessed via multiplexer
Channel 0, that is, by writing 0 0 0 to the channel address register.
The temperature is also the power on default selection. The
transfer characteristic of the temperature sensor is shown in
Figure 13. The result of the 10-bit conversion on Channel 0
can be converted to degrees centigrade by the following:
TAMB = −103°C + (ADC Code/4)
192Dec
ADC CODE
912Dec
Figure 13. Temperature Sensor Transfer Characteristics
For example, if the result of a conversion on Channel 0 was
1000000000 (512 Dec), the ambient temperature is equal to
−103°C + (512/4) = +25°C.
SELF-HEATING CONSIDERATIONS
The AD7817/AD7818 have an analog-to-digital conversion
function capable of a throughput rate of 100 kSPS. At this
throughput rate, the AD7817/AD7818 consume between 4 mW
and 6.5 mW of power. Because a thermal impedance is associated
with the IC package, the temperature of the die rises as a result
of this power dissipation. Figure 14 to Figure 16 show the selfheating effect in a 16-lead SOIC. Figure 14 and Figure 15 show
the self-heating effect on a two-layer and four-layer PCB. The
plots were generated by assembling a heater (resistor) and
temperature sensor (diode) in the package being evaluated. In
Figure 14, the heater (6 mW) is turned off after 30 sec. The PCB
has little influence on the self-heating over the first few seconds
after the heater is turned on. This can be more clearly seen in
Figure 15 where the heater is switched off after 2 sec. Figure 16
shows the relative effects of self-heating in air, fluid, and
thermal contact with a large heat sink.
0.50
Table 7 shows some ADC codes for various temperatures.
0.40
Table 7. Temperature Sensor Output
0.35
Temperature
−55°C
−25°C
0°C
+25°C
+55°C
+125°C
TEMPERATURE (°C)
ADC Code
00 1100 0000
01 0011 1000
01 1001 1100
10 0000 0000
10 0111 1000
11 1001 0000
2-LAYER PCB
0.45
0.30
0.25
0.20
4-LAYER PCB
0.15
0.10
0.05
0
TEMPERATURE MEASUREMENT ERROR DUE TO
REFERENCE ERROR
–0.05
0
The AD7817/AD7818 are trimmed using a precision 2.5 V
reference to give the transfer function previously described. To
show the effect of the reference tolerance on a temperature reading,
the temperature sensor transfer function can be rewritten as a
function of the reference voltage and the temperature.
10
20
30
40
50
60
TIME (Seconds)
01316-019
–55°C
01316-018
TEMPERATURE
+125°C
As can be seen from the expression, a reference error produces a
gain error. This means that the temperature measurement error
due to reference error will be greater at higher temperatures. For
example, with a reference error of −1%, the measurement error
at −55°C is 2.2 LSBs (+0.5°C) and 16 LSBs (+4°C) at +125°C.
Figure 14. Self-Heating Effect 2-Layer and 4-Layer PCB with the Heater
(6 mW) Turned Off After 30 sec
0.25
0.20
TEMPERATURE (°C)
CODE (DEC) = ([113.3285 × K × T]/[q × VREF] − 0.6646) × 1024
So, for example, to calculate the ADC code at 25°C,
CODE = ([113.3285 × 298 × 1.38 × 10−23]/[1.6 × 10−19 × 2.5]
− 0.6646) × 1024
0.15
0.10
2-LAYER PCB
4-LAYER PCB
0.05
0
–0.05
= 511.5 (200 Hex)
0
1
2
3
TIME (Seconds)
4
5
01316-020
where:
K = Boltzmann’s Constant, 1.38 × 10−23
q = charge on an electron, 1.6 × 10−19
T = temperature (K)
Figure 15. Self-Heating Effect 2-Layer and 4-Layer PCB with the Heater
Switched Off After 2 sec
Rev. D | Page 14 of 20
Data Sheet
AD7817/AD7818
Figure 16 represents the worst-case effects of self-heating. The
heater delivered 6 mW to the interior of the package in all cases.
This power level is equivalent to the ADC continuously converting
at 100 kSPS. The effects of the self-heating can be reduced at
lower ADC throughput rates by operating in Mode 2 (see
Operating Modes section). When operating in this mode, the
on-chip power dissipation reduces dramatically and, as a
consequence, the self-heating effects.
0.8
0.7
TEMPERATURE (°C)
0.6
AIR
0.5
OPERATING MODES
The AD7817/AD7818 have two possible modes of operation
depending on the state of the CONVST pulse at the end of a
conversion.
Mode 1
In this mode of operation, the CONVST pulse is brought high
before the end of a conversion, that is, before BUSY goes low
(see Figure 17). When operating in this mode, do not initiate a
new conversion until 100 ns after the end of a serial read operation.
This quiet time is to allow the track-and-hold to accurately acquire
the input signal after a serial read.
Mode 2
0.4
In this mode of operation, AD7817/AD7818 automatically power
down at the end of a conversion (see Figure 18). The CONVST is
brought low to initiate a conversion and is left logic low until after
the end of the conversion. At this point, that is, when BUSY goes
low, the devices power down.
FLUID
0.3
0.2
HEAT SINK
0.1
–0.1
0
2
4
6
8
10
TIME (Seconds)
12
14
16
01316-021
0
Figure 16. Self-Heating Effect in Air, Fluid, and Thermal Contact with a Heat Sink
The devices are powered up again on the rising edge of the
CONVST signal. Superior power performance can be achieved in
this mode of operation by powering up the AD7817/AD7818 only
to carry out a conversion (see the Power vs. Throughput section).
In Figure 18, the CS line is applicable to the AD7817 only.
Rev. D | Page 15 of 20
AD7817/AD7818
Data Sheet
t1
t2
CONVST
t3
BUSY
t17
CS
t15
t16
OTI
RD/WR
SCLK
DB7 – DB0
DB7(DB9) – DB0
DOUT
01316-023
DIN
Figure 17. Mode 1 Operation
tPOWER-UP
t1
CONVST
t3
BUSY
CS
t15
OTI
t16
RD/WR
SCLK
DB7 – DB0
DOUT
DB7(DB9) – DB0
Figure 18. Mode 2 Operation
Rev. D | Page 16 of 20
01316-024
DIN
Data Sheet
AD7817/AD7818
POWER vs. THROUGHPUT
10
Superior power performance can be achieved by using the
automatic power-down (Mode 2) at the end of a conversion
(see the Operating Modes section).
POWER (mW)
1
tPOWER-UP tCONVERT
2µs
8µs
CONVST
0.1
tCYCLE
100µs @ 10kSPS
0.01
Figure 19. Automatic Power-Down
0
Figure 19 shows how the automatic power-down is implemented to
achieve the optimum power performance from the AD7817 and
AD7818. The devices operate in Mode 2, and the duration of
CONVST pulse is set equal to the power-up time (2 µs). As the
throughput rate of the device is reduced, the device remains in
its power-down state longer, and the average power consumption
over time drops accordingly.
10
20
30
40
50
60
70
THROUGHPUT (kHz)
80
01316-026
01316-025
BUSY
Figure 20. Power vs. Throughput Rate
AD7817 SERIAL INTERFACE
The serial interface on the AD7817 is a 5-wire interface that has
read and write capabilities, with data being read from the output
register via the DOUT line and data being written to the control
register via the DIN line. The AD7817 operates in slave mode
and requires an externally applied serial clock to the SCLK input
to access data from the data register or write to the control byte.
The RD/WR line is used to determine whether data is being
written to or read from the AD7817. When data is being written
to the AD7817, the RD/WR line is set logic low, and when data
is being read from the part, the RD/WR line is set logic high
(see Figure 21). The serial interface on the AD7817 is designed
to allow the part to be interfaced to systems that provide a serial
clock that is synchronized to the serial data, such as the 80C51,
87C51, 68HC11, 68HC05, and PIC16Cxx microcontrollers.
For example, if the AD7817 operates in continuous sampling
mode with a throughput rate of 10 kSPS, the power consumption
is calculated as follows. The power dissipation during normal
operation is 4.8 mW, VDD = 3 V. If the power-up time is 2 µs,
and the conversion time is 9 µs, the AD7817 can typically dissipate
4.8 mW for 11 µs (worst case) during each conversion cycle. If
the throughput rate is 10 kSPS, the cycle time is 100 µs, and
the power dissipated while powered up during each cycle is
(11/100) × (4.8 mW) = 528 µW typical. Power dissipated while
powered down during each cycle is (89/100) × (3 V × 2 µA) =
5.34 µW typ. Overall power dissipated is 528 µW + 5.34 µW =
533 µW.
CS
t4
t10
RD/WR
t8
t5
SCLK
1
2
3
t11
7
8
1
2
3
9
10
t9
t6
t7
DB7
DB6
DB5
CONTROL BYTE
DOUT
DB1
DB0
t14b
t13
t12
DB9
DB8
Figure 21. AD7817 Serial Interface Timing Diagram
Rev. D | Page 17 of 20
t14a
DB7
DB1
DB0
01316-027
DIN
AD7817/AD7818
Data Sheet
Read Operation
AD7818 SERIAL INTERFACE MODE
Figure 21 shows the timing diagram for a serial read from the
AD7817. CS is brought low to enable the serial interface, and
RD/WR is set logic high to indicate that the data transfer is a
serial read from the AD7817. The rising edge of RD/WR clocks
out the first data bit (DB9), subsequent bits are clocked out on
the falling edge of SCLK (except for the first falling SCLK edge)
and are valid on the rising edge. During a read operation, 10 bits of
data are transferred. However, a choice is available to only clock
eight bits if the full 10 bits of the conversion result are not required.
The serial data can be accessed in a number of bytes if 10 bits of
data are being read. However, RD/WR must remain high for the
duration of the data transfer operation. Before starting a new data
read operation, the RD/WR signal must be brought low and high
again. At the end of the read operation, the DOUT line enters a high
impedance state on the rising edge of the CS, or the falling edge of
RD/WR, whichever occurs first. The readback process is a
destructive process, in that once data is read back, it is erased. A
conversion must be done again; otherwise, no data is read back.
The serial interface on the AD7818 is a 3-wire interface that has
read and write capabilities. Data is read from the output register
and the control byte is written to the AD7818 via the DIN/DOUT
line. The AD7818 operates in slave mode and requires an externally
applied serial clock to the SCLK input to access data from the
data register or write to the control byte. The RD/WR line is
used to determine whether data is being written to or read from
the AD7818. When data is being written to the AD7818, the
RD/WR line is set logic low, and when data is being read from
the AD7818 the line is set logic high (see Figure 22). The serial
interface on AD7818 is designed to allow the AD7818 to interface
with systems that provide a serial clock that is synchronized to
the serial data, such as the 80C51, 87C51, 68HC11, 68HC05,
and PIC16Cxx microcontrollers.
Read Operation
Figure 22 shows the timing diagram for a serial read from the
AD7818. The RD/WR is set logic high to indicate that the data
transfer is a serial read from the devices. When RD/WR is logic
high, the DIN/DOUT pin becomes a logic output, and the first data
bit (DB9) appears on the pin. Subsequent bits are clocked out on
the falling edge of SCLK, starting with the second SCLK falling
edge after RD/WR goes high, and are valid on the rising edge of
SCLK. Ten bits of data are transferred during a read operation.
However, a choice is available to only clock eight bits if the full
10 bits of the conversion result are not required. The serial data
can be accessed in a number of bytes if 10 bits of data are being
read. However, RD/WR must remain high for the duration of the
data transfer operation. To carry out a successive read operation,
the RD/WR pin must be brought logic low and high again. At
the end of the read operation, the DIN/DOUT pin becomes a logic
input on the falling edge of RD/WR.
Write Operation
Figure 21 also shows the control byte write operation to the
AD7817. The RD/WR input goes low to indicate to the part that
a serial write is about to occur. The AD7817 control byte is loaded
on the rising edge of the first eight clock cycles of the serial clock
with data on all subsequent clock cycles being ignored. To carry
out a second successive write operation, the RD/WR signal must be
brought high and low again.
Simplifying the Serial Interface
To minimize the number of interconnect lines to the AD7817,
connect the CS line to DGND. This is possible if the AD7817 is
not sharing the serial bus with another device. It is also possible to
tie the DIN and DOUT lines together. This arrangement is compatible
with the 8051 microcontroller. The 68HC11, 68HC05, and
PIC16Cxx can be configured to operate with a single serial data
line. In this way, the number of lines required to operate the serial
interface can be reduced to three, that is, RD/WR, SCLK, and
DIN/DOUT (see Figure 8).
Write Operation
A control byte write operation to the AD7818 is also shown in
Figure 22. The RD/WR input goes low to indicate to the part that a
serial write is about to occur. The AD7818 control bytes are
loaded on the rising edge of the first eight clock cycles of the serial
clock with data on all subsequent clock cycles being ignored. To
carry out a successive write to the AD7818 the RD/WR pin must
be brought logic high and low again.
RD/WR
SCLK
t8
1
2
3
t6
t11
7
8
t9
t12
t7
DIN/OUT
DB7
DB6
DB5
DB1
1
DB0
2
3
9
10
t13
DB9
DB8
CONTROL BYTE
Figure 22. AD7818 Serial Interface Timing Diagram
Rev. D | Page 18 of 20
t14a
DB7
DB1
DB0
01316-028
t5
Data Sheet
AD7817/AD7818
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497)
5
1
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
0.50 (0.0196)
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
45°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
012407-A
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 23. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
9
16
1
8
6.20 (0.2441)
5.80 (0.2283)
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
060606-A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 24. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5.15
4.90
4.65
5
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.40
0.25
6°
0°
0.23
0.09
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 25.8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. D | Page 19 of 20
0.80
0.55
0.40
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
AD7817/AD7818
Data Sheet
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.30
0.19
0.65
BSC
COPLANARITY
0.10
SEATING
PLANE
8°
0°
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 26. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
AD7817ARZ
AD7817ARZ-REEL
AD7817ARZ-REEL7
AD7817ARU
AD7817ARU-REEL
AD7817ARU-REEL7
AD7817ARUZ
AD7817ARUZ-REEL
AD7817ARUZ-REEL7
AD7817BRZ
AD7817BRZ-REEL
AD7817BRZ-REEL7
AD7817BRU
AD7817BRU-REEL7
AD7817BRUZ
AD7817BRUZ-REEL
AD7817BRUZ-REEL7
AD7817SR
AD7817SR-REEL
AD7817SR-REEL7
AD7818ARZ
AD7818ARZ-REEL7
AD7818ARM
AD7818ARM-REEL
AD7818ARM-REEL7
AD7818ARMZ
AD7818ARMZ-REEL
AD7818ARMZ-REEL7
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Temperature Error at 25°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±1°C
±1°C
±1°C
±1°C
±1°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
±2°C
Z = RoHS Compliant Part.
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D01316-0-10/12(D)
Rev. D | Page 20 of 20
Package Description
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
16-Lead SOIC_N
16-Lead SOIC_N
16-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
Package Option
R-16
R-16
R-16
RU-16
RU-16
RU-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
Branding
C3A
C3A
C3A
T1P
T1P
T1P
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