Cadeka AD8052LVIMP8X Low cost, 2.7v to 5.5v, 260mhz rail-to-rail amplifier Datasheet

Data Sheet
Comlinear AD8052LV
®
General Description
The COMLINEAR AD8052LV is a low cost dual, voltage feedback amplifier.
This amplifier is designed to operate on +2.7V to +5V, or ±2.5V supplies.
The input voltage range extends 300mV below the negative rail and 1.2V
below the positive rail.
The AD8052LV offers superior dynamic performance with a 260MHz small
signal bandwidth and 145V/μs slew rate. The combination of low power,
high output current drive, and rail-to-rail performance make the AD8052LV
well suited for battery-powered communication/computing systems.
The combination of low cost and high performance make the AD8052LV
suitable for high volume applications in both consumer and industrial
applications such as wireless phones, scanners, and color copiers.
APPLICATIONS
n A/D driver
n Active filters
n CCD imaging systems
n CD/DVD ROM
n Coaxial cable drivers
n High capacitive load driver
n Portable/battery-powered applications
n Twisted pair driver
n Telecom and optical terminals
n Video driver
Output Swing
Output Voltage (0.5V/div)
2.7
Vs = +2.7V
RL = 2kΩ
G = -1
0
Time (0.5μs/div)
®
FEATURES
n 260MHz bandwidth
n Fully specified at +2.7V and +5V supplies
n Output voltage range:
0.036V to 4.953V; Vs = +5; RL = 2kΩ
n Input voltage range:
-0.3V to +3.8V; Vs = +5
n 145V/μs slew rate
n 4.2mA supply current per amplifier
n ±55mA linear output current
n ±85mA short circuit current
n Directly replaces AD8052, AD8042
and AD8092 in single supply applications
n Pb-free SOIC-8 package
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
Low Cost, +2.7V to 5.5V, 260MHz
Rail-to-Rail Amplifier
Rev 1A
Ordering Information
Part Number
Package
Pb-Free
RoHS Compliant
Operating Temperature Range
Packaging Method
AD8052LVISO8
SOIC-8
Yes
Yes
-40°C to +85°C
Rail
AD8052LVISO8X
SOIC-8
Yes
Yes
-40°C to +85°C
Reel
AD8052LVIMP8X*
MSOP-8
Yes
Yes
-40°C to +85°C
Reel
Moisture sensitivity level for all parts is MSL-1. *Advance Information, contact CADEKA for availability.
©2011 CADEKA Microcircuits LLC www.cadeka.com
Data Sheet
AD8052LV Pin Configuration
AD8052LV Pin Assignments
SOIC-8, MSOP-8
SOIC-8, MSOP-8
1
-IN1
2
+IN1
3
-Vs
4
+
+
8
+Vs
7
OUT2
6
-IN2
5
+IN2
Pin No.
Pin Name
Description
1
OUT1
Output, channel 1
2
-IN1
Negative input, channel 1
3
+IN1
Positive input, channel 1
4
-VS
5
+IN2
Positive input, channel 2
6
-IN2
Negative input, channel 2
7
OUT2
Output, channel 2
8
+VS
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
OUT1
Negative supply
®
Positive supply
Rev 1A
©2011 CADEKA Microcircuits LLC www.cadeka.com
2
Data Sheet
Absolute Maximum Ratings
Parameter
Max
Unit
0
-Vs -0.5V
+6
+Vs +0.5V
V
V
®
Supply Voltage
Input Voltage Range
Min
Reliability Information
Parameter
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Package Thermal Resistance
8-Lead SOIC
8-Lead MSOP
Min
Typ
-65
Max
Unit
175
150
260
°C
°C
°C
100
TBD
°C/W
°C/W
Notes:
Package thermal resistance (θJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Product
Human Body Model (HBM)
Charged Device Model (CDM)
SOIC-8
MSOP-8
2.5kV
2kV
TBD
TBD
Recommended Operating Conditions
Parameter
Min
Operating Temperature Range
Supply Voltage Range
-40
2.5
Typ
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper
device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect
the operating conditions noted on the tables and plots.
Max
Unit
+85
5.5
°C
V
Rev 1A
©2011 CADEKA Microcircuits LLC www.cadeka.com
3
Data Sheet
Electrical Characteristics at 2.7V
Vs = +2.7V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
-3dB Bandwidth(2)
G = +1, VOUT = 0.05Vpp
215
MHz
BWSS
-3dB Bandwidth
G = +2, VOUT = 0.2Vpp
85
MHz
BWLS
Large Signal Bandwidth
G = +2, VOUT = 2Vpp
36
MHz
GBWP
Gain Bandwidth Product
86
MHz
®
Time Domain Response
tR, tF
Rise and Fall Time(2)
VOUT = 0.2V step
3.7
ns
tS
Settling Time to 0.1%
VOUT = 1V step
40
ns
OS
Overshoot
VOUT = 0.2V step
9
%
SR
Slew Rate
2.7V step, G = -1
130
V/µs
1Vpp, 5MHz
79
dBc
1Vpp, 5MHz
82
dBc
Distortion/Noise Response
HD2
2nd Harmonic Distortion(2)
HD3
3rd Harmonic Distortion(2)
1Vpp, 5MHz
77
dB
en
Input Voltage Noise
> 1MHz
16
nV/√Hz
in
Input Current Noise
> 1MHz
1.3
pA/√Hz
XTALK
Crosstalk(1)
10MHz
65
dB
Input Offset Voltage
-1.6
mV
µV/°C
DC Performance
VIO
dVIO
Average Drift
10
Ib
Input Bias Current
3
µA
dIb
Average Drift
7
nA/°C
IIO
Input Offset Current
0.1
µA
PSRR
Power Supply Rejection Ratio(1)
57
dB
AOL
Open-Loop Gain
75
dB
IS
Quiescent Current
3.9
mA
4.3
MΩ
1.8
pF
DC
52
Per Amplifier
Input Characteristics
RIN
Input Resistance
CIN
Input Capacitance
CMIR
Common Mode Input Range
CMRR
Common Mode Rejection Ratio
-0.3 to 1.5
V
87
dB
RL = 10kΩ to Vs/2
0.023 to
2.66
V
RL = 2kΩ to Vs/2
0.025 to
2.653
V
RL = 150Ω to Vs/2
0.065 to
2.55
V
±55
mA
±50
mA
±85
mA
DC, Vcm = 0V to Vs -1.5
Output Characteristics
VOUT
Output Voltage Swing
Output Current
ISC
Short-Circuit Output Current
Vs
Power Supply Operating Range
-40°C to +85°C
2.5
2.7
5.5
Rev 1A
IOUT
V
Notes:
1. 100% tested at 25°C.
2. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0).
©2011 CADEKA Microcircuits LLC Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
UGBW
www.cadeka.com
4
Data Sheet
Electrical Characteristics at 5V
Vs = 5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
-3dB Bandwidth(2)
G = +1, VOUT = 0.05Vpp
260
MHz
BWSS
-3dB Bandwidth
G = +2, VOUT = 0.2Vpp
90
MHz
BWLS
Large Signal Bandwidth
G = +2, VOUT = 2Vpp
40
MHz
GBWP
Gain Bandwidth Product
90
MHz
®
Time Domain Response
tR, tF
Rise and Fall Time(2)
VOUT = 0.2V step
3.6
ns
tS
Settling Time to 0.1%
VOUT = 2V step
40
ns
OS
Overshoot
VOUT = 0.2V step
7
%
SR
Slew Rate
5V step, G = -1
145
V/µs
2Vpp, 5MHz
71
dBc
2Vpp, 5MHz
78
dBc
2Vpp, 5MHz
70
dB
NTSC (3.85MHz), AC-Coupled, RL = 150Ω
0.06
%
NTSC (3.85MHz), DC-Coupled, RL = 150Ω
0.08
%
NTSC (3.85MHz), AC-Coupled, RL = 150Ω
0.07
°
NTSC (3.85MHz), DC-Coupled, RL = 150Ω
0.06
°
Distortion/Noise Response
HD2
HD3
DG
2nd Harmonic Distortion(2)
3rd Harmonic Distortion(2)
Differential Gain
DP
Differential Phase
en
Input Voltage Noise
>1MHz
16
nV/√Hz
in
Input Current Noise
>1MHz
1.3
pA/√Hz
XTALK
Crosstalk(2)
10MHz
62
dB
DC Performance
VIO
dVIO
Ib
dIb
IIO
Input Offset Voltage(1)
-8
Average Drift
-8
Average Drift
Power Supply Rejection
Open-Loop Gain(1)
IS
Quiescent Current(1)
+8
3
Ratio(1)
DC
-0.8
0.1
52
57
68
78
Per Amplifier
4.2
mV
µV/°C
+8
7
Input Offset Current(1)
AOL
1.4
10
Input Bias Current(1)
PSRR
µA
nA/°C
+0.8
µA
dB
dB
5.2
mA
Input Characteristics
RIN
Input Resistance
4.3
MΩ
CIN
Input Capacitance
1.8
pF
CMIR
Common Mode Input Range
CMRR
Common Mode Rejection Ratio(1)
-0.3 to 3.8
V
87
dB
RL = 10kΩ to Vs/2
0.027 to
4.97
V
RL = 2kΩ to Vs/2
0.036 to
4.953
DC, Vcm = 0V to Vs -1.5
72
Output Characteristics
Output Voltage Swing
RL = 150Ω to Vs/2(1)
IOUT
Output Current
ISC
Short-Circuit Output Current
Vs
Power Supply Operating Range
0.3
-40°C to +85°C
0.12 to
4.8
V
4.625
V
±55
mA
±50
mA
±85
2.5
5
Rev 1A
VOUT
mA
5.5
V
Notes:
1. 100% tested at 25°C.
2. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0).
©2011 CADEKA Microcircuits LLC Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
UGBW
www.cadeka.com
5
Data Sheet
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Normalized Magnitude (1dB/div)
G=1
Rf = 0
G=2
Rf = 1kΩ
G=5
Rf = 2kΩ
1
10
100
G = -1
Rf = 2kΩ
G = -10
Rf = 2kΩ
G = -5
Rf = 2kΩ
G = -2
Rf = 2kΩ
0.1
Frequency (MHz)
G=2
Rf = 1kΩ
G = 10
Rf = 2kΩ
G=5
Rf = 2kΩ
10
100
G = -10
Rf = 2kΩ
G = -5
Rf = 2kΩ
G = -2
Rf = 2kΩ
0.1
Magnitude (1dB/div)
Magnitude (1dB/div)
0.1
CL = 20pF
Rs = 20Ω
CL
1kΩ
1
RL
CL = 10pF
Rs = 0Ω
10
Frequency (MHz)
©2011 CADEKA Microcircuits LLC 100
100
0.1
Vo = 1Vpp
Rev 1A
CL = 50pF
Rs = 33Ω
-
10
Large Signal Frequency Response
CL = 100pF
Rs = 25Ω
1kΩ
1
Frequency (MHz)
Frequency Response vs. CL
Rs
100
G = -1
Rf = 2kΩ
Frequency (MHz)
+
10
Inverting Frequency Response Vs = +2.7V
Normalized Magnitude (1dB/div)
Normalized Magnitude (2dB/div)
G=1
Rf = 0
1
1
Frequency (MHz)
Non-Inverting Frequency Response Vs = +2.7V
0.1
®
G = 10
Rf = 2kΩ
0.1
Inverting Frequency Response Vs = +5V
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
Normalized Magnitude (2dB/div)
Non-Inverting Frequency Response Vs = +5V
Vo = 2Vpp
1
10
100
Frequency (MHz)
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6
Data Sheet
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Frequency Response vs. Temperature
Input Voltage Noise
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
100
Magnitude (0.5dB/div)
80
70
60
®
Voltage Noise (nV/√Hz)
90
50
40
30
20
10
0
1
10
1k
100
10k
2nd & 3rd Harmonic Distortion; Vs = +5V
-30
Distortion (dBc)
-20
Vo = 2Vpp
Rf = 1kΩ
2nd
RL = 150Ω
-40
3rd
RL = 150Ω
-60
2nd
RL = 2kΩ
3rd
RL = 2kΩ
-80
-90
0
5
Vo = 1Vpp
Rf = 1kΩ
-30
-50
-70
3rd
RL = 150Ω
-40
-50
2nd
RL = 150Ω
-60
15
-90
20
3rd
RL = 2kΩ
0
5
Frequency (MHz)
-20
Rf = 1kΩ
Rf = 1kΩ
-50
Distortion (dBc)
20MHz
10MHz
-60
-70
5MHz
-80
2MHz
1.0
1.5
2.0
Output Amplitude (Vpp)
©2011 CADEKA Microcircuits LLC 20MHz
-40
-50
10MHz
-60
-70
5MHz
-80
2.5
Rev 1A
Distortion (dBc)
20
-30
-40
0.5
15
3rd Harmonic Distortion vs. Vo
-20
-90
10
Frequency (MHz)
2nd Harmonic Distortion vs. Vo
-30
2nd
RL = 2kΩ
-70
-80
10
1M
2nd & 3rd Harmonic Distortion; Vs = +2.7V
Distortion (dBc)
-20
100k
Frequency (Hz)
Frequency (MHz)
2MHz
-90
0.5
1.0
1.5
2.0
2.5
Output Amplitude (Vpp)
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7
Data Sheet
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
PSRR
CMRR
0
-10
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
-40
-50
CMRR (dB)
-30
-40
-60
®
PSRR (dB)
-20
-70
-50
-80
-60
-70
1k
0.01
0.1
1
-90
0.01
100
10
0.1
Frequency (MHz)
0.8
70
0.6
60
|Gain|
40
30
10
0
Phase
-45
0
-90
-10
-20
0.01
0.1
1
10
100
Output Voltage (V)
80
20
Linear output current ±55mA
0.2
0
-0.2
Short circuit current ±85mA
-0.4
-135
-0.6
-180
-0.8
-100
50
100
Small Signal Pulse Response Vs = +2.7V
Output Voltage (0.05V/div)
Output Voltage (0.05V/div)
0
Rf = 1kΩ
Rev 1A
©2011 CADEKA Microcircuits LLC -50
Output Current (mA)
Small Signal Pulse Response Vs = +5V
Time (20ns/div)
100
0.4
Frequency (MHz)
Rf = 1kΩ
10
Output Current
Phase (degrees)
Open Loop Gain (dB)
Open Loop Gain & Phase vs. Frequency
50
1.0
Frequency (MHz)
Time (20ns/div)
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8
Data Sheet
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Large Signal Pulse Response Vs = +5V
Output Swing
Output Voltage (0.5V/div)
Output Voltage (0.5V/div)
®
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
2.7
Rf = 1kΩ
Vs = +2.7V
RL = 2kΩ
G = -1
0
Time (20ns/div)
Time (0.5μs/div)
Channel Matching Vs = +5V
Magnitude (0.5dB/div)
Rf = 1kΩ
RL = 2kΩ
G=2
Channel 1
Channel 2
0.1
1
10
100
Frequency (MHz)
Rev 1A
©2011 CADEKA Microcircuits LLC www.cadeka.com
9
Data Sheet
Application Information
+Vs
General Description
R1
Input
+Vs
Output
-
RL
Rf
6.8μF
®
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Figure 4 shows the typical non-inverting gain circuit for
single supply applicaitons.
0.1μF
+
0.1μF
The common mode input range extends to 300mV below
ground and to 1.2V below Vs. Exceeding these values
will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD
devices will begin to conduct. The output will stay at the
rail during this overdrive condition.
The design uses a Darlington output stage. The output
stage is short circuit protected and offers “soft” saturation
protection that improves recovery time.
Rg
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
The AD8052LV is a single supply, general purpose, voltage-feedback amplifier fabricated on a complementary
bipolar process using a patent pending topography. They
feature a rail-to-rail output stage and is unity gain stable.
Both gain bandwidth and slew rate are insensitive to temperature.
6.8μF
G = - (Rf/Rg)
-Vs
For optimum input offset
voltage set R1 = Rf || Rg
Figure 2. Typical Inverting Gain Circuit
+Vs
Input
6.8μF
0.1μF
+
Output
-
RL
0.1μF
6.8μF
-Vs
G=1
Figure 3. Unity Gain Circuit
6.8μF
+Vs
6.8μF
+
Input
0.1μF
+
Output
0.1μF
Rg
6.8μF
-Vs
In
+
RL
-
Rf
G = 1 + (Rf/Rg)
0.01µF
Out
Rf
Rg
Figure 1. Typical Non-Inverting Gain Circuit
Rev 1A
Figure 4. Single Supply Non-Inverting Gain Circuit
©2011 CADEKA Microcircuits LLC www.cadeka.com
10
Data Sheet
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
Rloadeff in Figure 3 would be calculated as:
RL || (Rf + Rg)
G=2
RL = 2kΩ
Vs = +5V
Rf = 2kΩ
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Rf = 1kΩ
Here, PD can be found from
PD = PQuiescent + PDynamic - PLoad
1
10
100
Frequency (MHz)
Figure 5: Frequency Response vs. Rf
Quiescent power can be derived from the specified IS
values along with known supply voltage, VSupply. Load
power can be calculated as above with the desired signal
amplitudes using:
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 2kΩ load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature
is not exceeded. Guidelines listed below can be used to
verify that the particular application will not cause the
device to operate beyond it’s intended operating range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value
ThetaJA (ӨJA) is used along with the total die power
dissipation.
TJunction = TAmbient + (ӨJA × PD)
(VLOAD)RMS = VPEAK / √2
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS
Assuming the load is referenced in the middle of the
power rails or Vsupply/2.
The AD8052LV is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Figure 6
shows the maximum safe power dissipation in the package
vs. the ambient temperature for the packages available.
2.5
PD = Psupply - Pload
Supply power is calculated by the standard power
equation.
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VSPower delivered to a purely resistive load is:
©2011 CADEKA Microcircuits LLC 2
Rev 1A
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
Maximum Power Dissipation (W)
Where TAmbient is the temperature of the working environment.
®
Magnitude (1dB/div)
Pload = ((VLOAD)RMS2)/Rloadeff
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
At non-inverting gains other than G = +1, keep Rg below
1kΩ to minimize peaking; thus, for optimum response at a
gain of +2, a feedback resistor of 1kΩ is recommended.
Figure 5 illustrates the AD8052LV frequency response
with both 1kΩ and 2kΩ feedback resistors.
1.5
SOIC-8
1
0.5
0
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Figure 6. Maximum Power Derating
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11
Data Sheet
Increased phase delay at the output due to capacitive loading
can cause ringing, peaking in the frequency response, and
+
Rs
-
Time (20ns/div)
Output
CL
Rf
Output
®
Input
RL = 2kΩ
Vin =2Vpp
G=5
Rf = 1kΩ
Input
RL
Figure 8. Overdrive Recovery
Rg
Layout Considerations
Figure 7. Addition of RS for Driving Capacitive Loads
Table 1 provides the recommended RS for various capacitive
loads. The recommended RS values result in approximately
<1dB peaking in the frequency response.
General layout and supply bypassing play major roles in
high frequency performance. CADEKA has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
▪▪Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
CL (pF)
RS (Ω)
-3dB BW (kHz)
10pF
0
100
20pF
20
94
50pF
33
72
100pF
25
58
Table 1: Recommended RS vs. CL
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of
additional overshoot and ringing.
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for
the amplifier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The AD8052LV will typically recover in less
than 20ns from an overdrive condition. Figure 8 shows the
AD8052LV in an overdriven condition.
©2011 CADEKA Microcircuits LLC ▪▪Place the 6.8µF capacitor within 0.75 inches of the power pin
▪▪Place the 0.1µF capacitor within 0.1 inches of the power pin
▪▪Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
▪▪Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more
information.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Evaluation Board #
CEB006
CEB010
Products
AD8052LV in SOIC
AD8052LV in MSOP
www.cadeka.com
12
Rev 1A
Overdrive Recovery
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
possible unstable behavior. Use a series resistance, RS,
between the amplifier and the load to help improve stability
and settling performance. Refer to Figure 7.
Input Voltage (0.5V/div)
Driving Capacitive Loads
Data Sheet
Evaluation Board Schematics
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
Evaluation board schematics and layouts are shown in
Figures 9-13. These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a
single-supply application:
1. Short -Vs to ground.
®
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Figure 11. CEB006 Bottom View
Figure 12. CEB010 Top View
Figure 10. CEB006 Top View
Figure 13. CEB010 Bottom View
Rev 1A
Figure 9. CEB006 & CEB010 Schematic
©2011 CADEKA Microcircuits LLC www.cadeka.com
13
Data Sheet
Mechanical Dimensions
SOIC-8 Package
®
Comlinear AD8052LV Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifier
MSOP-8 Package
3.00±0.10
(0.45)
0.65
A
B
(1.30)
(5.50) (4.20)
4.90±0.15
3.00±0.10
PIN #1 ID
QUADRANT
LAND PATTERN RECOMMENDATION
SEE DETAIL A
TOP VIEW
1.10MAX
0.65
0.150
0.050
0.380 C
0.270
SIDE VIEW
0.10
0.23
0.13
12° TOP & BOTTOM
A B C
Gauge
Plane
Seating
Plane
0.25
0.70
0.40
0.95
DETAIL A
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
CADEKA, the CADEKA logo design, Comlinear, and the Comlinear logo design are trademarks or registered trademarks of CADEKA
Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2011 by CADEKA Microcircuits LLC. All rights reserved.
8°
0°
Rev 1A
NOTES:
A. CONFORMS TO JEDEC MO-187
B, DIMENSIONS ARE IN MM
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONS AND TOLERANCES ARE PER
ASME Y14.5M, 1994
E LANDPATTERN AS PER IPC7351 #TSOP65P490X110-8BL
MKT-MUA08AREVB
END VIEW
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