ETC AD8608ARN

a
Precision Low Noise CMOS Rail-to-Rail
Input/Output Operational Amplifiers
AD8605/AD8606/AD8608*
FEATURES
Low Offset Voltage: 65 V Max
Low Input Bias Currents: 1 pA Max
Low Noise: 8 nV/√Hz
Wide Bandwidth: 10 MHz
High Open-Loop Gain: 120 dB
Unity Gain Stable
Single-Supply Operation: 2.7 V to 6 V
FUNCTIONAL BLOCK DIAGRAMS
OUT
1
V–
2
5 V+
AD8605
4 IN
+IN 3
APPLICATIONS
Photodiode Amplification
Battery-Powered Instrumentation
Multipole Filters
Sensors
Barcode Scanners
Audio
GENERAL DESCRIPTION
The AD8605, AD8606, and AD8608 are single, dual, and quad
rail-to-rail input and output, single-supply amplifiers that feature
very low offset voltage, low input voltage and current noise, and
wide signal bandwidth. They use Analog Devices’ patented
DigiTrim® trimming technique, which achieves superior precision
without laser trimming.
The combination of low offsets, low noise, very low input bias
currents, and high speed makes these amplifiers useful in a
wide variety of applications. Filters, integrators, photodiode
amplifiers, and high impedance sensors all benefit from the
combination of performance features. Audio and other ac
applications benefit from the wide bandwidth and low distortion.
Applications for these amplifiers include optical control loops,
portable and loop-powered instrumentation, and audio amplification for portable devices.
14-Lead TSSOP
(RU Suffix)
5-Lead SOT-23
(RT Suffix)
8-Lead MSOP
(RM Suffix)
1
OUT A
IN A
IN A
V
8
V+
OUT B
–IN B
+IN B
AD8606
4
5
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
AD8608
OUT A 1
IN A 2
8
7
14-Lead SOIC
(RN Suffix)
OUT A 1
14
OUT D
IN A 2
13
IN D
IN A 3
12
IN D
11
V
IN B 5
10
IN C
IN B 6
9
IN C
OUT B 7
8
OUT C
V 4
8-Lead SOIC
(RN Suffix)
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
14
AD8608
8 V+
AD8606
7 OUT B
+IN A 3
6 –IN B
V 4
5 +IN B
The AD8605, AD8606, and AD8608 are specified over the
extended industrial (–40°C to +125°C) temperature range. The
AD8605 single is available in the tiny 5-lead SOT-23 package. The
AD8606 dual is available in an 8-lead MSOP and a narrow SOIC
surface-mount package. The AD8608 quad is available in a 14-lead
TSSOP and a narrow 14-lead SOIC package. SOT, MSOP, and
TSSOP versions are available in tape and reel only.
*Protected by U.S.Patent No. 5,969,657; other patents pending.
DigiTrim is a registered trademark of Analog Devices, Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
AD8605/AD8606/AD8608–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
INPUT CHARACTERISTICS
Offset Voltage
AD8605/AD8606
AD8608
Input Bias Current
AD8605/AD8606
AD8605/AD8606
AD8608
AD8608
Input Offset Current
(@ VS = 5 V, VCM = VS/2, TA = 25C, unless otherwise noted.)
Symbol
Conditions
Min
Typ
Max
Unit
20
20
80
65
75
300
750
1
50
250
100
300
0.5
20
75
5
µV
µV
µV
µV
pA
pA
pA
pA
pA
pA
pA
pA
V
dB
dB
V/mV
4.5
6.0
µV/°C
µV/°C
VOS
VS = 3.5 V, VCM = 3 V
VS = 3.5 V, VCM = 2.7 V
VS = 5 V, VCM = 0 V to 5 V
–40°C < TA < +125°C
IB
0.2
–40°C < TA < +85°C
–40°C < TA < +125°C
–40°C < TA < +85°C
–40°C < TA < +125°C
0.1
IOS
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift
AD8605/AD8606
AD8608
∆VOS/∆T
∆VOS/∆T
VCM = 0 V to 5 V
–40°C < TA < +125°C
VO = 0.5 V to 4.5 V
RL = 2 kΩ, VCM = 0 V
0
85
75
300
1
1.5
INPUT CAPACITANCE
Common-Mode Input Capacitance
Differential Input Capacitance
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
Output Voltage Low
VOL
Output Current
Closed-Loop Output Impedance
IOUT
ZOUT
POWER SUPPLY
Power Supply Rejection Ratio
AD8605/AD8606
AD8608
Supply Current/Amplifier
100
90
1,000
IL = 1 mA
IL = 10 mA
–40°C < TA < +125°C
IL = 1 mA
IL = 10 mA
–40°C < TA < +125°C
4.96
4.7
4.6
8.8
2.59
pF
pF
4.98
4.79
V
V
V
mV
mV
mV
mA
Ω
20
170
40
210
290
± 80
10
f = 1 MHz, AV = 1
PSRR
ISY
VS = 2.7 V to 5.5 V
VS = 2.7 V to 5.5 V
–40°C < TA < +125°C
VO = 0 V
–40°C < TA < +125°C
80
77
70
95
92
90
1
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Full Power Bandwidth
Gain Bandwidth Product
Phase Margin
SR
tS
BWP
GBP
∅O
RL = 2 kΩ
To 0.01%, 0 V to 2 V step
< 1% Distortion
5
<1
360
10
65
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
Voltage Noise Density
Current Noise Density
en p-p
en
en
in
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
2.3
8
6.5
0.01
–2–
1.2
1.4
dB
dB
dB
mA
mA
V/µs
µs
kHz
MHz
Degrees
3.5
12
µV p-p
nV/√Hz
nV/√Hz
pA/√Hz
REV. A
AD8605/AD8606/AD8608
ELECTRICAL CHARACTERISTICS
Parameter
INPUT CHARACTERISTICS
Offset Voltage
AD8605/AD8606
AD8608
Input Bias Current
AD8605/AD8606
AD8605/AD8606
AD8608
AD8608
Input Offset Current
(@ VS = 2.7 V, VCM = VS/2, TA = 25C, unless otherwise noted.)
Symbol
Conditions
Min
Typ
Max
Unit
20
20
80
65
75
300
750
1
50
250
100
300
0.5
20
75
2.7
µV
µV
µV
µV
pA
pA
pA
pA
pA
pA
pA
pA
V
dB
dB
V/mV
4.5
6.0
µV/°C
µV/°C
VOS
VS = 3.5 V, VCM = 3 V
VS = 3.5 V, VCM = 2.7 V
VS = 2.7 V, VCM = 0 V to 2.7 V
–40°C < TA < +125°C
0.2
IB
–40°C < TA < +85°C
–40°C < TA < +125°C
–40°C < TA < +85°C
–40°C < TA < +125°C
IOS
0.1
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
AD8605/AD8606
AD8608
CMRR
AVO
VCM = 0 V to 2.7 V
–40°C < TA < +125°C
RL = 2 kΩ, VO = 0.5 V to 2.2 V
0
80
70
110
∆VOS/∆T
∆VOS/∆T
1
1.5
INPUT CAPACITANCE
Common-Mode Input Capacitance
Differential Input Capacitance
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
Output Voltage Low
VOL
Output Current
Closed-Loop Output Impedance
IOUT
ZOUT
POWER SUPPLY
Power Supply Rejection Ratio
AD8605/AD8606
AD8608
Supply Current/Amplifier
95
85
350
IL = 1 mA
–40°C < TA < +125°C
IL = 1 mA
–40°C < TA < +125°C
2.6
2.6
8.8
2.59
pF
pF
2.66
V
V
mV
mV
mA
Ω
25
± 30
12
f = 1 MHz, AV = 1
PSRR
ISY
VS = 2.7 V to 5.5 V
VS = 2.7 V to 5.5 V
–40°C < TA < +125°C
VO = 0 V
–40°C < TA < +125°C
80
77
70
95
92
90
1.15
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
SR
tS
GBP
∅O
RL = 2 kΩ
To 0.01%, 0 V to 1 V step
5
< 0.5
9
50
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
Voltage Noise Density
Current Noise Density
en p-p
en
en
in
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
2.3
8
6.5
0.01
REV. A
40
50
–3–
1.4
1.5
dB
dB
dB
mA
mA
V/µs
µs
MHz
Degrees
3.5
12
µV p-p
nV/√Hz
nV/√Hz
pA/√Hz
AD8605/AD8606/AD8608
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Output Short-Circuit Duration
to GND . . . . . . . . . . . . . . . . . . . . Observe Derating Curves
Storage Temperature Range
RN, RT, RM, RU Packages . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AD8605/AD8606/AD8608 . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
RN, RT, RM, RU Packages . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Package Type
JA*
JC
Unit
5-Lead SOT-23 (RT)
8-Lead MSOP (RM)
8-Lead SOIC (RN)
14-Lead SOIC (RN)
14-Lead TSSOP (RU)
230
210
158
120
180
92
45
43
36
35
°C/W
°C/W
°C/W
°C/W
°C/W
*θJA is specified for worst-case conditions, i.e., θJA is specified for device in
socket for PDIP packages; θJA is specified for device soldered onto a circuit
board for surface-mount packages.
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
Branding
Information
AD8605ART
AD8606ARM
AD8606ARN
AD8608ARN
AD8608ARU
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
5-Lead SOT-23
8-Lead MSOP
8-Lead SOIC
14-Lead SOIC
14-Lead TSSOP
RT-5
RM-8
RN-8
RN-14
RU-14
B3A
B6A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8605/AD8606/AD8608 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. A
Typical Performance Characteristics–AD8605/AD8606/AD8608
300
VS = 5V
TA = 25C
VS = 5V
4000 TA = 25C
VCM = 0V TO 5V
3500
200
INPUT OFFSET VOLTAGE – V
NUMBER OF AMPLIFIERS
4500
3000
2500
2000
1500
1000
100
0
–100
–200
500
0
–300
–200
–100
0
100
OFFSET VOLTAGE – V
200
–300
300
COMMON-MODE VOLTAGE – V
TPC 1. Input Offset Voltage Distribution
TPC 4. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, 5 Wafer Lots, Including Process Skews)
360
24
320
INPUT BIAS CURRENT – pA
20
NUMBER OF AMPLIFIERS
VS = 2.5V
VS = 5V
TA = 40C TO +125C
VCM = 2.5V
16
12
8
280
240
AD8605/AD8606
200
160
AD8608
120
80
4
40
0
0
0
0.4 0.8
1.2 1.6
2.0 2.4 2.8 3.2
TCVOS – V/C
3.6 4.0
0
4.4 4.8
TPC 2. AD8608 Input Offset Voltage Drift Distribution
25
50
75
TEMPERATURE – C
100
125
TPC 5. Input Bias Current vs. Temperature
1k
20
VS = 5V
TA = 40C TO +125C
VCM = 2.5V
18
16
VS = 5V
TA = 25C
VSY—VOUT – mV
NUMBER OF AMPLIFIERS
100
14
12
10
8
10
SOURCE
SINK
6
1
4
2
0.1
0
0
0.001
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
TCVOS – V/C
TPC 3. AD8605/AD8606 Input Offset Voltage
Drift Distribution
REV. A
0.01
0.1
LOAD CURRENT – mA
1
10
TPC 6. Output Voltage to Supply Rail vs. Load Current
–5–
AD8605/AD8606/AD8608
6
5.000
VS = 5V
VOH @ 1mA LOAD
5
OUTPUT SWING – V p-p
OUTPUT VOLTAGE – V
4.950
4.900
4.850
4.800
VS = 5V
VIN = 4.9V p-p
TA = 25C
RL = 2k
AV = 1
4
3
2
VOH @ 10mA LOAD
4.750
1
4.700
40 25 10
5
20
35
50
65
TEMPERATURE – C
80
95
110
0
1k
125
TPC 7. Output Voltage Swing vs. Temperature
10M
1M
100
VS = 2.5V
VS = 5V
90
VOL @ 10mA LOAD
80
OUTPUT IMPEDANCE – 0.200
0.150
0.100
70
AV = 100
60
50
AV = 10
40
AV = 1
30
20
0.050
VOL @ 1mA LOAD
0
40 25 10
5
20
35
50
65
TEMPERATURE – C
80
95
10
110
0
1k
125
VS = 2.5V
RL = 2k
CL = 20pF
M = 64
80
60
225
120
180
110
135
100
40
90
20
45
0
0
70
60
–40
–90
50
–60
–135
40
–80
–180
30
–225
100M
20
1M
FREQUENCY – Hz
10M
100M
80
–45
100k
10M
90
–20
–100
10k
100k
1M
FREQUENCY – Hz
VS = 2.5
CMRR – dB
100
10k
TPC 11. Output Impedance vs. Frequency
TPC 8. Output Voltage Swing vs. Temperature
PHASE – Degrees
OUTPUT VOLTAGE – V
100k
FREQUENCY – Hz
TPC 10. Closed-Loop Output Voltage Swing
0.250
GAIN – dB
10k
1k
10k
100k
1M
FREQUENCY – Hz
10M
TPC 12. Common-Mode Rejection Ratio vs. Frequency
TPC 9. Open-Loop Gain and Phase vs. Frequency
–6–
REV. A
AD8605/AD8606/AD8608
140
1.0
VS = 5V
120
SUPPLY CURRENT/AMPLIFIER – mA
0.9
100
80
PSRR – dB
60
40
20
0
–20
0.8
0.7
0.6
0.5
0.4
0.3
0.2
–40
0.1
–60
1k
100k
FREQUENCY – Hz
10k
1M
0
10M
0
TPC 13. PSRR vs. Frequency
0.5
1.0
1.5
2.0
2.5
3.0
3.5
SUPPLY VOLTAGE – V
4.0
4.5
5.0
TPC 16. Supply Current vs. Supply Voltage
45
35
VS = 5V
RL =
TA = 25C
AV = 1
VS = 5V
VOLTAGE NOISE – 1V/DIV
SMALL SIGNAL OVERSHOOT – %
40
30
+OS
25
20
–OS
15
10
5
0
10
100
CAPACITANCE – pF
0
1k
0
TPC 14. Small Signal Overshoot vs. Load Capacitance
0
0
0
0
TIME – 1s/DIV
0
0
0
0
0
VS = 2.5V
RL = 10k
CL = 200pF
AV = 1
0
1.5
VS = 2.7V
1.0
0
VOLTAGE – 50mV/DIV
SUPPLY CURRENT/AMPLIFIER – mA
0
TPC 17. 0.1 Hz to 10 Hz Input Voltage Noise
2.0
VS = 5V
0.5
0
–0.5
–1.5
40 25 10
0
0
0
0
–1.0
0
0
5
20
35
50
65
TEMPERATURE – C
80
95
110
0
125
TPC 15. Supply Current vs. Temperature
REV. A
0
0
0
0
0
0
0
TIME – 200ns/DIV
0
0
0
TPC 18. Small Signal Transient Response
–7–
0
AD8605/AD8606/AD8608
36
0
VS = 2.5V
RL = 10k
CL = 200pF
AV = 1
VOLTAGE – 1V/DIV
0
VS = 2.5V
VOLTAGE NOISE DENSITY – nV/ Hz
0
0
0
0
0
0
32
28
24
20
16
12
8
0
4
0
0
0
0
0
0
0
TIME – 400ns/DIV
0
0
0
0
0
TPC 19. Large Signal Transient Response
0.3
0.4
0.5
0.6
0.7
FREQUENCY – kHz
0.8
0.9
1
9
10
90
100
53.6
VS = 2.5V
VS = 2.5V
RL = 10k
AV = 100
VIN = 50mV
+2.5V
0
VOLTAGE NOISE DENSITY – nV/ Hz
0
VOLTAGE – V
0.2
TPC 22. Voltage Noise Density
0
0V0
0V0
0
0
–50mV
48.9
40.2
33.5
26.8
20.1
13.4
6.7
0
0
0
0
0
0
0
0
0
0
TIME – 400ns/DIV
0
0
0
0
0
TPC 20. Negative Overload Recovery
1
2
3
4
5
6
FREQUENCY – kHz
7
8
TPC 23. Voltage Noise Density
119.2
0
VS = 2.5V
0
VOLTAGE NOISE DENSITY – nV/ Hz
VS = 2.5V
RL = 10k
AV = 100
VIN = 50mV
0
–2.5V
VOLTAGE – V
0.1
0V
0
0V
0
0
0
+50mV
104.3
89.4
74.5
0
59.6
44.7
29.8
14.9
0
0
0
0
0
0
0
0
0
0
0
TIME – 1s/DIV
0
0
0
0
0
TPC 21. Positive Overload Recovery
10
20
30
40
50
60
FREQUENCY – Hz
70
80
TPC 24. Voltage Noise Density
–8–
REV. A
AD8605/AD8606/AD8608
1800
2.680
VS = 2.7V
2.675
OUTPUT VOLTAGE – V
NUMBER OF AMPLIFIERS
VS = 2.7V
1600 TA = 25C
VCM = 0V TO 2.7V
1400
1200
1000
800
600
2.670
2.665
VOH @ 1mA LOAD
2.660
400
2.655
200
0
–300
–200
–100
0
100
OFFSET VOLTAGE – V
200
2.650
40 25 10
300
TPC 25. Input Offset Voltage Distribution
5
20
35
50
65
TEMPERATURE – C
80
95
110
125
TPC 28. Output Voltage Swing vs. Temperature
0.045
300
VS = 2.7V
VS = 2.7V
TA = 25C
0.040
0.035
OUTPUT VOLTAGE – V
INPUT OFFSET VOLTAGE – V
200
100
0
–100
0.030
VOL @ 1mA LOAD
0.025
0.020
0.015
0.010
–200
0.005
0
0.9
1.8
COMMON-MODE VOLTAGE – V
0
40 25 10
2.7
TPC 26. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, 5 Wafer Lots, Including Process Skews)
5
20
35
50
65
TEMPERATURE – C
80
125
100
VS = 2.7V
TA = 25C
225
VS = 1.35V
RL = 2k
CL = 20pF
M = 52.5
80
60
100
GAIN – dB
OUTPUT VOLTAGE – mV
110
TPC 29. Output Voltage Swing vs. Temperature
1k
SOURCE
10
180
135
40
90
20
45
0
0
–20
–45
–40
–90
–60
–135
–80
–180
SINK
1
0.1
0.001
0.01
0.1
LOAD CURRENT – mA
1
–100
10k
10
TPC 27. Output Voltage to Supply Rail vs. Load Current
REV. A
95
PHASE – Degrees
–300
0
0
100k
1M
FREQUENCY – Hz
10M
–225
100M
TPC 30. Open-Loop Gain and Phase vs. Frequency
–9–
AD8605/AD8606/AD8608
3.0
VS = 2.7V
VS = 2.7V
VIN = 2.6V p-p
TA = 25C
RL = 2k
AV = 1
2.0
VOLTAGE NOISE – 1V/DIV
OUTPUT SWING – V p-p
2.5
1.5
1.0
0.5
0
1k
10k
100k
FREQUENCY – Hz
1M
0
10M
0
TPC 31. Closed-Loop Output Voltage Swing vs. Frequency
0
0
0
0
0
TIME – 1s/DIV
0
0
0
0
TPC 34. 0.1 Hz to 10 Hz Input Voltage Noise
0
100
VS = 1.35V
90
VS = 1.35V
RL = 10k
CL = 200pF
AV = 1
0
80
0
VOLTAGE – 50mV/DIV
OUTPUT IMPEDANCE – 0
70
AV = 100
60
50
AV = 10
40
AV = 1
30
0
0
0
0
20
0
10
0
1k
0
10k
100k
1M
FREQUENCY – Hz
10M
100M
0
TPC 32. Output Impedance vs. Frequency
0
0
0
0
TIME – 200ns/DIV
0
0
0
0
0
VS = 2.7V
TA = 25C
AV = 1
VS = 1.35V
RL = 10k
CL = 200pF
AV = 1
0
0
VOLTAGE – 1V/DIV
SMALL SIGNAL OVERSHOOT – %
0
TPC 35. Small Signal Transient Response
60
50
0
40
–OS
30
+OS
20
0
0
0
0
10
0
0
10
100
CAPACITANCE – pF
0
1k
0
TPC 33. Small Signal Overshoot vs. Load Capacitance
0
0
0
0
0
0
TIME – 400ns/DIV
0
0
0
0
TPC 36. Large Signal Transient Response
–10–
REV. A
AD8605/AD8606/AD8608
2.0
Output Phase Reversal
Phase reversal is defined as a change in polarity at the output of
the amplifier when a voltage that exceeds the maximum input
common-mode voltage drives the input.
1.8
SOIC-14
POWER DISSIPATION – W
1.6
Phase reversal can cause permanent damage to the amplifier; it
may also cause system lockups in feedback loops. The AD8605
does not exhibit phase reversal even for inputs exceeding the
supply voltage by more than 2 V.
0
VS = 2.5V
VIN = 6V p-p
AV = 1
RL = 10k
0
SOIC-8
1.2
1.0
0.8
SOT23
0.6
TSSOP
0.4
VOUT
MSOP
0.2
0
VOLTAGE – 2V/DIV
1.4
0
0
40
60
TEMPERATURE – C
20
0
VIN
0
80
100
Figure 2. Maximum Power Dissipation vs. Temperature
Input Overvoltage Protection
0
The AD8605 has internal protective circuitry. However, if the
voltage applied at either input exceeds the supplies by more than
2.5 V, external resistors should be placed in series with the inputs.
The resistor values can be determined according to the formula:
0
0
(VIN −VS )
0
0
0
0
0
0
0
0
TIME – 4s/DIV
0
0
0
0
(RS + 200Ω)
Figure 1. No Phase Reversal
Maximum Power Dissipation
Power dissipated in an IC will cause the die temperature to increase.
This can affect the behavior of the IC and the application circuit
performance.
The absolute maximum junction temperature of the AD8605/
AD8606/AD8608 is 150°C.
Exceeding this temperature could cause damage or destruction of
the device.
The maximum power dissipation of the amplifier is calculated
according to the following formula:
PDISS =
(TA − TC )
θ JA − θ JC
≤ 5 mA
The remarkable low input offset current of the AD8605 (<1 pA)
allows the use of larger value resistors. With a 10 kΩ resistor at
the input, the output voltage will have less than 10 nV of error
voltage. A 10 kΩ resistor has less than 13 nV/√Hz of thermal noise
at room temperature.
THD + Noise
Total harmonic distortion is the ratio of the input signal in V rms to
the total harmonics in V rms throughout the spectrum. Harmonic
distortion adds errors to precision measurements and adds
unpleasant sonic artifacts to audio systems.
The AD8605 has a low total harmonic distortion. Figure 3 shows
that the AD8605 has less than 0.005% or –86 dB of THD + N over
the entire audio frequency range. The AD8605 is configured in
positive unity gain, which is the worst case, and with a load of 10 kΩ.
where:
0.1
VSY = 2.5V
AV = 1
BW = 22kHz
TA = ambient temperature
TC = case temperature (device)
θJC = junction to case thermal resistance
θJA = junction to ambient thermal resistance
0.01
THD + N – %
Figure 2 shows the maximum power dissipation versus the temperature for the various packages available for the AD8605 family.
0.001
0.0001
20
100
1k
FREQUENCY – Hz
Figure 3. THD + N
REV. A
–11–
10k
20k
AD8605/AD8606/AD8608
Total Noise Including Source Resistors
Capacitive Load Drive
The low input current noise and input bias current of the AD8605
make it the ideal amplifier for circuits with substantial input source
resistance such as photodiodes. Input offset voltage increases by less
than 0.5 nV per 1 kΩ of source resistance at room temperature,
increasing to 10 nV at 85°C.
The AD8605 is capable of driving large capacitive loads without
oscillation.
The total noise density of the circuit is:
In this case, the amplifier was configured in positive unity gain,
worst case for stability, while driving a 1,000 pF load at its output.
Driving larger capacitive loads in unity gain may require the use
of additional circuitry.
en,TOTAL = en + (in RS ) + 4kTRS
2
2
Figure 5 shows the output of the AD8606 in response to a 200 mV
input signal.
A snubber network, shown in Figure 7, helps reduce the signal
overshoot to a minimum and maintain stability. Although this
circuit does not recover the loss of bandwidth induced by large
capacitive loads, it greatly reduces the overshoot and ringing.
Where:
en is the input voltage noise density of the AD8605
in is the input current noise density of the AD8605
RS is the source resistance at the noninverting terminal
-k is Boltzman’s constant (1.38 ⫻ 10–23 J/K)
T is the ambient temperature in Kelvin (T = 273 + °C)
This method does not reduce the maximum output swing of the
amplifier.
For example with RS = 10 kΩ, the total voltage noise density is
roughly 15 nV/√Hz.
Figure 6 shows a scope photograph of the output at the
snubber circuit.
For RS < 3.9 kΩ, en dominates and en,total ≈ en.
The overshoot is reduced from over 70% to less than 5%, and
the ringing is eliminated by the snubber.
The current noise of the AD8605 is so low that its total density
does not become a significant term unless RS is greater than 6 MΩ.
The total equivalent rms noise over a specific bandwidth is
expressed as:
(
E n = e n,TOTAL
)
Optimum values for RS and CS are determined experimentally.
Table I summarizes a few starting values.
An alternate technique is to insert a series resistor inside the feedback
loop at the output of the amplifier. Typically, the value of this resistor is approximately 100 Ω. This method also reduces overshoot
and ringing but causes a reduction in the maximum output swing.
BW
where BW is the bandwidth in Hertz.
NOTE: The above analysis is valid for frequencies larger than
100 Hz and assumes relatively flat noise, above 10 kHz. For lower
frequencies, flicker noise (1/f) must be considered.
Channel Separation
0
VS = 2.5V
AV = 1
RL = 10k
CL = 1,000pF
0
VOLTAGE – 100mV/DIV
0
Channel separation, or inversely crosstalk, is a measure of the signal
feed from one amplifier (channel) to the other on the same IC.
The AD8606 has a channel separation of greater than –160 dB up
to frequencies of 1 MHz, allowing the two amplifiers to amplify ac
signals independently in most applications.
0
0
0
0
0
0
CHANNEL SEPARATION – dB
–20
0
–40
0
–60
0
0
0
0
0
0
TIME – 10s/DIV
0
0
0
0
Figure 5. Capacitive Load Drive without Snubber
–80
–100
–120
–140
–160
–180
100
1k
10k
100k
1M
FREQUENCY – Hz
10M
100M
Figure 4. Channel Separation vs. Frequency
–12–
REV. A
AD8605/AD8606/AD8608
0
0
0
VOLTAGE – 100mV/DIV
The offset voltage causes a dark current induced by the shunt
resistance of the diode, RD. These error terms are combined at
the output of the amplifier and the error voltage is written:
VS = 2.5V
AV = 1
RL = 10k
RS = 90
CL = 1,000pF
CS = 700pF
 1 + RF 
E O = VOS 
 + RF I B
 RD 
0
0
Typically, RF is much smaller than RD and RD can be ignored.
0
At room temperature, the AD8605 has an input bias current of
0.2 pA and an offset voltage of 100 µV. Typical values of RD are
in the range of 10 GΩ.
0
0
For the circuit shown in Figure 8, the output error voltage is
approximately 100 µV at room temperature, increasing to about
1 mV at 85°C.
0
0
0
0
0
0
0
0
TIME – 10s/DIV
0
0
0
0
The maximum achievable signal bandwidth is:
Figure 6. Capacitive Load Drive with Snubber
Where ft is the unity gain frequency of the amplifier.
4
2
200mV
VIN
3
ft
2πRF CT
f MAX =
V–
AD8605
Audio and PDA Applications
1
RS
8
RL
CL
CS
Figure 9 shows a typical application circuit for headphone/line out
amplification.
V+
Figure 7. Snubber Network Configuration
R1 and R2 are used to bias the input voltage at half the supply.
This maximizes the signal bandwidth range. C1 and C2 are used
to ac-couple the input signal. C1 and R2 form a high-pass filter
whose corner frequency is 1/2␲R1C1.
Table I. Optimum Values for Capacitive Loads
CL (pF)
RS ()
CS (pF)
500
1,000
2,000
100
70
60
1,000
1,000
800
The AD8605’s low distortion and wide dynamic range make it a
great choice for audio and PDA applications, including microphone
amplification and line output buffering.
The high output current of the AD8605 allows it to drive heavy
resistive loads.
The circuit of Figure 9 was tested to drive a 16 Ω headphone. The
THD + N is maintained at approximately –60 dB throughout the
audio range.
I-V CONVERSION APPLICATIONS
Photodiode Preamplifier Application
The low offset voltage and input current of the AD8605 make it
an excellent choice for photodiode applications. In addition, the
low voltage and current noise make the amplifier ideal for application circuits with high sensitivity.
5V
C1
1F
R1
10k
R2
V1
500mV 10k
CF
10pF
8
3
1/2
AD8606
C3
100F
1
R3 HEADPHONES
1k
2
RF
10M
R4
20
4
V–
PHOTODIODE
RD
ID
VOS
CD
50pF
ID
5V
AD8605
VOUT
C2
1F
V2
500mV
Figure 8. Equivalent Circuit for Photodiode Preamp
8
5
1/2
AD8606
R6
20
7
R5
1k
6
4
The input bias current of the amplifier contributes an error term
that is proportional to the value of RF.
C4
100F
V–
Figure 9. Single-Supply Headphone/Speaker Amplifier
REV. A
–13–
AD8605/AD8606/AD8608
The DAC8143 output current is converted to a voltage by the
feedback resistor. The equivalent resistance at the output of the
DAC varies with the input code, as does the output capacitance.
Instrumentation Amplifiers
The low offset voltage and low noise of the AD8605 make it a
great amplifier for instrumentation applications.
Difference amplifiers are widely used in high accuracy circuits to
improve the common-mode rejection ratio.
Figure 9 shows a simple difference amplifier. The CMRR of the
circuit is plotted versus frequency. Figure 10 shows the commonmode rejection for a unity gain configuration and for a gain of 10.
Making (R4/R3) = (R2/R1) and choosing 0.01% tolerance yields
a CMRR of 74 dB and minimizes the gain error at the output.
To optimize the performance of the DAC, insert a capacitor in
the feedback loop of the AD8605 to compensate the amplifier from
the pole introduced by the output capacitance of the DAC. Typical
values for CF are in the range of 10 pF to 30 pF; it can be adjusted
for the best frequency response. The total error at the output of
the op amp can be computed by the formula:
 1 + RF 
EO = VOS 

 Req 
120
VSY = –2.5V
AV = 1
80
CMRR – Hz
where Req is the equivalent resistance seen at the output of the
DAC. As mentioned above, Req is code dependant and varies
with the input. A typical value for Req is 15 kΩ. Choosing a
feedback resistor of 10 kΩ yields an error of less than 200 µV.
AV = 10
100
Figure 12 shows the implementation of a dual-stage buffer at
the output of a DAC.
60
The first stage is used as a buffer. Capacitor C1, with Req, creates
a low-pass filter and thus provides phase lead to compensate for
frequency response. The second stage of the AD8606 is used to
provide voltage gain at the output of the buffer.
40
20
0
100
10k
100k
FREQUENCY – Hz
1k
1M
Grounding the positive input terminals in both stages reduces errors
due to the common-mode output voltage. Choosing R1, R2, and
R3 to match within 0.01% yields a CMRR of 74 dB and maintains
minimum gain error in the circuit.
10M
Figure 10. Difference Amplifier CMRR vs. Frequency
D/A Conversion
The low input bias current and offset voltage of the AD8605
make it an excellent choice for buffering the output of a current
output DAC.
RCS
15V
R3
20k
R2
20k
C1
33pF
Figure 11 shows a typical implementation of the AD8605 at the
output of a 12-bit DAC.
VDD
RFB
R1
10k
OUT1
VOUT
VREF
R
R
VIN
R
RP
AGND
DB11
VREF
CF
AD7545
RFB
R2
R2
R2
V–
1/2
AD8606
1/2
AD8606
R4
5k
10%
Figure 12. Bipolar Operation
AD8605
VOS
V+
Figure 11. Simplified Circuit of the DAC 8143 with AD8605
Output Buffer
–14–
REV. A
AD8605/AD8606/AD8608
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(RN-8)
5-Lead Plastic Surface-Mount Package [SOT-23]
(RT-5)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
2.90 BSC
5.00 (0.1968)
4.80 (0.1890)
5
4
2.80 BSC
1.60 BSC
1
2
4.00 (0.1574)
3.80 (0.1497)
3
8
5
1
4
6.20 (0.2440)
5.80 (0.2284)
PIN 1
0.95 BSC
1.27 (0.0500)
BSC
1.90
BSC
1.30
1.15
0.90
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
SEATING
0.10
PLANE
1.45 MAX
0.15 MAX
0.50
0.30
SEATING
PLANE
10
0
0.22
0.08
0.50 (0.0196)
45
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.33 (0.0130)
8
0.25 (0.0098) 0 1.27 (0.0500)
0.41 (0.0160)
0.19 (0.0075)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178AA
8-Lead MSOP Package [MSOP]
(RM-8)
14-Lead Standard Small Outline Package [SOIC]
Narrow Body
(RN-14)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
3.00
BSC
8
8.75 (0.3445)
8.55 (0.3366)
5
4.90
BSC
3.00
BSC
1
4.00 (0.1575)
3.80 (0.1496)
14
8
1
7
PIN 1
0.65 BSC
0.25 (0.0098)
0.10 (0.0039)
1.75 (0.0689)
1.35 (0.0531)
1.27 (0.0500)
BSC
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.80
0.40
8
0
0.23
0.08
COPLANARITY
0.10
0.51 (0.0201)
0.33 (0.0130)
14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
5.10
5.00
4.90
14
8
4.50
4.40
4.30
6.40
BSC
1
7
PIN 1
1.05
1.00
0.80
SEATING
PLANE
0.50 (0.0197)
45
0.25 (0.0098)
8
0.25 (0.0098) 0 1.27 (0.0500)
0.40 (0.0157)
0.19 (0.0075)
COMPLIANT TO JEDEC STANDARDS MS-012AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
0.65
BSC
1.20
MAX
0.15
0.05
0.30
0.19
0.20
0.09
SEATING COPLANARITY
PLANE
0.10
8
0
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
REV. A
6.20 (0.2441)
5.80 (0.2283)
4
–15–
0.75
0.60
0.45
AD8605/AD8606/AD8608
Revision History
Location
Page
11/02—Data Sheet changed from REV. 0 to REV. A.
Update Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Update Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edit to TPC 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
PRINTED IN U.S.A.
Update OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
C02731–0–11/02(A)
Change to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
–16–
REV. A