AD AD9631ARZ Ultralow distortion, wide bandwidth voltage feedback op amp Datasheet

FEATURES
Wide Bandwidth
AD9631, G = +1
AD9632, G = +2
Small Signal
320 MHz
250 MHz
Large Signal (4 V p-p)
175 MHz
180 MHz
Ultralow Distortion (SFDR), Low Noise
–113 dBc Typ @ 1 MHz
–95 dBc Typ @ 5 MHz
–72 dBc Typ @ 20 MHz
46 dBm Third Order Intercept @ 25 MHz
7.0 nV/÷Hz Spectral Noise Density
High Speed
Slew Rate 1300 V/s
Settling 16 ns to 0.01%, 2 V Step
3 V to 5 V Supply Operation
17 mA Supply Current
APPLICATIONS
ADC Input Driver
Differential Amplifiers
IF/RF Amplifiers
Pulse Amplifiers
Professional Video
DAC Current to Voltage
Baseband and Video Communications
Pin Diode Receivers
Active Filters/Integrators/Log Amps
GENERAL DESCRIPTION
The AD9631 and AD9632 are very high speed and wide bandwidth amplifiers. They are an improved performance alternative
to the AD9621 and AD9622. The AD9631 is unity gain stable.
The AD9632 is stable at gains of 2 or greater. Using a voltage
feedback architecture, the AD9631/AD9632’s exceptional settling
time, bandwidth, and low distortion meet the requirements of
many applications that previously depended on current feedback
amplifiers. Its classical op amp structure works much more
predictably in many designs.
PIN CONFIGURATION
8-Lead PDIP (N)
and SOIC (R) Packages
NC 1
AD9631/
AD9632
8 NC
+VS
–INPUT
2
7
+INPUT
3
6 OUTPUT
–VS 4
TOP VIEW
5 NC
NC = NO CONNECT
A proprietary design architecture has produced an amplifier
that combines many of the best characteristics of both current
feedback and voltage feedback amplifiers. The AD9631 and
AD9632 exhibit exceptionally fast and accurate pulse response
(16 ns to 0.01%) as well as extremely wide small signal and large
signal bandwidth and ultralow distortion. The AD9631 achieves
–72 dBc at 20 MHz, and 320 MHz small signal and 175 MHz
large signal bandwidths.
These characteristics position the AD9631/AD9632 ideally for
driving flash as well as high resolution ADCs. Additionally, the
balanced high impedance inputs of the voltage feedback architecture allow maximum flexibility when designing active filters.
The AD9631/AD9632 are offered in the industrial (–40C to
+85C) temperature range. They are available in PDIP and SOIC.
–30
HARMONIC DISTORTION – dBc
a
Ultralow Distortion, Wide Bandwidth
Voltage Feedback Op Amps
AD9631/AD9632
–50
VS = 5V
RL = 500
VO = 2V p-p
–70
–90
SECOND HARMONIC
–110
THIRD HARMONIC
–130
10k
100k
1M
FREQUENCY – Hz
10M
100M
Figure 1. AD9631 Harmonic Distortion vs.
Frequency, G = +1
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
AD9631/AD9632–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
DYNAMIC PERFORMANCE
Bandwidth (–3 dB)
Small Signal
Large Signal1
Bandwidth for 0.1 dB Flatness
Slew Rate, Average ±
Rise/Fall Time
Settling Time
To 0.1%
To 0.01%
HARMONIC/NOISE PERFORMANCE
Second Harmonic Distortion
Third Harmonic Distortion
Third Order Intercept
Noise Figure
Input Voltage Noise
Input Current Noise
Average Equivalent Integrated
Input Noise Voltage
Differential Gain Error (3.58 MHz)
Differential Phase Error (3.58 MHz)
Phase Nonlinearity
(ⴞVS = ⴞ5 V; RLOAD = 100 ⍀; AV = 1 (AD9631); AV = 2 (AD9632), unless otherwise noted.)
Conditions
VOUT ⱕ 0.4 V p-p
VOUT = 4 V p-p
VOUT = 300 mV p-p
AD9631, RF = 140 W;
AD9632, RF = 425 W
VOUT = 4 V Step
VOUT = 0.5 V Step
VOUT = 4 V Step
AD9631A
Min Typ Max
AD9632A
Min Typ Max
Unit
220
150
180
155
250
180
MHz
MHz
130
MHz
320
175
130
1000 1300
1.2
2.5
VOUT = 2 V Step
VOUT = 2 V Step
11
16
2 V p-p; 20 MHz, RL = 100 W
RL = 500 W
2 V p-p; 20 MHz, RL = 100 W
RL = 500 W
25 MHz
RS = 50 W
1 MHz to 200 MHz
1 MHz to 200 MHz
–64
–72
–76
–81
46
18
7.0
2.5
0.1 MHz to 200 MHz
RL = 150 W
RL = 150 W
DC to 100 MHz
100
0.03
0.02
1.1
500
1.2
± 3.4
kW
pF
V
± 3.2 ± 3.9
70
0.3
240
± 3.2 ± 3.9
70
0.3
240
V
mA
W
mA
± 3.0 ± 5.0 ± 6.0
17
18
21
50
60
± 3.0 ± 5.0 ± 6.0
16 17
20
56
66
V
mA
mA
dB
0.1
70
46
40
TMIN–TMAX
TMIN–TMAX
dBc
dBc
dBc
dBc
dBm
dB
nV/÷Hz
pA/÷Hz
500
1.2
± 3.4
TMIN–TMAX
Input Offset Current
Power Supply Rejection Ratio
–47
–65
–67
–74
± 10
2
7
10
0.1 3
5
90
52
± 10
2
POWER SUPPLY
Operating Range
Quiescent Current
–54
–72
–74
–81
41
14
4.3
2.0
mV
mV
mV/ⴗC
mA
mA
mA
mA
dB
dB
dB
Offset Voltage Drift
Input Bias Current
OUTPUT CHARACTERISTICS
Output Voltage Range, RL = 150 W
Output Current
Output Resistance
Short Circuit Current
–57
–65
–69
–74
ns
ns
2
3
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
11
16
mV rms
%
Degree
Degree
TMIN–TMAX
Common-Mode Rejection Ratio
Open-Loop Gain
V/ms
ns
ns
60
0.02 0.04
0.02 0.04
1.1
DC PERFORMANCE2, RL = 150 W
Input Offset Voltage3
TMIN–TMAX
VCM = ± 2.5 V
VOUT = ± 2.5 V
TMIN–TMAX
1200 1500
1.4
2.1
0.06
0.04
10
13
7
10
3
5
90
52
70
46
40
5
8
NOTES
1
See Absolute Maximum Ratings and Theory of Operation sections of this data sheet.
2
Measured at AV = 50.
3
Measured with respect to the inverting input.
Specifications subject to change without notice.
–2–
REV. C
AD9631/AD9632
ABSOLUTE MAXIMUM RATINGS 1
MAXIMUM POWER DISSIPATION
Supply Voltage (+VS to –VS) . . . . . . . . . . . . . . . . . . . . . 12.6 V
Voltage Swing ¥ Bandwidth Product . . . . . . . . . . . 550 V-MHz
Internal Power Dissipation2
Plastic Package (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . . 0.9 W
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 1.2 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range N, R . . . . . . . . . –65ⴗC to +125ⴗC
Operating Temperature Range (A Grade) . . . . –40ⴗC to +85ⴗC
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300ⴗC
The maximum power that can be safely dissipated by these
devices is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsulated
devices is determined by the glass transition temperature of the
plastic, approximately 150ⴗC. Exceeding this limit temporarily
may cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a junction temperature of 175ⴗC for an extended period can result in
device failure.
While the AD9631 and AD9632 are internally short circuit
protected, this may not be sufficient to guarantee that the maximum junction temperature (150ⴗC) is not exceeded under all
conditions. To ensure proper operation, it is necessary to observe
the maximum power derating curves.
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead PDIP Package: qJA = 90∞C/W
8-Lead SOIC Package: qJA = 140∞C/W
2.0
MAXIMUM POWER DISSIPATION – W
TJ = +150 C
METALLIZATION PHOTO
Dimensions shown in inches and (millimeters)
Connect Substrate to –V S
+VS
7
–IN
2
8-LEAD PDIP PACKAGE
1.5
1.0
8-LEAD SOIC PACKAGE
0.5
0
–50 –40 –30 –20 –10
0
10 20
30
40 50
60 70
80 90
AMBIENT TEMPERATURE – ⴗC
0.046
(1.17)
Figure 2. Maximum Power Dissipation
vs. Temperature
6
OUT
ORDERING GUIDE
3
+IN
0.050 (1.27)
–IN
2
Model
AD9631
4
–VS
AD9631AN
AD9631AR
AD9631AR-REEL
AD9631AR-REEL7
AD9631CHIPS
AD9632AN
AD9632AR
AD9632AR-REEL
AD9632AR-REEL7
+VS
7
0.046
(1.17)
6
OUT
3
+IN
4
–VS
Temperature
Range
Package
Package
Description Option
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
PDIP
SOIC
SOIC
SOIC
Die
PDIP
SOIC
SOIC
SOIC
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
AD9632
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD9631/AD9632 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. C
–3–
N-8
R-8
R-8
R-8
N-8
R-8
R-8
R-8
AD9631/AD9632–Typical Performance Characteristics
RF
RF
10F
+VS
0.1F
VIN
AD9631
VOUT
AD9631
RL = 100
0.1F
RT
49.9
267
RT
49.9
130
VIN
0.1F
TR /TF = 350ps
PULSE
GENERATOR
TR /TF = 350ps
10F
+VS
PULSE
GENERATOR
VOUT
RL = 100
0.1F
100
10F
10F
–VS
–VS
TPC 1. AD9631 Noninverting Configuration, G = +1
TPC 4. AD9631 Inverting Configuration, G = –1
1V
5ns
1V
TPC 2. AD9631 Large Signal Transient Response;
VO = 4 V p-p, G = +1, RF = 250 W
100mV
5ns
TPC 5. AD9631 Large Signal Transient Response;
VO = 4 V p-p, G = –1, RF = RIN = 267 W
5ns
100mV
TPC 3. AD9631 Small Signal Transient Response;
VO = 400 mV p-p, G = +1, RF = 140 W
5ns
TPC 6. AD9631 Small Signal Transient Response;
VO = 400 mV p-p, G = –1, RF = RIN = 267 W
–4–
REV. C
AD9631/AD9632
RF
RF
PULSE
GENERATOR
10F
+VS
0.1F
TR /TF = 350ps
TR /TF = 350ps
RIN
0.1F
R IN
VIN
AD9632
RT
49.9
VOUT
130
VIN
RL = 100
0.1F
10F
10F
–VS
TPC 7. AD9632 Noninverting Configuration, G = +2
TPC 10. AD9632 Inverting Configuration, G = –1
5ns
1V
5ns
TPC 11. AD9632 Large Signal Transient Response;
VO = 4 V p-p, G = –1, RF = RIN = 422 W, RT = 56.2 W
TPC 8. AD9632 Large Signal Transient Response;
VO = 4 V p-p, G = +2, RF = RIN = 422 W
100mV
5ns
5ns
TPC 12. AD9632 Small Signal Transient Response;
VO = 400 mV p-p, G = –1, RF = RIN = 267 W, RT = 61.9 W
TPC 9. AD9632 Small Signal Transient Response;
VO = 400 mV p-p, G = +2, RF = RIN = 274 W
REV. C
VOUT
100
–VS
100mV
AD9632
RL = 100
0.1F
RT
49.9
1V
10F
+VS
PULSE
GENERATOR
–5–
AD9631/AD9632
1
RF
150
0
GAIN – dB
–2
RF
200
RF
50
–3dB BANDWIDTH – MHz
–1
VS = 5V
RL = 100
VO = 300mV p-p
RF
100
–3
VS = 5V
RL = 100
GAIN = +1
450
–4
–5
–6
RF
AD9631
400
130
RL
N PACKAGE
350
300
–7
R PACKAGE
–8
250
–9
1M
10M
100M
FREQUENCY – Hz
20
1G
TPC 13. AD9631 Small Signal Frequency
Response, G = +1
–2
RF
100
–0.4
–0.5
–4
–5
–6
–0.7
–7
–0.8
–8
100M
–9
1M
500M
TPC 14. AD9631 0.1 dB Flatness, N Package
(for R Package Add 20 W to RF)
80
70
60
PHASE
60
40
50
20
40
0
–20
30
GAIN
20
–40
–3
–5
–6
–80
–7
–100
–8
100M
RF
267
–4
0
1M
10M
FREQUENCY – Hz
VS = 5V
RL = 100
VO = 300mV p-p
–2
–60
100k
500M
0
–1
10
–10
100M
1
GAIN – dB
100
80
10M
FREQUENCY – Hz
TPC 17. AD9631 Large Signal Frequency
Response, G = +1
PHASE MARGIN – Degrees
90
RF = 50 TO 250
BY 50
–3
–0.6
10M
FREQUENCY – Hz
VS = 5V
RL = 100
VO = 4V p-p
–1
RF
140
RF
120
–0.9
1M
GAIN – dB
240
RF
250
0
OUTPUT – dB
GAIN – dB
VS = 5V
RL = 100
G = +1
VO = 300mV p-p
–0.3
–20
10k
220
1
RF
150
0
–0.2
60
80 100 120 140 160 180 200
VALUE OF FEEDBACK RESISTOR ( RF) – TPC 16. AD9631 Small Signal –3 dB Bandwidth vs. RF
0.1
–0.1
40
–120
1G
–9
1M
TPC 15. AD9631 Open-Loop Gain and
Phase Margin vs. Frequency, RL = 100 W
10M
100M
FREQUENCY – Hz
1G
TPC 18. AD9631 Small Signal Frequency
Response, G = –1
–6–
REV. C
AD9631/AD9632
0.10
DIFF GAIN – %
–50
VS = 5V
RL = 500
G = +1
VO = 2V p-p
–70
0.00
–0.05
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
–90
SECOND
HARMONIC
THIRD
HARMONIC
–110
–130
10k
100k
1M
FREQUENCY – Hz
10M
0.05
0.00
–0.05
–0.10
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
TPC 22. AD9631 Differential Gain and Phase
Error, G = +2, RL = 150 W
–30
–50
0.10
100M
TPC 19. AD9631 Harmonic Distortion vs.
Frequency, RL = 500 W
0.3
VS = 5V
RL = 100
G = +1
VO = 2V p-p
0.2
0.1
–70
ERROR – %
HARMONIC DISTORTION – dBc
0.05
–0.10
DIFF PHASE – Degrees
HARMONIC DISTORTION – dBc
–30
SECOND
HARMONIC
–90
0.0
–0.1
THIRD
HARMONIC
–110
–130
10k
–0.2
–0.3
100k
1M
FREQUENCY – Hz
10M
100M
0
TPC 20. AD9631 Harmonic Distortion vs.
Frequency, RL = 100 W
10
20
30
40
50
SETTLING TIME – ns
60
70
80
TPC 23. AD9631 Short-Term Settling Time,
2 V Step, RL = 100 W
60
0.3
55
0.2
45
ERROR – %
INTERCEPT – dBm
50
40
35
0.1
0.0
30
–0.1
25
20
10
–0.2
20
50 60 70 80 90 100
30
40
FREQUENCY – MHz
0
TPC 21. AD9631 Third Order Intercept vs. Frequency
REV. C
1
2
3
4
5
6
7
SETTLING TIME – s
8
9
TPC 24. AD9631 Long-Term Settling Time,
2 V Step, RL = 100 W
–7–
10
AD9631/AD9632
7
RF
325
RF
425
5
GAIN – dB
4
VS = 5V
RL = 100
VO = 300mV p-p
RF
125
350
–3dB BANDWIDTH – MHz
6
RF
225
3
2
1
0
VS = 5V
RL = 100
GAIN = +2
300
N PACKAGE
250
RF
RIN
200
100
–1
150
–2
–3
1M
10M
100M
FREQUENCY – Hz
7
0
6
RF
375
–0.4
RF
425
–0.5
550
0
–0.8
–2
–3
1M
100M
RF = 125 TO 525
BY 100
1
–1
10M
FREQUENCY – Hz
500
2
–0.7
TPC 26. AD9632 0.1 dB Flatness, N Package
(for R Package Add 20 W to RF)
10M
FREQUENCY – Hz
100M
500M
TPC 29. AD9632 Large Signal Frequency
Response, G = +2
65
60
1
0
100
55
50
45
40
35
30
–1
50
0
25
20
15
10
–50
GAIN
–100
–2
GAIN – dB
PHASE
PHASE – Degrees
AOL – dB
3
–0.6
–0.9
1M
VS = 5V
RL = 100
VO = 4V p-p
4
RF
325
–0.3
250 300 350 400 450
VALUE OF RF, RIN – RF
525
5
RF
275
OUTPUT – dB
OUTPUT – dB
–0.2
VS = 5V
RL = 100
G = +2
VO = 300mV p-p
200
TPC 28. AD9632 Small Signal –3 dB Bandwidth
vs. RF, RIN
0.1
–0.1
RL
49.9
100 150
1G
TPC 25. AD9632 Small Signal Frequency
Response, G = +2
VS = 5V
RL = 100
VO = 300mV p-p
–3
–4
RF, RIN
267
–5
–6
5
0
–5
–10
–15
10k
R PACKAGE
AD9632
–150
–7
–200
100k
1M
10M
FREQUENCY – Hz
100M
–8
–250
1G
–9
1M
TPC 27. AD9632 Open-Loop Gain and Phase
Margin vs. Frequency, RL = 100 W
10M
100M
FREQUENCY – Hz
1G
TPC 30. AD9632 Small Signal Frequency
Response, G = –1
–8–
REV. C
AD9631/AD9632
0.04
DIFF GAIN – %
–50
VS = 5V
RL = 500
G = +2
VO = 2V p-p
–70
0.00
–0.02
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
SECOND
HARMONIC
–90
THIRD
HARMONIC
–110
–130
10k
100k
1M
FREQUENCY – Hz
10M
0.02
0.00
–0.02
–0.04
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
TPC 34. AD9632 Differential Gain and Phase
Error G = +2, RL = 150 W
0.2
–30
–50
0.04
100M
TPC 31. AD9632 Harmonic Distortion vs.
Frequency, RL = 500 W
VS = 5V
RL = 100
G = +2
VO = 2V p-p
0.1
SECOND
HARMONIC
–70
ERROR – %
HARMONIC DISTORTION – dBc
0.02
–0.04
DIFF PHASE – Degrees
HARMONIC DISTORTION – dBc
–30
–90
0.0
–0.1
THIRD
HARMONIC
–0.2
–110
–130
10k
–0.3
100k
1M
FREQUENCY – Hz
10M
0
100M
TPC 32. AD9632 Harmonic Distortion vs.
Frequency, RL = 100 W
10
20
30
40
50
SETTLING TIME – ns
60
70
80
TPC 35. AD9632 Short-Term Settling Time,
2 V Step, RL = 100 W
50
0.3
45
0.2
35
ERROR – %
INTERCEPT – dBm
40
30
25
0.1
0.0
20
–0.1
15
10
10
–0.2
20
50 60 70 80 90 100
30
40
FREQUENCY – MHz
0
TPC 33. AD9632 Third Order Intercept vs. Frequency
REV. C
1
2
3
4
5
6
7
SETTLING TIME – s
8
9
TPC 36. AD9632 Long-Term Settling Time,
2 V Step, RL = 100 W
–9–
10
AD9631/AD9632
24
17
VS = 5V
18
15
12
9
6
13
11
9
7
5
3
10
100
1k
FREQUENCY – Hz
10k
3
10
100k
TPC 37. AD9631 Noise vs. Frequency
1k
FREQUENCY – Hz
10k
100k
80
75
70
65
60
55
50
–PSRR
+PSRR
PSRR – dB
PSRR – dB
100
TPC 40. AD9632 Noise vs. Frequency
80
75
45
40
35
30
25
70
65
60
55
50
–PSRR
+PSRR
45
40
35
30
25
20
20
15
10
5
0
10k
15
10
5
0
10k
100k
1M
10M
FREQUENCY – Hz
100M
1G
TPC 38. AD9631 PSRR vs. Frequency
100k
1M
10M
FREQUENCY – Hz
100M
1G
TPC 41. AD9632 PSRR vs. Frequency
100
100
VS = 5V
VCM = 1V
RL = 100
90
80
80
70
70
60
50
60
50
40
40
30
30
20
100k
1M
10M
FREQUENCY – Hz
100M
VS = 5V
VCM = 1V
RL = 100
90
CMRR – dB
CMRR – dB
VS = 5V
15
INPUT NOISE VOLTAGE – nV/ Hz
INPUT NOISE VOLTAGE – nV/ Hz
21
20
100k
1G
TPC 39. AD9631 CMRR vs. Frequency
1M
10M
FREQUENCY – Hz
100M
1G
TPC 42. AD9632 CMRR vs. Frequency
–10–
REV. C
AD9631/AD9632
1350
1000
VS = 5V
GAIN = +1
1250
100
OPEN-LOOP GAIN – V/V
1150
ROUT – 10
1
+AOL
1050
0.1
AD9632
950
–AOL
850
750
650
550
+AOL
AD9631
450
–AOL
0.01
10k
100k
1M
FREQUENCY – Hz
350
–60
100M
10M
TPC 43. AD9631 Output Resistance vs. Frequency
–40
–20
0
20
40
60
80
100
JUNCTION TEMPERATURE – C
120
140
TPC 46. Open-Loop Gain vs. Temperature
76
1000
VS = 5V
GAIN = +1
74
–PSRR
AD9632
72
100
70
PSRR – dB
ROUT – 10
1
+PSRR
68
AD9632
66
–PSRR
64
AD9631
62
60
0.1
+PSRR
58
0.01
10k
100k
1M
FREQUENCY – Hz
56
–60
100M
10M
TPC 44. AD9632 Output Resistance vs. Frequency
AD9631
–40
–20
0
20
40
60
80
100
JUNCTION TEMPERATURE – C
120
140
TPC 47. PSRR vs. Temperature
98
4.1
VS = 5V
4.0
+VOUT
–VOUT
96
RL = 150
94
3.8
CMRR – dB
OUTPUT SWING – V
3.9
3.7
3.6
+VOUT
3.5
90
RL = 50
–VOUT
3.4
92
88
–CMRR
+CMRR
3.3
–60
–40
–20
20
40
60
80
100
0
JUNCTION TEMPERATURE – C
120
86
–60
140
TPC 45. AD9631/AD9632 Output Swing vs. Temperature
REV. C
–40
–20
20
40
60
80
100
0
JUNCTION TEMPERATURE – C
120
140
TPC 48. AD9631/AD9632 CMRR vs. Temperature
–11–
AD9631/AD9632
21
250
AD9631
6V
AD9631
240
SHORT CIRCUIT CURRENT – mA
SUPPLY CURRENT – mA
20
19
6V
AD9632
5V
AD9631
5V
AD9632
18
17
16
SINK
SOURCE
230
220
SINK
AD9632
210
200
15
190
14
–60
180
–60
SOURCE
–40
–20
20
40
60
80
100
0
JUNCTION TEMPERATURE – C
120
140
TPC 49. Supply Current vs. Temperature
INPUT BIAS CURRENT – A
140
–2.5
VS = 5V
–3.0
VS = 6V
–3.5
–4.0
VS = 5V
AD9631
–40
–20
0
20
40
60
80
100
JUNCTION TEMPERATURE – C
120
TPC 50. Input Offset Voltage vs. Temperature
3 WAFER LOTS
COUNT = 1373
CUMULATIVE
180
40
4
5
6
140
100
3 WAFER LOTS
COUNT = 573
90
80
70
100
50
80
40
30
FREQ. DIST
40
20
20
0
2
3
–3 –2 –1 0
1
INPUT OFFSET VOLTAGE – mV
120
60
10
–4
0
20
40
60
80
100
JUNCTION TEMPERATURE – C
60
20
–5
–20
120
30
–6
–40
140
COUNT
100
+IB
CUMULATIVE
PERCENT
50
20
–IB
–1.0
160
60
40
–0.5
90
140
60
0.0
180
120
AD9632
AD9631
100
70
FREQ. DIST
–IB
TPC 53. Input Bias Current vs. Temperature
80
160
0.5
–2.0
–60
140
220
+IB
–1.5
VS = 6V
–5.0
–60
1.0
0
–7
7
TPC 51. AD9631 Input Offset Voltage Distribution
PERCENT
INPUT OFFSET VOLTAGE – mV
–2.0
–4.5
COUNT
120
1.5
AD9632
0
–7
20
40
60
80
100
0
JUNCTION TEMPERATURE – C
2.0
–1.5
80
–20
TPC 52. Short Circuit Current vs. Temperature
–1.0
200
–40
10
0
–6
–5
–4
–3 –2 –1 0
1
2
3
INPUT OFFSET VOLTAGE – mV
4
5
6
7
TPC 54. AD9632 Input Offset Voltage Distribution
–12–
REV. C
AD9631/AD9632
THEORY OF OPERATION
General
The AD9631 and AD9632 are wide bandwidth, voltage feedback
amplifiers. Since their open-loop frequency response follows the
conventional 6 dB/octave roll-off, their gain bandwidth product
is basically constant. Increasing their closed-loop gain results in
a corresponding decrease in small signal bandwidth. This can
be observed by noting the bandwidth specification between the
AD9631 (gain of +1) and AD9632 (gain of +2). The AD9631/
AD9632 typically maintain 65 degrees of phase margin. This
high margin minimizes the effects of signal and noise peaking.
Feedback Resistor Choice
The value of the feedback resistor is critical for optimum performance on the AD9631 (gain of +1) and less critical as the gain
increases. Therefore, this section is specifically targeted at the
AD9631.
At minimum stable gain (+1), the AD9631 provides optimum
dynamic performance with RF = 140 W. This resistor acts as a
parasitic suppressor only against damped RF oscillations that
can occur due to lead (input, feedback) inductance and parasitic
capacitance. This value of RF provides the best combination of
wide bandwidth, low parasitic peaking, and fast settling time.
When the AD9631 is used in the transimpedance (I to V) mode,
such as in photodiode detection, the value of RF and diode capacitance (CI) are usually known. Generally, the value of RF selected
will be in the kW range, and a shunt capacitor (CF) across RF will
be required to maintain good amplifier stability. The value of
CF required to maintain optimal flatness (<1 dB peaking) and
settling time can be estimated as
[
CF @ (2 OCI RF – 1) / O RF
2
]
1
2 2
where wO is equal to the unity gain bandwidth product of the
amplifier in rad/sec, and CI is the equivalent total input
capacitance at the inverting input. Typically wO = 800 106
rad/sec (see TPC 15).
As an example, choosing RF = 10 kW and CI = 5 pF requires CF
to be 1.1 pF (Note: CI includes both source and parasitic circuit
capacitance). The bandwidth of the amplifier can be estimated
using the CF calculated as
f3 d @
1.6
2RF CF
RF
In fact, for the same reasons, a 100 W–130 W resistor should be
placed in series with the positive input for other AD9631 noninverting and all AD9631 inverting configurations. The correct
connection is shown in Figures 3 and 4.
CF
II
CI
AD9631
VOUT
+VS
RF
RG
10F
100–130
0.1F
G=1+
VIN
RTERM
RIN
Figure 5. Transimpedance Configuration
AD9631/
AD9632
VOUT
For general voltage gain applications, the amplifier bandwidth
can be closely estimated as
RF
f 3dB @
0.1F
RG
10F
–VS
Figure 3. Noninverting Operation
RF
RG
10F
100–130
0.1F
RIN
This estimation loses accuracy for gains of +2/–1 or lower due
to the amplifier’s damping factor. For these “low gain” cases,
the bandwidth will actually extend beyond the calculated value
(see TPCs 13 and 25).
As a general rule, capacitor CF will not be required if
+VS
G=–
(R
F
AD9631/
AD9632
VOUT
RG
0.1F
RTERM
10F
–VS
Figure 4. Inverting Operation
REV. C
)
RG ¥ CI £
NG
4 O
where NG is the noise gain (1 + R F /R G) of the circuit. For most
voltage gain applications, this should be the case.
RF
VIN
O
2 (1 + RF /RG )
–13–
AD9631/AD9632
40
Pulse Response
Unlike a traditional voltage feedback amplifier, where the slew
speed is dictated by its front end dc quiescent current and
gain bandwidth product, the AD9631 and AD9632 provide
“on-demand” current that increases proportionally to the input
“step” signal amplitude. This results in slew rates (1300 V/ms)
comparable to wideband current feedback designs. This, combined
with relatively low input noise current (2.0 pA/÷Hz), gives the
AD9631 and AD9632 the best attributes of both voltage and
current feedback amplifiers.
RSERIES – 30
20
Large Signal Performance
The outstanding large signal operation of the AD9631 and AD9632
is due to a unique, proprietary design architecture. In order to
maintain this level of performance, the maximum 550 V-MHz
product must be observed (e.g., @ 100 MHz, VO £ 5.5 V p-p).
10
Adequate power supply bypassing can be critical when optimizing
the performance of a high frequency circuit. Inductance in the
power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1 mF) will be required to provide the best
settling time and lowest distortion. A parallel combination of at
least 4.7 mF, and between 0.1 mF and 0.01 mF, is recommended.
Some brands of electrolytic capacitors will require a small series
damping resistor ª4.7 W for optimum results.
Driving Capacitive Loads
The AD9631 and AD9632 were designed primarily to drive
nonreactive loads. If driving loads with a capacitive component is
desired, the best frequency response is obtained by the addition of
a small series resistance as shown in Figure 6. The accompanying graph shows the optimum value for RSERIES versus capacitive
load. It is worth noting that the frequency response of the circuit
when driving large capacitive loads will be dominated by the
passive roll-off of RSERIES and CL.
RIN
15
20
25
Figure 7. Recommended RSERIES vs. Capacitive Load
APPLICATIONS
The AD9631 and AD9632 are voltage feedback amplifiers well
suited for applications such as photodetectors, active filters, and
log amplifiers. The devices’ wide bandwidth (320 MHz), phase
margin (65), low current noise (2.0 pA/÷Hz), and slew rate
(1300 V/ms) give higher performance capabilities to these applications over previous voltage feedback designs.
With a settling time of 16 ns to 0.01% and 11 ns to 0.1%, the
devices are an excellent choice for DAC I/V conversion. The same
characteristics along with low harmonic distortion make them
a good choice for ADC buffering/amplification. With superb
linearity at relatively high signal frequencies, the AD9631 and
AD9632 are ideal drivers for ADCs up to 12 bits.
Operation as a Video Line Driver
The AD9631 and AD9632 have been designed to offer outstanding performance as video line drivers. The important specifications
of differential gain (0.02%) and differential phase (0.02) meet
the most exacting HDTV demands for driving video loads.
RF
AD9631/
AD9632
10
CL – pF
Power Supply Bypassing
RIN
5
0
274
274
+VS
R SERIES
10F
0.1F
RL
1k
CL
75
CABLE
0.1F
VIN
Figure 6. Driving Capacitive Loads
75
AD9631/
AD9632
75
CABLE
VOUT
75
75
10F
–VS
Figure 8. Video Line Driver
–14–
REV. C
AD9631/AD9632
Active Filters
Choose
The wide bandwidth and low distortion of the AD9631 and
AD9632 are ideal for the realization of higher bandwidth active
filters. These characteristics, while being more common in
many current feedback op amps, are offered in the AD9631 and
AD9632 in a voltage feedback configuration. Many active filter
configurations are not realizable with current feedback amplifiers.
FO = Cutoff Frequency = 20 MHz
a = Damping Ratio = 1/Q = 2
–R4
H = Absolute Value of Circuit Gain = R1 = 1
Then
k = 2 FO C1
4 C1( H + 1)
C2 =
2
R1 =
2 HK
A multiple feedback active filter requires a voltage feedback
amplifier and is more demanding of op amp performance than
other active filter configurations, such as the Sallen-Key. In
general, the amplifier should have a bandwidth that is at least
10 times the bandwidth of the filter if problems due to phase shift
of the amplifier are to be avoided.
2 K ( H + 1)
R4 = H (R1)
R3 =
Figure 9 is an example of a 20 MHz low-pass multiple feedback
active filter using an AD9632.
VIN
+5V
C1
50pF
R4
154
R1
154
As A/D converters move toward higher speeds with higher resolutions, there becomes a need for high performance drivers that
will not degrade the analog signal to the converter. It is desirable
from a system’s standpoint that the A/D be the element in the
signal chain that ultimately limits overall distortion. This places
new demands on the amplifiers that are used to drive fast, high
resolution A/Ds.
0.1F
R3
78.7
C2
100pF
A/D Converter Driver
10F
AD9632
VOUT
100
0.1F
10F
With high bandwidth, low distortion, and fast settling time, the
AD9631 and AD9632 make high performance A/D drivers for
advanced converters. Figure 10 is an example of an AD9631 used
as an input driver for an AD872, a 12-bit, 10 MSPS A/D converter.
–5V
Figure 9. Active Filter Circuit
+5V DIGITAL
10
+5V ANALOG
DVDD
4
+5V ANALOG
0.1F
140
5
DGND
AVDD
DVDD
AGND
10F
DGND
CLK
0.1F
AD872
1
AD9631
ANALOG
IN
OTR
MSB
VINA
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
BIT11
BIT12
130
0.1F
2
27
10F
0.1F
–5V ANALOG
VINB
REF GND
28
REF IN
26
REF OUT
1F
7
6
0.1F
+5V DIGITAL
22
23
0.1F
CLOCK INPUT
21
20
19
18
17
16
15
14
13
12
11
10
9
8
49.9
DIGITAL OUTPUT
AGND
AVSS
AVSS
3
0.1F
25
0.1F
–5V ANALOG
Figure 10. AD9631 Used as Driver for an AD872, a 12-Bit, 10 MSPS A/D Converter
REV. C
–15–
AD9631/AD9632
Layout Considerations
The specified high speed performance of the AD9631 and AD9632
requires careful attention to board layout and component
selection. Proper RF design techniques and low-pass parasitic
component selection are mandatory.
The PCB should have a ground plane covering all unused portions
of the component side of the board to provide a low impedance
path. The ground plane should be removed from the area near
the input pins to reduce stray capacitance.
Chip capacitors should be used for supply bypassing (see
Figure 10). One end should be connected to the ground plane,
and the other within 1/8 inch of each power pin. An additional
large (0.47 mF–10 mF) tantalum electrolytic capacitor should be
connected in parallel, though not necessarily so close, to supply
current for fast, large signal changes at the output.
The feedback resistor should be located close to the inverting input
pin in order to keep the stray capacitance at this node to a minimum. Capacitance variations of less than 1 pF at the inverting
input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 1 inch). These should be designed with a
characteristic impedance of 50 W or 75 W and be properly terminated at each end.
–16–
REV. C
AD9631/AD9632
OUTLINE DIMENSIONS
8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
8
5
1
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
SEATING
0.10
PLANE
6.20 (0.2440)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
45
0.25 (0.0099)
8
0.25 (0.0098) 0 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. C
–17–
AD9631/AD9632
Revision History
Location
Page
7/03—Data Sheet changed from REV. B to REV. C.
Deleted Evaluation Boards information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Deleted military CERDIP version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Change to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Change to TPC 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Change to TPC 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Change to Figure 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1/03—Data Sheet changed from REV. A to REV. B.
Deleted DIP (N) Inverter, SOIC (R) Inverter, and DIP (N) Noninverter Evaluation Boards in Figures 12–14 . . . . . . . . . . . . . . . 17
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
–18–
REV. C
–19–
–20–
C00601–0–7/03(C)
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