Aplus aIVR4208 Tandard cmos process Datasheet

Integrated Circuits Inc.
aIVR Series
A
PLUS MAKE YOUR PRODUCTION A-PLUS
Data Sheet
aIVR1004 – 10 sec
aIVR2104 – 21 sec
aIVR4208 – 42 sec
aIVR8508 – 85 sec
aIVR34112 – 341 sec
APLUS
INTEGRATED CIRCUITS INC.
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路一段 32 號 3 樓之 10.
Sales E-mail:
[email protected]
TEL: 886-2-2782-9266
FAX: 886-2-2782-9255
Technology E-mail:
WEBSITE : http: //www.aplusinc.com.tw
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[email protected]
Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
FEATURES
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Standard CMOS process.
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Embedded EPROM.
Embedded 8-bit MCU.
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10, 21, 42 and 85sec voice duration at 6 KHz sampling with 4-bit ADPCM compression.
Combination of voice building blocks to extend playback duration.
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Table entries are available for voice block combinations.
User selectable PCM or ADPCM data compress.
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Voice Group Trigger Options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger.
Programmable I/Os, Timer Interrupt and Watch Dog Timer.
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Built-in oscillator with fixed Rosc, software control sampling frequency
2.2V – 3.6V single power supply and < 5uA low stand-by current.
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PWM Vout1 and Vout2 drive speaker directly.
D/A COUT with ramp-up ramp-down option to drive speaker through an external BJT.
DESCRIPTION
Aplus’ aIVR is a 8-bit CPU based Voice chip series. It is fabricated with Standard CMOS process
with embedded voice storage memory. It can store from 10 to 341 sec voice message with 4-bit
ADPCM compression at 6KHz sampling rate. 8-bit PCM is also available as user selectable option to
improve sound quality. Depending on IC body, there are up to twelve programmable I/O pins. Key
trigger and Parallel CPU trigger mode can be configured according to different application requirement.
User selectable triggering and output signal options provide maximum flexibility to various applications.
Built-in resistor controlled oscillator, 8-bit current mode D/A output and PWM direct speaker driving
output minimize the number of external components.
Part Number
aIVR1004
Duration
10 sec
Programmable IO
4
aIVR2104
21 sec
4
aIVR4208
42 sec
8
aIVR8508
85 sec
8
aIVR34112
341 sec
12
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Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
PIN CONFIGURATIONS
PIN DESCRIPTIONS
Pin Names
VOUT1
VOUT2_COUT
Description
PWM output to drive speaker directly
PWM output or COUT DAC output select by programmable option
VSS
Power Ground
OSC
Oscillator input
VDDA
Positive Power Supply
VDD
Positive Power Supply
PBn
Programmable I/O pins (n: 0 to 3)
PCn
Programmable I/O pins (n: 0 to 3 for aIVR4208/34112)
PDn
Programmable I/O pins (n: 0 to 3 for aIVR34112)
RSTB
Reset pin, Low active
Note:
PBn, PCn and PDn are software programmable I/O pins that can be set to different configurations such
as pure input, input with pull-up, input with pull-down and output. The programmable I/O pins set up
will take effect immediately after chip RESET is applied.
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Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
BLOCK DIAGRAM
OSC
VDD
Oscillator
MEMORY
GND
Clock
Tree
Generator
PB0 ~ 3
PC0 ~ 3
VDDA
8-bit
MCU
I/O
PWM
Driver
&
8-bit
DAC
VOUT1
VOUT2_
COUT
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
Unit
VDD - VSS
-0.5 ~ +3.8
V
VIN
VSS - 0.3<VIN<VDD + 0.3
V
VOUT
VSS <VOUT<VDD
V
T (Operating):
-40 ~ +85
℃
T (Junction)
-40 ~ +125
℃
T (Storage)
-55 ~ +125
℃
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Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
DC CHARACTERISTICS ( TA = 0 to 70℃, VDD = 3.0V, VSS = 0V )
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
Operating Voltage
2.2
3.0
3.6
V
ISB
Standby current

1
5
μA
I/O properly terminated
IOP
Operating current


15
mA
I/O properly terminated
VIH
"H" Input Voltage
2.5
3.0
3.5
V
VDD=3.0V
VIL
"L" Input Voltage
-0.3
0
0.5
V
VDD=3.0V
IVOUTL
VOUT low O/P Current

130

mA
Vout=1.0V
IVOUTH
VOUT high O/P Current

-130

mA
Vout=2.0V
ICO
C OUT O/P Current

-2

mA
Data = 80h
IOH
O/P High Current

-8

mA
VOH=2.5V
IOL
O/P Low Current

8

mA
VOL=0.3V
RNVOUT
VOUT pull-down
resistance

100K

Ω
VOUT pin set to internal
pull-down
RNPIO
Programmable IO pin
pull-down resistance

1M

Ω
PBx, PCx, PDx set to
internal pull-down
RUPIO
Programmable IO pin
pull-up resistance
3.3K
4.7K

Ω
PBx, PCx, PDx set to
internal pull-up
∆Fs/Fs
Frequency stability
-3

+3
%
∆Fc/Fc
Chip to chip Frequency
Variation
-5

5
+5
%
Conditions
VDD = 3V +/- 0.4V
Also apply to lot to lot
variation
Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
TYPICAL APPLICATIONS
C1
VDD,VDDA
ROSC=610K
OSCI
PB0
PB1
PB2
3.3V
VOUT1
VOUT2_
COUT
8 / 16Ω
Speaker
PB3
4.7K
RSTB
VSS
0.1uF
Note :
PB0 to PB2 are set to input; PB3 is set to output
C1 = 0.1uF to 2.2uF depend on the kind of power supply.
Using 3.3V Battery
HT7335
C1
ROSC = 610K
8Ω 1/4W
Speaker
VDD,VDDA
OSCI
4.5V
VOUT2_
COUT
PB0
PB1
PB2
Tr
Rb
4.7K
RST
VSS
0.1uF
Note :
PB0 to PB2 are set to input
C1 = 0.1uF to 2.2uF depend on the kind of power supply.
Output driving of HT LDO:
HT7136 (30mA, 3.6V)
HT7133 (30mA, 3.3V)
HT7536 (100mA, 3.6V)
HT7335 (250mA, 3.5V)
Using 4.5V Battery
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Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
VIN=+5V
VOUT=+3.5V
HT7335
C1
ROSC
=610K
470K
8Ω 1/4W
Speaker
VDD,VDDA
OSC
MCU
Addr[0]
Addr[1]
Addr[2]
PB0
PB1
PB2
PB3
IO0
VOUT2_
COUT
Tr
Rb
RST
0.1uF
VSS
Note :
PB0 to PB2 set to internal pull-up
Addr[0] to [2] are open drain output drive
5V CPU Control with COUT
Note:
1. C1 is capacitor from 0.1uF to 2.2uF depends on the kind of Vdd source and sound loudness.
E.g. If COUT is used, C1 can be 0.1uF. However, if PWM direct drive speaker is used, C1
should be at least 2.2uF
2. Rb is base resistor from 120 Ohm to 390 Ohm depends on Vdd value and transistor gain.
3. Tr is an NPN transistor with beta larger than 150, e.g. 8050D.
4. Rosc = 610K Ohm with Vdd=3.0V
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Nov 06, 2008
Integrated Circuits Inc.
aIVR Series
Bonding Diagrams
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Nov 06, 2008
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