Panasonic AN77L00M 3-pin low power loss voltage regulato (100ma type) Datasheet

Voltage Regulators
AN77L00/AN77L00M Series
3-pin Low Power Loss Voltage Regulato r(100mA Type)
■ Overview
AN77L00 Series
The AN77L00/AN77L00M series is a stabilized constant
voltage power supply with a low input/output voltage(0.3V
max.). It is suitable for the low-voltage equipment using
batteries, and consumer/industrial equipment with great
fluctuation of the supply voltage.
A wide range of output voltage is available from 3V
through 10V.
Unit : mm
5.0±0.2
13.5±0.5
5.1±0.2
4.0±0.2
■ Features
+0.2
0.45 – 0.1
2.54
2
2.3±0.2
3 1
3-pin SIL Plastic Package (TO-92) (SSIP003-P-0000)
AN77L00M Series
Unit : mm
4.6max.
1.8max.
2.6max.
4.5
0.58max.
1.5
3.0
1
2
0.8min.
0.48max.
4.25max.
1.6max.
2.6
• Minimum input/output voltage difference : 0.3V(max.)
• Built-in overcurrent limiting circuit
• Built-in rush current preventive circuit at saturation voltage rise time
• Built-in overheat protective circuit
• Built-in input short-circuit protective circuit
0.44max.
3
3-pin SIL Mini Power Type Plastic Package (TO-220F) (SSIP003-P-0000D)
1
Voltage Regulators
AN77L00/AN77L00M Series
■ Block Diagram
Over Current
Protection
Over Current
Protection
Voltage
Reference
Starter
Input Short-Circuit
Protection
Error Amp.
+
Rush Current
Protection
–
Thermal
Protection
3
2
1
IN (1)
GND (3)
OUT (2)
The pin numbers in
are for the AN77L00M series.
The pin numbers in ( ) are for the AN77L00 series.
■ Absolute Maximum Ratings (Ta=25˚C)
Symbol
Rating
Supply voltage
Parameter
VIN
30
Unit
V
Supply current
IIN
200
mA
mW
Power dissipation Note1)
PD
650
Operating ambient temperature
Topr
–30 to + 85
˚C
Storage temperature
Tstg
–55 to + 150
˚C
Note 1)
■ Recommended Operating Range (Ta= 25˚C)
Part No.
2
Output voltage (VO)
Operating supply voltage range (VI)
Unit
AN77L03/M
3
VO + 0.3 to 13.62
V
AN77L035/M
3.5
VO + 0.41 to 14.14
V
AN77L04/M
4
VO + 0.3 to 14.66
V
AN77L045/M
4.5
VO + 0.43 to 15.18
V
AN77L05/M
5
VO + 0.3 to 15.7
V
AN77L06/M
6
VO + 0.46 to 16.74
V
AN77L07/M
7
VO + 0.48 to 17.78
V
AN77L08/M
8
VO + 0.51 to 18.82
V
AN77L09/M
9
VO + 0.53 to 19.86
V
AN77L10/M
10
VO + 0.55 to 20.9
V
AN77L12/M
12
VO + 0.6 to 22.98
V
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L03/M (3V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
typ
2.88
VI=3.62 to 13.62V, Tj=25˚C
IO=0 to 100mA, Tj=25˚C
IO=0mA, Tj=25˚C
Bias current fluctuation under load
∆Ibias
IO=0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI=2.7V, IO=0mA, Tj=25˚C
Ripple rejection ratio
RR
VI=3.62 to 5.62V, f=120Hz
60
max
Unit
3
3.12
V
2
60
mV
8
60
mV
0.9
1.5
mA
3
5
mA
1.5
5
mA
70
dB
Min. input/output voltage difference (1)
VDIF (min) 1
VI=2.7V, IO=50mA, Tj=25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI=2.7V, IO=100mA, Tj=25˚C
0.22
0.3
Output noise voltage
Output voltage temperature coefficient
V
V
Vno
f=10Hz to 100kHz
70
µV
∆VO/Ta
Tj= –30 to+125˚C
0.2
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=4V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L035/M (3.5V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
3.36
typ
V
3
60
mV
IO= 0 to 100mA, Tj= 25˚C
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj= 25˚C
Bias current before regulation start
Irush
VI= 3.15V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI= 4.14 to 6.14V, f=120Hz
59
Unit
3.64
VI= 4.14 to 14.14V, Tj=25˚C
IO= 0mA, Tj= 25˚C
max
3.5
9
60
mV
0.9
1.5
mA
3
5
mA
1.5
5
mA
69
dB
Min. input/output voltage difference (1)
VDIF (min) 1
VI= 3.15V, IO= 50mA, Tj= 25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI= 3.15V, IO=100mA, Tj= 25˚C
0.22
0.41
Output noise voltage
Output voltage temperature coefficient
Vno
f=10Hz to 100kHz
∆VO/Ta
Tj= –30 to+125˚C
V
V
75
µV
0.23
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=4.5V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L04/M (4V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
3.84
typ
max
4.16
V
VI= 4.66 to 14.66V, Tj= 25˚C
3
60
mV
IO= 0 to 100mA, Tj= 25˚C
9
60
mV
0.9
1.5
mA
3
5
mA
1.5
5
mA
IO= 0mA, Tj= 25˚C
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI=3.6V, IO= 0mA, Tj= 25˚C
RR
VI= 4.66 to 6.66V, f=120Hz
Min. input/output voltage difference (1)
VDIF (min) 1
VI=3.6V, IO=50mA, Tj= 25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI=3.6V, IO=100mA, Tj= 25˚C
0.23
0.3
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Unit
4
Vno
f=10Hz to 100kHz
∆VO/Ta
Tj= –30 to+125˚C
59
69
dB
V
V
80
µV
0.26
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=5V, IO=50mA, CO=10µF unless otherwise specified.
3
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L045/M (4.5V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
4.32
typ
max
4.68
V
3
60
mV
VI=5.18 to 15.18V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
10
60
mV
IO= 0mA, Tj=25˚C
0.9
1.5
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI= 4.05V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI=7.18 to 6.18V, f=120Hz
58
68
dB
Min. input/output voltage difference (1)
VDIF (min) 1
VI= 4.05V, IO=50mA, Tj=25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI= 4.05V, IO=100mA, Tj=25˚C
0.23
0.43
Output noise voltage
Output voltage temperature coefficient
Unit
4.5
V
V
Vno
f=10Hz to 100kHz
85
µV
∆VO/Ta
Tj= –30 to+125˚C
0.3
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=5.5V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L05/M (5V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
typ
4.8
VI=5.7 to 15.7V, Tj=25˚C
max
Unit
5
5.2
V
4
60
mV
IO= 0 to 100mA, Tj=25˚C
10
60
mV
IO= 0mA, Tj=25˚C
0.9
1.5
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
Bias current before regulation start
Irush
VI= 4.5V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI= 5.7 to 7.7V, f=120Hz
IO= 0 to 100mA, Tj=25˚C
58
68
dB
Min. input/output voltage difference (1)
VDIF (min) 1
VI= 4.5V, IO= 50mA, Tj=25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI= 4.5V, IO= 100mA, Tj=25˚C
0.24
0.3
Output noise voltage
Output voltage temperature coefficient
Vno
f=10Hz to 100kHz
∆VO/Ta
Tj= –30 to+125˚C
V
V
90
µV
0.33
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=6V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L06/M (6V, 100mA Type)
Parameter
Symbol
Condition
Output voltage
VO
Input stability
REGIN
VI= 6.74 to 16.74V, Tj=25˚C
Load stability
REGL
Bias current under no load
Ibias
Tj=25˚C
min
5.76
typ
max
6.24
V
4
60
mV
IO= 0 to 100mA, Tj=25˚C
11
60
mV
IO= 0mA, Tj=25˚C
0.9
1.5
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI= 5.4V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI= 6.74 to 8.74V, f=120Hz
Min. input/output voltage difference (1)
VDIF (min) 1
VI=5.4V, IO=50mA, Tj=25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
0.46
Output noise voltage
Output voltage temperature coefficient
Unit
6
56
66
dB
V
VI=5.4V, IO=100mA, Tj=25˚C
0.25
Vno
f=10Hz to 100kHz
105
µV
∆VO/Ta
Tj= –30 to+125˚C
0.4
mV/˚C
V
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=7V, IO=50mA, CO=10µF unless otherwise specified.
4
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L07/M (7V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
6.72
typ
max
7.28
V
5
70
mV
VI=7.78 to 17.78V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
11
70
mV
IO= 0mA, Tj=25˚C
1.1
1.6
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI= 6.3V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI=7.78 to 9.78V, f=120Hz
Min. input/output voltage difference (1)
VDIF (min)1
VI= 6.3V, IO= 50mA, Tj=25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
0.48
Output noise voltage
Output voltage temperature coefficient
Unit
7.0
55
65
dB
V
VI= 6.3V, IO=100mA, Tj=25˚C
0.26
Vno
f=10Hz to 100kHz
120
µV
∆VO/Ta
Tj= –30 to+125˚C
0.46
mV/˚C
V
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI= 8V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L08/M (8V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
typ
7.68
VI= 8.82 to 18.82V, Tj=25˚C
max
Unit
8
8.32
V
5
80
mV
IO= 0 to 100mA, Tj=25˚C
12
80
mV
IO= 0mA, Tj=25˚C
1.1
1.6
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI=7.2V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI= 8.82 to 10.82V, f=120Hz
53
63
dB
Min. input/output voltage difference (1)
VDIF (min)1
VI=7.2V, IO=50mA, Tj= 25˚C
0.12
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI=7.2V, IO=100mA, Tj= 25˚C
0.27
0.51
Vno
f=10Hz to 100kHz
135
µV
∆VO/Ta
Tj= –30 to +125˚C
0.53
mV/˚C
Output noise voltage
Output voltage temperature coefficient
V
V
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=9V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L09/M (9V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Ibias
Condition
Tj=25˚C
min
8.64
VI=9.86 to 19.86V, Tj=25˚C
typ
max
Unit
9
9.36
V
6
90
mV
IO= 0 to 100mA, Tj=25˚C
13
90
mV
IO= 0mA, Tj=25˚C
1.2
1.7
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
Bias current before regulation start
Irush
VI=8.1V, IO= 0mA, Tj=25˚C
Ripple rejection ratio
RR
VI=9.86 to 11.86V, f=120Hz
Min. input/output voltage difference (1)
VDIF (min) 1
VI=8.1V, IO= 50mA, Tj=25˚C
0.13
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI=8.1V, IO=100mA, Tj=25˚C
0.28
0.53
Vno
f=10Hz to 100kHz
150
µV
∆VO/Ta
Tj=–30 to+125˚C
0.6
mV/˚C
Output noise voltage
Output voltage temperature coefficient
IO= 0 to 100mA, Tj=25˚C
52
62
dB
V
V
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=10V, IO=50mA, CO=10µF unless otherwise specified.
5
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L10/M (10V, 100mA Type)
Parameter
Symbol
Condition
min
Output voltage
VO
Input stability
REGIN
VI=10.9 to 20.9V, Tj=25˚C
Load stability
REGL
Bias current under no load
Tj=25˚C
Ibias
9.6
typ
max
10.4
V
7
100
mV
IO= 0 to 100mA, Tj=25˚C
14
100
mV
IO= 0mA, Tj=25˚C
1.2
1.7
mA
3
5
mA
1.5
5
mA
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI= 9.0V, IO=0mA, Tj=25˚C
Ripple rejection ratio
RR
VI=10.9 to 12.9V, f=120Hz
Min. input/output voltage difference (1)
VDIF (min) 1
VI= 9.0V, IO=50mA, Tj=25˚C
0.13
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
0.55
Output noise voltage
Output voltage temperature coefficient
Unit
10
50
60
dB
V
VI= 9.0V, IO=100mA, Tj=25˚C
0.29
Vno
f=10Hz to 100kHz
165
µV
∆VO/Ta
Tj= –30 to+125˚C
0.67
mV/˚C
V
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=11V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L12/M (12V, 100mA Type)
Parameter
Symbol
Output voltage
VO
Input stability
REGIN
Load stability
REGL
Bias current under no load
Condition
min
Tj=25˚C
Ibias
11.52
typ
max
Unit
12
12.48
V
8
120
mV
IO= 0 to 100mA, Tj=25˚C
15
120
mV
IO= 0mA, Tj=25˚C
1.4
1.9
mA
3
5
mA
1.5
5
mA
VI=12.98 to 22.98V, Tj=25˚C
Bias current fluctuation under load
∆Ibias
IO= 0 to 100mA, Tj=25˚C
Bias current before regulation start
Irush
VI=10.8V, IO=0mA, Tj=25˚C
Ripple rejection ratio
RR
VI=12.98 to 14.98V, f=120Hz
Min. input/output voltage difference (1)
VDIF (min) 1
VI=10.8V, IO=50mA, Tj=25˚C
0.13
0.25
Min. input/output voltage difference (2)
VDIF (min) 2
VI=10.8V, IO=100mA, Tj=25˚C
0.31
0.6
Vno
f=10Hz to 100kHz
190
µV
∆VO/Ta
Tj=–30 to+125˚C
0.8
mV/˚C
Output noise voltage
Output voltage temperature coefficient
48
58
dB
V
V
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms)and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=13V, IO=50mA, CO=10µF unless otherwise specified.
■ Application Circuit
VI
VO
AN77L00/M
series
0.33µF
+
–
10µF
• For the AN77L00/M series, the gain inside the IC is set high to improve the performance. For the reason, use
the capacitor of 10µF or more when the power line in the output side should be long.
In addition, install the capacitor in the output side as near as possible to the IC.
6
Voltage Regulators
AN77L00/AN77L00M Series
■ Characteristics Curve
Input/Output Characteristics
VO —VI
Input Stability
VO —VI
Rush Current (Under No Load)
II —VI
3
AN77L03/M
IO=50mA
AN77L03/M
IO=50mA
AN77L03/M
IO= 0A
4
3
2
3.02
Input Current II (mA)
Output Voltage VO (V)
Output Voltage VO (V)
5
3.01
3.00
2.99
2
1
1
2.98
0
0
1
2
3
4
0
5
0
10
20
2
3
4
5
Bias Current
Ibias — IO
Load Stability
VO —IO
Over-current Limiting Characteristics
VO —IO
AN77L03/M
VI=4V
3
2
1
Output Voltage VO (V)
4
3.01
3.00
2.99
2.98
50
0
100
AN77L03/M
VI=4V
IO(short)=200mA
(typ)
5
3.02
Output Voltage VO (V)
Bias Current Ibias (mA)
1
Input Voltage VI (V)
5
1
0
Input Voltage VI (V)
AN77L03/M
VI=4V
0
0
30
Input Voltage VI (V)
4
3
2
1
0
50
0
100
0
100
200
300
Output Current IO (mA)
Output Voltage IO (mA)
Minimum Input/Output Voltage Difference
VDIF (min) — IOUT
Ripple Rejection Ratio
RR — f
Output Voltage Temperature Characteristics
VO — Ta
100
AN77L03/M
VI=2.88V
0.4
0.3
0.2
0.1
0
0
50
Output Voltage IO (mA)
100
AN77L03/M
IO=50mA
60
40
AN77L03/M
VI= 4V
IO= 0mA
3.10
80
Output Voltage VO (V)
0.5
Ripple Rejection Ratio RR (dB)
Minimum Input/Output Voltage Difference VDIF (min) (V)
Output Current IO (mA)
3.00
20
0
10
100
1k
10k
Frequency f (Hz)
100k
2.90
–25
0
25
50
75
Ambient Temperature Ta (˚C)
7
Voltage Regulators
AN77L00/AN77L00M Series
AN77L00 series
[Power Dissipation (TO-92 Package)]
PD —Ta
AN77L00M Series
[Power Dissipation (TO-243 Package)]
PD —Ta
1.0
Single Unit
Rthj – a=190˚C/W
PD=658mW (25˚C)
0.5
0
0
25
50
75 85 100
125
150
Power Dissipation PD (W)
Power Dissipation PD (W)
1.0
0.5
0
Ambient Temperature Ta (˚C)
0
25
50
75 85 100
125
150
Ambient Temperature Ta (˚C)
Note) SM to printed board (glass epoxy board of 20 × 20 × 1.7mm with copper film of 1cm2 or more)
■ Precautions on Use
Not required
(2)
VI
3
VO
1
(1)
+
(3)
2
CI
0.33µF
–
CO
10µF
Equivalent Series Resistance ESR (Ω)
Pin number in
is for the AN77L00M series.
Pin number in ( ) is for the AN77L00 series.
50
,, ,
, ,,
,
1. Input Short-Circuit Protection Circuit
For the conventional Matsushita 3-pin regulators (such as
of the AN8000 series), when DC input pin3 is shortcircuited with GND w in the normal operation condition,
the potential of output pinq becomes higher than that of
DC input pin and the electric charges which is charged in
output capacitor CO flows in the input side, resulting in the
breakage of elements.
In the above case, the common silicon diode is connected
as shown in the right figure (the dotted line). However, for
the AN77L00/M series, since the protection circuit, which
protects the elements from the discharging current, is
incorporated in the internal circuit, the protection diode is
not required.
2. Capacitor for External Compensation
In order to secure the safety, the capacitor of 10 µF is
required in the output side and it should be added as near
as possible to output pin1 and GND 2. When it is used
under low temperature, oscillation may occur due to the
decrease of the aluminum electrolytic capacitor and
increase of ESR.
For the AN77L00/M, it is recommended that the tantalum
capacitor or aluminum electrolytic capacitor whose serialconnected resistance equivalent with that of output
capacitor CO has temperature characteristics within the
recommended range specified in the right.
8
40
30
20
Recommended Range
10
0
20
40
60
80
Output Current IO (mA)
100
Similar pages