AOSMD AON6850 100v dual n-channel mosfet Datasheet

AON6850
100V Dual N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AON6850 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge and low Qrr.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
VDS
RDS(ON) (at VGS=10V)
100V
28A
< 35mΩ
RDS(ON) (at VGS = 7V)
< 42mΩ
ID (at VGS=10V)
100% UIS Tested
100% Rg Tested
D1
Top View
S1
1
8
D1
G1
2
7
D1
S2
3
6
D2
G2
4
5
D2
G1
G2
S1
DFN5X6 EP2
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
TC=25°C
Continuous Drain
Current
Pulsed Drain Current C
Avalanche Current
TA=25°C
TA=25°C
Power Dissipation A
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
Steady-State
Steady-State
28
A
39
mJ
W
22
1.7
RθJA
RθJC
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W
1.1
TJ, TSTG
Symbol
t ≤ 10s
A
56
PDSM
TA=70°C
Junction and Storage Temperature Range
Rev 0: Feb 2010
5
PD
TC=100°C
A
4
EAS, EAR
TC=25°C
V
18
IAS, IAR
Avalanche energy L=0.1mH C
Units
V
55
IDSM
C
S2
28
IDM
TA=70°C
Power Dissipation B
Maximum
100
±25
ID
TC=100°C
Continuous Drain
Current
D2
-55 to 150
Typ
20
60
1.8
°C
Max
24
72
2.2
Units
°C/W
°C/W
°C/W
Page 1 of 1
AON6850
Electrical Characteristics (T J=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
VDS=100V, VGS=0V
100
50
Gate-Body leakage current
VDS=0V, VGS= ±25V
VGS(th)
ID(ON)
Gate Threshold Voltage
On state drain current
VDS=VGS ID=250µA
2.5
VGS=10V, VDS=5V
55
VGS=10V, ID=5A
TJ=125°C
VGS=7V, ID=4A
100
nA
4
V
27
35
46
56
32
42
mΩ
1
V
45
A
A
Forward Transconductance
VDS=5V, ID=5A
15
VSD
Diode Forward Voltage
IS=1A,VGS=0V
Maximum Body-Diode Continuous Current
0.7
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
VGS=0V, VDS=50V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=5A
µA
3.4
gFS
IS
Units
V
TJ=55°C
Static Drain-Source On-Resistance
Max
10
IGSS
RDS(ON)
Typ
mΩ
S
1220
1530
1840
pF
108
155
202
pF
39
66
93
pF
0.3
0.7
1.1
Ω
19
24
29
nC
7
9
11
nC
4.8
8
11.2
nC
11
VGS=10V, VDS=50V, RL=9.8Ω,
RGEN=3Ω
ns
5.5
ns
16
ns
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=5A, dI/dt=500A/µs
16
23
30
Qrr
Body Diode Reverse Recovery Charge IF=5A, dI/dt=500A/µs
58
83
108
4
ns
ns
nC
A. The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: Feb 2010
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Page 2 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
60
10V
8V
50
VDS=5V
50
7.5V
40
30
ID(A)
ID (A)
40
7V
30
20
20
VGS=6V
10
125°C
10
25°C
0
0
0
1
2
3
4
0
5
2
40
Normalized On-Resistance
RDS(ON) (mΩ)
6
8
10
2
VGS=7V
35
30
VGS=10V
25
20
1.8
VGS=10V
ID=5A
1.6
17
5
2
10
VGS=7V
1.4
1.2
ID=4A
1
0.8
0
5
0
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
25
50
75
100
125
150
175
Temperature (°C)
0
Figure 4: On-Resistance vs. Junction
18
Temperature (Note E)
1.0E+02
60
ID=5A
55
1.0E+01
40
125°C
50
45
IS (A)
RDS(ON) (mΩ)
4
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
40
1.0E+00
125°C
1.0E-01
25°C
35
1.0E-02
25°C
30
1.0E-03
25
6
7
8
9
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 0: Feb 2010
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
2200
10
1800
Capacitance (pF)
8
VGS (Volts)
2000
VDS=50V
ID=5A
6
4
2
Ciss
1600
1400
1200
1000
800
600
Coss
Crss
400
200
0
0
0
5
10
15
20
0
25
Qg (nC)
Figure 7: Gate-Charge Characteristics
RDS(ON)
limited
160
10µs
100µs
DC
1.0
1ms
TJ(Max)=150°C
TC=25°C
0.1
0.0
0.01
0.1
Power (W)
10µs
10.0
ID (Amps)
20
30
40
VDS (Volts)
Figure 8: Capacitance Characteristics
50
200
100.0
10
TJ(Max)=150°C
TC=25°C
17
5
2
10
120
80
40
1
10
VDS (Volts)
100
1000
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
0
0.0001
0.001
0.01
0.1
1
0
10
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
ZθJC Normalized Transient
Thermal Resistance
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJC=2.2°C/W
1
PD
0.1
Ton
0.01
0.00001
Single Pulse
0.0001
0.001
0.01
0.1
T
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: Feb 2010
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Page 4 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
TA=25°C
TA=100°C
TA=125°C
TA=150°C
10.0
Power Dissipation (W)
IAR (A) Peak Avalanche Current
100.0
1.0
50
40
30
20
10
0
1
10
100
1000
Time in avalanche, tA (µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
0
25
50
75
100
125
150
TCASE (°C)
Figure 13: Power De-rating (Note F)
1000
40
30
Power (W)
Current rating ID(A)
TA=25°C
20
100
10
10
1
1E-04 0.001 0.01
0
0
25
50
75
100
125
150
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
0.1
1
10
100
0
1000
Pulse Width (s)
18
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
TCASE (°C)
Figure 14: Current De-rating (Note F)
ZθJA Normalized Transient
Thermal Resistance
17
5
2
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJA=72°C/W
0.1
PD
0.01
Single Pulse
Ton
0.001
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 0: Feb 2010
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Page 5 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
25ºC
90
25
20
20
15
125ºC
60
Qrr
30
25ºC
Irm
0
10
5
5
0
0
5
10
15
20
25
trr
Is=20A
125ºC
0.5
125ºC
5
10
2.5
Irm
0
0
200
400
20
600
800
1
25ºC
10
5
0
1000
0
0
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200
400
0.5
S
125º
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Rev 0: Feb 2010
1.5
trr
25ºC
10
25ºC
2
125ºC
trr (ns)
15
125ºC
30
Is=20A
Irm (A)
Qrr (nC)
90
25ºC
25
40
25
20
30
20
IS (A)
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
120
60
0
15
30
Qrr
1
S
0
30
150
1.5
25ºC
IS (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
180
25ºC
0
30
2.5
2
15
10
125ºC
di/dt=800A/µs
S
Qrr (nC)
120
25
3
S
125ºC
30
trr (ns)
di/dt=800A/µs
150
30
Irm (A)
180
600
800
0
1000
di/dt (A/µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Page 6 of 7
AON6850
Gate Charge Test Circuit & W aveform
Vgs
Qg
10V
+
+ Vds
VDC
-
VDC
DUT
Qgs
Qgd
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & W aveforms
RL
Vds
Vds
Vgs
90%
+ Vdd
DUT
VDC
Rg
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & W aveforms
L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
VDC
Rg
-
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Rev 0: Feb 2010
Vgs
Isd
L
+ Vdd
VDC
-
IF
t rr
dI/dt
I RM
Vdd
Vds
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Page 7 of 7
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