Anpec APL3518DKI-TRG Usb power-distribution switch Datasheet

APL3518/9
USB Power-Distribution Switches
General Description
Features
•
•
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•
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The APL3518/9 series of power switches are designed
for USB applications. The 62mΩ N-channel MOSFET
62mΩ High Side MOSFET
Wide Supply Voltage Range: 2.7V to 5.5V
power switch satisfies the voltage drop requirements of
USB specification.
Current-Limit and Short-Circuit Protections
Over-Temperature Protection
The protection features include current-limit protection,
short-circuit protection, and over-temperature protection.
Fault Indication Output
Enable Input
The device limits the output current at current limit threshold level. When VOUT drops below 1.5V, the devices limit
UL Approved-File No. E328191
Nemko IEC 60950-1:2005(2nd Edition); Am 1:2009
the current to a lower and safe level. The over-temperature protection limits the junction temperature below
CB Scheme Certified, No.62377
•
TUV IEC 60950-1:2005+A1:2009 and
140oC in case of short circuit or over load conditions.
Other features include a deglitched OCB output to indi-
EN 60950-1:2006+A11:2009+A1:2010 Certified,
No.44 780 11 393954
•
cate the fault condition and an enable input to enable or
disable the device.
Lead Free and Green Devices Available
(RoHS Compliant)
Simplified Application Circuit
5V
Applications
•
•
•
USB Port
VIN
VOUT
APL3518A/B/C/D
APL3519A/B/C/D
USB
Controller
Notebook and Desktop Computers
USB Ports
High-Side Power Protection Switches
OCB
EN/ENB
GND
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
1
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APL3518/9
Pin Configurations
GND 1
8 VOUT
VIN 2
7 VOUT
VIN 3
6 VOUT
EN 4
5 OCB
VOUT 1
OCB 1
OCB 3
EN 3
4 EN
SOT-23-5
APL3518A/C
(Top View)
GND 1
8 VOUT
VIN 2
7 VOUT
VIN 3
6 VOUT
5 OCB
SOP-8/MSOP-8
APL3518B/D
(Top View)
5 VOUT
GND 2
GND 2
SOP-8/MSOP-8
APL3518A/C
(Top View)
ENB 4
5 VIN
VOUT 1
4 VIN
SOT-23-5
APL3519A/C
(Top View)
5 VIN
GND 2
OCB 1
5 VOUT
GND 2
OCB 3
4 ENB
ENB 3
SOT-23-5
APL3518B/D
(Top View)
4 VIN
SOT-23-5
APL3519B/D
(Top View)
Ordering and Marking Information
Package Code
K : SOP-8 X : MSOP-8 B : SOT-23-5
Operating Ambient Temperature Range
Assembly Material
I : -40 to 85 oC
Handling Code
Handling Code
TR : Tape & Reel
Temperature Range
Output Current/EN Function
Package Code
A : 2A/Active High B : 2A/Active Low
C : 1A/Active High
Output Current/EN Function
D : 1A/Active Low
Assembly Material
G : Halogen and Lead Free Device
APL3518
APL3519
APL3518A K:
APL3518A
XXXXX
XXXXX - Date Code
APL3518A X:
L518A
XXX
XX
XXXXX - Date Code
APL3518A B:
L8AX
X - Date Code
APL3519A B:
L9AX
X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Absolute Maximum Ratings
Symbol
VIN
VOUT
VENB, VEN
VOCB
TJ
(Note 1)
Parameter
Rating
Unit
VIN Input Voltage (VIN to GND)
-0.3 ~ 7
V
VOUT to GND Voltage
-0.3 ~ 7
V
EN, ENB to GND Voltage
-0.3 ~ 7
V
OCB to GND Voltage
-0.3 ~ 7
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
V
150
o
-65 ~ 150
o
260
o
C
C
C
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
Parameter
Junction-to-Ambient Resistance in Free Air
Typical Value
Unit
(Note 2)
SOP-8
MSOP-8
SOT-23-5
θJA
160
160
235
o
C/W
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
VIN
IOUT
TA
TJ
Parameter
VIN Input Voltage
Range
Unit
2.7 ~ 5.5
V
OUT Output Current (APL3518A/B, APL3519A/B)
0 ~2
OUT Output Current (APL3518C/D, APL3519C/D)
0 ~1
Ambient Temperature
Junction Temperature
A
-40 ~ 85
o
-40 ~ 125
o
C
C
Note 3 : Refer to the typical application circuit
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN=5V, VEN =5V or VENB=0V and TA= -40 ~ 85 oC. Typical values are
at TA=25oC.
Symbol
Parameter
APL3518/9
Test Conditions
Unit
Min.
Typ.
Max.
No load, VEN=0V or VENB=5V
-
-
1
µA
SUPPLY CURRENT
VIN Supply Current
No load, VEN=5V or VENB=0V
-
60
100
µA
Leakage Current
VOUT=GND, VEN=0V or VENB=5V
-
-
1
µA
Reverse Leakage Current
VIN=GND, VOUT=5V, VEN=0V or
VENB=5V
-
-
1
µA
APL3518A/B/C/D, APL3519A/B/C/D,
IOUT=1A, TA= 25 oC
-
62
78
mΩ
1.7
-
2.65
V
-
0.2
-
V
APL3518A/B, APL3519A/B,
VIN=2.7V to 5.5V, TA= -40 ~ 85 oC
2.1
2.5
3.6
A
APL3518C/D, APL3519C/D,
VIN=2.7V to 5.5V, TA= -40 ~ 85 oC
1.1
1.5
2.1
A
APL3518A/B, APL3519A/B,
VIN=2.7V to 5.5V
-
1.5
-
A
APL3518C/D, APL3519C/D,
VIN=2.7V to 5.5V
-
0.8
-
A
V
POWER SWITCH
RDS(ON)
Power Switch On Resistance
UNDER-VOLTAGE LOCKOUT (UVLO)
VIN UVLO Threshold Voltage
VIN rising, TA= -40 ~ 85 oC
VIN UVLO Hysteresis
CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTIONS
ILIM
ISHORT
Current Limit Threshold
Short-Circuit Output Current
OCB OUTPUT PIN
IOCB=5mA
-
0.2
0.4
OCB Leakage Current
VOCB=5V
-
-
1
µA
OCB Deglitch Time
OCB assertion, TA= -40 ~ 85 oC
5
12
20
ms
OCB Output Low Voltage
tD(OCB)
EN OR ENB INPUT PIN
VIH
Input Logic HIGH
VIN=2.7V to 5V
2
-
-
V
VIL
Input Logic LOW
VIN=2.7V to 5V
-
-
0.8
V
-
-
1
µA
Input Current
-
40
-
Ω
tD(ON)
Turn On Delay Time
-
30
-
µs
tD(OFF)
Turn Off Delay Time
-
30
-
µs
No load, COUT=1µF, VIN=5V
-
400
-
µs
TJ rising
-
140
-
°C
-
20
-
°C
VOUT Discharge Resistance
tSS
Soft-Start Time
VEN=0V or VENB=5V, VOUT=1V
OVER-TEMPERATURE PROTECTION (OTP)
TOTP
Over-Temperature Threshold
Over-Temperature Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Typical Operating Characteristics
Switch On Resistance vs.
Ambient Temperature
120
Switch On Resistance , RDS(on) (mΩ)
Switch On Resistance , RDS(on) (mΩ)
120
110
100
90
80
70
60
50
40
VIN =5V, IOUT =1A
0
50
Ambient Temperature
90
80
70
60
50
40
2.5
3.0
4.0
4.5
5.0
5.5
Supply Current vs. Input Voltage
60
55
Supply Current, ICC (µA)
60
40
20
0
50
45
40
35
30
25
VIN =5V, RLOAD = Open,
CIN =COUT =33µF/Electrolytic
-50
50
100
20
150
RLOAD = Open,
CIN =COUT =33µF/Electrolytic, TA=25oC
2.5
3.0
Junction Temperature (oC)
Junction Temperature
2.0
1.5
APL3518C/D, APL3519C/D
1.0
0.5
VIN =5V
0.0
-50
50
100
Junction Temperature
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
5.0
5.5
2.6
APL3518A/B, APL3519A/B
2.4
2.2
2.0
1.8
1.6
APL3518C/D, APL3519C/D
1.4
1.2
TA =25oC
1.0
0
4.5
Input Voltage
2.8
APL3518A/B, APL3519A/B
2.5
4.0
Current Limit Threshold vs.
Current Limit Threshold, ILIM (Α)
3.0
3.5
Input Voltage (V)
Current Limit Threshold vs.
Current Limit Threshold, ILIM (A)
3.5
Input Voltage (V)
( oC)
80
0
100
150
Supply Current vs.
Junction Temperature
100
Supply Current, ICC (µA)
100
IOUT =1A, TA=25oC
110
30
30
-50
Switch On Resistance vs.
Input Voltage
150
2.5
(oC)
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
5
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APL3518/9
Typical Operating Characteristics (Cont.)
Current-Limit Response vs.
Output Peak Current
500
350
300
250
200
150
100
50
0
0
1
2
3
4
5
6
7
8
APL3518C/D, APL3519C/D,
VIN = 5V, TA=25oC
450
Current-Limit Response (µs)
400
Output Peak Current
500
APL3518A/B, APL3519A/B,
VIN = 5V, TA=25oC
450
Current-Limit Response (µs)
Current-Limit Response vs.
400
350
300
250
200
150
100
50
0
9 10
0
1
EN pin Threshold Voltage, VEN (V)
1.2
1.0
APL3518C/D, APL3519C/D
0.6
0.4
0.2
VIN = 5V,RLOAD =0.5Ω, TA=25℃
0
2.5
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
3.0
3.5
4.0
4.5
5.0
6
7
8
9
2.0
EN Rising
1.5
EN Falling
1.0
-50
0
50
100
Input Voltage (V)
EN pin Threshold Voltage vs.
Input Voltage
Turn-Off Leakage Current vs.
4.0
EN Falling
VIN =5V, RLOAD =50Ω,
CIN = COUT =33µF/Elctrolytic, TA=25oC
3.0
3.5
4.0
4.5
5.0
3.5
150
Junction Temperature
VIN =5V, Shutdown mode, RLOAD =0Ω,
CIN = COUT =33µF/Elctrolytic
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50
5.5
0
50
100
150
Junction Temperature ( C)
o
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
10
RLOAD =50Ω,
CIN = COUT =33µF/Elctrolytic
Junction Temperature ( oC)
EN Rising
2.5
5
2.5
0.5
5.5
Turn-Off Leakage Current, ILEAK (µA)
Short-Circuit Output Current, ISHORT (A)
EN pin Threshold Voltage, VEN (V)
APL3518A/B, APL3519A/B
0.8
4
EN pin Threshold Voltage vs.
Junction Temperature
3.0
1.6
1.4
3
Output Peak Current (A)
Output Peak Current (A)
Short-Circuit Output Current vs.
Input Voltage
1.8
2
6
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APL3518/9
Typical Operating Characteristics (Cont.)
18
18
17
17
OCB Deglitch Time , TD(OCB) (ms)
OCB Deglitch Time , TD(OCB) (ms)
OCB Deglitch Time vs.
Junction Temperature
16
15
14
13
12
11
RLOAD =1Ω,
CIN = COUT =33µF/Elctrolytic
10
16
15
14
13
12
11
0
9
50
100
Junction Temperature
RLOAD =1Ω,
CIN = COUT =33µF/Elctrolytic
10
9
-50
OCB Deglitch Time vs.
Input Voltage
150
2.5
Turn-Off Falling Time, tF (µs)
UVLO Threshold Voltage, VUVLO (V)
UVLO Rising
2.4
UVLO Falling
1.6
0.8
ILOAD =15mA,
CIN = COUT =33µF/Elctrolytic
-50
0
50
100
100
50
-50
Turn-On Rising Time vs.
Junction Temperature
300
200
100
0
50
Junction Temperature
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
100
50
100
150
Switch Off Supply Current vs.
Junction Temperature
4.0
VIN = 5V, RLOAD =30Ω,
CIN = 33µF/Elctrolytic, COUT =1µF/X7R
400
-50
0
Junction Temperature (oC)
500
0
5.5
150
0
150
Switch Off Supply Current, ICC(off)(µA)
Turn-On Rising Time, tR (µs)
600
5.0
VIN = 5V, RLOAD =30Ω,
CIN = 33µF/Elctrolytic, COUT =1µF/X7R
Junction Temperature ( oC)
700
4.5
Junction Temperature
200
2.8
1.2
4.0
Turn-Off Falling Time vs.
Junction Temperature
2.0
3.5
Input Voltage (V)
UVLO Threshold Voltage vs.
3.2
3.0
(oC)
150
(oC)
VIN = 5V, RLOAD = Open,
CIN = COUT =33µF/Elctrolytic
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50
0
50
100
Junction Temperature
7
150
( oC)
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APL3518/9
Typical Operating Characteristics (Cont.)
Output Voltage vs. Output Current
6
6
5
5
Output Voltage, VOUT (V)
Output Voltage, VOUT (V)
Output Voltage vs. Output Current
4
3
APL3518A/B, APL3519A/B,
VIN = 5V, TA=25oC
2
1
0
4
3
APL3518C/D, APL3519C/D,
VIN = 5V, TA=25oC
2
1
0
0.5
1
1.5
2
2.5
3
0
3.5
0.5
1
1.5
2
2.5
Output Current (A)
Output Current (A)
Copyright  ANPEC Electronics Corp.
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APL3518/9
Operating Waveforms
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Turn On Response
Turn Off Response
VENB
1
1
V ENB
V OUT
VOUT
2
2
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
CH1: VENB, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
TIME: 200µs/Div
CH1: VENB, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
TIME: 100µs/Div
UVLO at Rising
UVLO at Falling
VIN
V OUT
VIN
1
1
VOUT
2
2
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
VIN =5V, RLOAD =30Ω, CIN =33µF/Electrolytic,
COUT =1µF/Electrolytic
CH1: VIN, 1V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME:2ms/Div
CH1: VIN, 1V/Div, DC
CH2: VOUT, 1V/Div, DC
TIME:5ms/Div
Copyright  ANPEC Electronics Corp.
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APL3518/9
Operating Waveforms (Cont.)
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
OCB Response during Short Circuit
OCB Response with Ramped Load
VOCB
1
VE N
VOUT
1
VOCB
2
2
IOUT
3
I OUT
3
APL3518C, VIN =5V, OUT short to GND,
CIN =COUT=33µF/Electrolytic
CH1: VEN, 5V/Div, DC
CH2: VOCB, 5V/Div, DC
CH3: IOUT, 1A/Div, DC
TIME: 5ms/Div
APL3518C, VIN =5V, C IN =COUT=33µF/Electrolytic
CH1: VOCB, 5V/Div, DC
CH2: V OUT, 2V/Div, DC
CH3: IOUT, 1A/Div, DC
TIME: 5ms/Div
Short Circuit Response
Load Transient Response
VOUT
VIN
VOUT
1
2
1
I OUT
3
IOUT
2
APL3518A, VIN =5V, RLOAD =1kΩ to 2.2Ω,
CIN =COUT=33µF/Electrolytic
CH1: VOUT, 1V/Div, DC
CH2: IOUT, 1A/Div, DC
TIME: 1ms/Div
APL3518C, VIN =5V, OUT Short to GND,
CIN =33µF/Electrolytic, No COUT
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 5A/Div, DC
TIME: 50µs/Div
Copyright  ANPEC Electronics Corp.
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APL3518/9
Pin Description
PIN
NO.
FUNCTION
NAME
SOT-23-5
SOP-8/
MSOP-8
APL3518
APL3519
1
2
2
GND
Ground.
5
4
VIN
Power Supply Input. Connect this pin to external DC supply.
2
3
4
5
4
3
EN
(A/C)
Enable Input. Pulling this pin to high will enable the device and pulling this pin to
low will disable device. The EN pin cannot be left floating.
ENB
(B/D)
Enable Input. Pulling this pin to high will disable the device and pulling this pin to
low will enable device. The ENB pin cannot be left floating.
3
1
OCB
Fault Indication Pin. This pin goes low when a current limit or an over-temperature
condition is detected after a 12ms deglitch time.
1
5
VOUT
Output Voltage Pin. The output voltage follows the input voltage. When ENB is
high or EN is low, the output voltage is discharged by an internal resistor.
6
7
8
Block Diagram
VIN
VOUT
UVLO
Charge
Pump
EN/
ENB
Short-Circuit
Protection
Current
Limit
Gate Driver and
Control Logic
OCB
GND
OTP
Copyright  ANPEC Electronics Corp.
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APL3518/9
Typical Application Circuit
3.3V
USB Port
5V
CIN
50kΩ
1µF
USB
Controller
VIN
VOUT
APL3518A/B/C/D
APL3519A/B/C/D
OCB
CBYP
COUT
0.1µF
150µF
VBUS
D+
DGND
EN/ENB
GND
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APL3518/9
Function Description
VIN Under-Voltage Lockout (UVLO)
compatible with both TTL and CMOS logic levels. The
The APL3518/9 series of power switches have a built-in
EN/ENB pin cannot be left floating.
under-voltage lockout circuit to keep the output shutting
off until internal circuitry is operating properly. The UVLO
Over-Temperature Protection
When the junction temperature exceeds 140oC, the inter-
circuit has hysteresis and a de-glitch feature so that it will
typically ignore undershoot transients on the input. When
nal thermal sense circuit turns off the power FET and
allows the device to cool down. When the device’s junc-
input voltage exceeds the UVLO threshold, the output
tion temperature cools by 20 oC, the internal thermal
sense circuit will enable the device, resulting in a pulsed
voltage starts a soft-start to reduce the inrush current.
Power Switch
The power switch is an N-channel MOSFET with a low
output during continuous thermal protection. Thermal
protection is designed to protect the IC in the event of
RDS(ON). The internal power MOSFET does not have the
body diode. When IC is off, the MOSFET prevents a cur-
over temperature conditions. For normal operation, the
junction temperature cannot exceed TJ=+125oC.
rent flowing from the VOUT back to VIN and VIN to VOUT.
Current-Limit Protection
The APL3518/9 series of power switches provide the current-limit protection function. During current-limit, the devices limit output current at current limit threshold. For
reliable operation, the device should not be operated in
current-limit for extended period.
Short-Circuit Protection
When the output voltage drops below 1.5V, which is
caused by an over-load or a short-circuit, the devices limit
the output current down to a safe level. The short-circuit
current limit is used to reduce the power dissipation during short-circuit conditions. If the junction temperature
reaches over-temperature threshold, the device will enter the thermal shutdown.
OCB Output
The APL3158/9 series of power switches provide an
open-drain output to indicate that a fault has occurred.
When any of current-limit or over-temperature protection
occurs for a deglitch time of tD(OCB), the OCB goes low.
Since the OCB pin is an open-drain output, connecting a
resistor to a pull high voltage is necessary.
Enable/Disable
Pull the ENB above 2V or EN below 0.8V will disable the
device, and pull ENB pin below 0.8V or EN above 2V will
enable the device. When the IC is disabled, the supply
current is reduced to less than 1µA. The enable input is
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APL3518/9
Application Information
Input Capacitor
A 1µF ceramic bypass capacitor from VIN to GND, located
near the APL3518/9, is strongly recommended to suppress the ringing during short circuit fault event. Without
the bypass capacitor, the output short may cause sufficient ringing on the input (from supply lead inductance) to
damage internal control circuitry.
Output Capacitor
A low-ESR 150µF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to reduce
the voltage drop during hot-attachment of downstream
peripheral. (Per USB 2.0, output ports must have a minimum 120µF of low-ESR bulk capacitance per hub).
Higher-value output capacitor is better when the output
load is heavy. Additionally, bypassing the output with a
0.1µF ceramic capacitor improves the immunity of the device to short-circuit transients.
Layout Consideration
The PCB layout should be carefully performed to maximize thermal dissipation and to minimize voltage drop,
droop and EMI. The following guidelines must be
considered:
1. Please place the input capacitors near the VIN pin as
close as possible.
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling highfrequency ripples.
3. Locate APL3518/9 and output capacitors near the load
to reduce parasitic resistance and inductance for excellent load transient performance.
4. The negative pins of the input and output capacitors
and the GND pin must be connected to the ground plane
of the load.
5. Keep VIN and VOUT traces as wide and short as possible.
Copyright  ANPEC Electronics Corp.
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APL3518/9
Package Information
SOP-8
D
E
E1
SEE VIEW A
h X 45
°
c
A
0.25
b
GAUGE PLANE
SEATING PLANE
A1
A2
e
L
VIEW A
S
Y
M
B
O
L
SOP-8
INCHES
MILLIMETERS
MIN.
MAX.
MIN.
MAX.
1.75
A
0.069
0.010
0.004
0.25
A1
0.10
A2
1.25
b
0.31
0.51
0.012
0.020
c
0.17
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.157
e
0.049
1.27 BSC
0.050 BSC
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Package Information
MSOP-8
D
b
0.25
A
A1
A2
c
L
GAUGE PLANE
SEATING PLANE
0
e
E
E1
SEE VIEW A
VIEW A
S
Y
M
B
O
L
MSOP-8
MILLIMETERS
MIN.
INCHES
MIN.
MAX.
A
MAX.
0.043
1.10
0.00
0.15
0.000
0.006
A2
0.75
0.95
0.030
0.037
b
0.22
0.38
0.009
0.015
c
0.08
0.23
0.003
0.009
A1
D
2.90
3.10
0.114
0.122
E
4.70
5.10
0.185
0.201
E1
2.90
3.10
0.114
e
0.65 BSC
0.122
0.026 BSC
L
0.40
0.80
0.016
0.031
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MO-187 AA.
2. Dimension “D”does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil
per side.
3. Dimension “E1”does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 5 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
16
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APL3518/9
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-5
INCHES
MILLIMETERS
MIN.
MAX.
0.057
1.45
0.000
0.006
1.30
0.035
0.051
0.50
0.012
0.020
0.22
0.003
0.009
0.122
0.118
0.00
0.15
A2
0.90
b
0.30
c
0.08
A1
MIN.
MAX.
A
D
2.70
3.10
0.106
E
2.60
3.00
0.102
E1
1.40
1.80
0.055
e
0.95 BSC
e1
0.071
0.037 BSC
1.90 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOP-8
Application
MSOP-8
Application
SOT-23-5
A
H
T1
C
d
D
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
T1
C
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
4.0±0.10
8.0±0.10
A
H
330.0±2.00
50 MIN.
P0
P1
12.4+2.00 13.0+0.50
-0.00
-0.20
W
E1
12.0±0.30 1.75±0.10
12.0±0.30 1.75±0.10
F
5.5±0.05
5.5±0.05
P2
D0
D1
T
A0
B0
K0
2.00±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
5.30±0.20
3.30±0.20
1.40±0.20
4.00±0.10
8.00±0.10
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
(mm)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Devices Per Unit
Package Type
Unit
Quantity
SOP-8
Tape & Reel
2500
MSOP-8
Tape & Reel
3000
SOT-23-5
Tape & Reel
3000
Taping Direction Information
SOP-8
USER DIRECTION OF FEED
MSOP-8
USER DIRECTION OF FEED
SOT-23-5
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
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APL3518/9
Classification Profile
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3 °C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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APL3518/9
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Apr., 2011
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