Anpec APL3520DDXAI-TRG Usb dual power-distribution switch Datasheet

APL3520A/B/C/D
USB Dual Power-Distribution Switches
Features
General Description
•
70mΩ High Side MOSFET
•
Continuous Current
The APL3520 series of power switches are designed for
USB applications. The 70mΩ N-channel MOSFET power
switch satisfies the voltage drop requirements of USB
specification.
-APL3520A/B: 1.5A
-APL3520C/D: 1A
•
Wide Supply Voltage Range: 2.7V to 5.5V
•
Current Limit and Short-Circuit Protections
•
Over-Temperature Protection
•
Deglitched Fault Indication Output
•
Logic Level Enable Input
•
Lead Free and Green Devices Available
The protection features include current-limit protection,
short circuit protection, and over-temperature protection.
The device limits the output current at current limit threshold level, and when VOUT drops below 1.5V, the devices
limit the current to a lower and safe level. The OTP limits
the junction temperature below 140 oC in case of short
circuit or over load conditions.
Other features include deglitched OCBx output to indi-
(RoHS Compliant)
•
UL Approved-File No. 20121029-E328191
•
Nemko IEC 60950-1 CB_Scheme Certified, No.
cate the fault condition and ENx input to turn on or turn off
output.
NO70693
•
TUV IEC 60950-1 and EN 60950-1 Certified, No.44
Applications
780 12 406748-007
•
Notebook and Desktop Computers
•
USB Ports
•
High-Side Power Protection Switchs
Simplified Application Circuit
APL3520A/B/C/D
VIN
EN
Control 1
EN
Control 2
VIN
VOUT1
OCB1
EN1/
VOUT2
ENB1
OCB2
EN2/
ENB2 GND
VOUT1
VOUT2
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
1
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APL3520A/B/C/D
Pin Configurations
8 OCB1
GND 1
VIN 2
7 VOUT1
EN1 3
6 VOUT2
EN2 4
GND 1
VIN 2
EN1 3
EN2 4
5 OCB2
8 OCB1
VIN 2
7 VOUT1
ENB1 3
6 VOUT2
ENB2 4
5 OCB2
GND 1
VIN 2
ENB1 3
ENB2 4
8
7
6
5
OCB1
VOUT1
VOUT2
OCB2
GND 1
VIN 2
EN1 3
EN2 4
GND 1
VIN 2
ENB1 3
ENB2 4
TDFN2x2-8
APL3520A/C
(Top Voew)
8
7
6
5
8
7
6
5
OCB1
VOUT1
VOUT2
OCB2
OCB1
VOUT1
VOUT2
OCB2
OCB1
VOUT1
VOUT2
OCB2
8
7
6
5
OCB1
VOUT1
VOUT2
OCB2
GND 1
VIN 2
ENB1 3
ENB2 4
MSOP-8P
APL3520B/D
(Top View)
GND 1
VIN 2
8 OCB1
GND 1
8 OCB1
7 VOUT1
EN1 3
6 VOUT2
VIN 2
ENB1 3
7 VOUT1
6 VOUT2
5 OCB2
ENB2 4
EN2 4
TDFN2x2-8
APL3520B/D
(Top Voew)
8
7
6
5
MSOP-8P
APL3520A/C
(Top View)
MSOP-8
APL3520B/D
(Top View)
SOP-8
APL3520B/D
(Top View)
GND 1
VIN 2
EN1 3
EN2 4
OCB1
VOUT1
VOUT2
OCB2
MSOP-8
APL3520A/C
(Top View)
SOP-8
APL3520A/C
(Top View)
GND 1
8
7
6
5
DFN3x3-8
APL3520A/C
5 OCB2
DFN3x3-8
APL3520B/D
= Exposed Pad
(connected to ground plane for better heat dissipation)
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Ordering and Marking Information
Package Code
K : SOP-8 X : MSOP-8 XA : MSOP-8P
QB : TDFN2x2-8 QA : DFN3x3-8
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Output Current/EN Function
A: 1.5A/Active High
B: 1.5A/ Active Low
C: 1A/Active High
D: 1A/Active Low
Assembly Material
G : Halogen and Lead Free Device
APL3520
Assembly Material
Handling Code
Temperature Range
Package Code
Output Current/EN
Function
APL3520A
XXXXX
APL3520B
XXXXX
APL3520C
XXXXX
APL3520D
XXXXX
XA:
L520A
XXX
XX
L520B
XXX
XX
L520C
XXX
XX
L520D
XXX
XX
XXX - Date Code
XX
APL3520A/B/C/D
QB:
L20A
X
L20B
X
L20C
X
L20D
X
X
- Date Code
APL3520A/B/C/D
QA:
APL
3520A
XXXXX
APL
3520B
XXXXX
APL
3520C
XXXXX
APL
3520D
XXXXX
XXXXX
- Date Code
APL3520A/B/C/D
K:
APL3520A/B/C/D
X:
APL3520A/B/C/D
XXXXX - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
(Note 1)
Rating
Unit
VIN
VIN Input Voltage (VIN to GND)
-0.3 ~ 5.7
V
VOUT1, VOUT2
VOUT1, VOUT2 to GND Voltage
-0.3 ~ 5.7
V
EN1, EN2 to GND Voltage (APL3520A/C)
-0.3 ~ 5.7
V
VENB1, VENB2
ENB1, ENB2 to GND Voltage (APL3520B/D)
-0.3 ~ 5.7
V
VOCB1, VOCB2
OCB1, OCB2 to GND Voltage
-0.3 ~ 5.7
VEN1, VEN2
TJ
Parameter
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
ESD Immunity
HBM (Human Body Mode)
MM (Machine Mode)
V
150
o
-65 ~ 150
o
260
o
C
C
C
2
kV
200
V
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Junction-to-Ambient Resistance in Free Air (Note 2)
θJA
SOP-8
95
MSOP-8
160
MSOP-8P
50
TDFN2x2-8
80
DFN3x3-8
70
o
C/W
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
VIN
Parameter
VIN Input Voltage
IOUT
OUT Output Current (Each Port)
TA
Ambient Temperature
TJ
Range
Unit
2.7 ~ 5.5
V
APL3520A/B
0 ~ 1.5
APL3520C/D
0~1
Junction Temperature
A
-40 ~ 85
o
-40 ~ 125
o
C
C
Note 3 : Refer to the typical application circuit
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN=5V, VEN =5V or VENB=0V and TA= -40 ~ 85 oC. Typical values are
at TA=25oC.
Symbol
Parameter
APL3520
Test Conditions
Unit
Min.
Typ.
Max.
No load, VEN1=VEN2=0V or VENB1=VENB2 =5V
-
-
1
µA
No load, VEN1=VEN2=5V or VENB1=VENB2=0V
-
90
-
µA
Leakage Current
VOUT1=GND, VEN1=0V or VENB1=5V
VOUT2=GND, VEN2=0V or VENB2=5V
-
-
1
µA
Reverse Leakage Current
VIN=GND, VOUT1=5V
VIN=GND, VOUT2=5V
-
0
1
µA
-
70
-
mΩ
IOUT=1A, TA= -40 ~ 85 C
-
70
-
mΩ
VIN rising, TA= -40 ~ 85 oC
1.7
-
2.65
V
-
0.2
-
V
APL3520A/B
-
3.2
3.9
A
APL3520C/D
-
1.7
2.3
A
APL3520A/B
-
1.5
-
A
APL3520C/D
-
0.8
-
A
-
0.2
0.4
V
-
-
1
µA
4
10
15
ms
SUPPLY CURRENT
VIN Supply Current
POWER SWITCH1 & POWER SWITCH2
RDS(ON)
Power Switch On Resistance
IOUT=1A, TA= 25 oC
o
UNDER-VOLTAGE LOCKOUT (UVLO)
VIN UVLO Threshold Voltage
VIN UVLO Hysteresis
PROTECTIONS (CURRENT LIMIT1/2 AND SHORT-CIRCUIT1/2)
ILIM
ISHORT
Current Limit Threshold
Short-Circuit Output Current
VIN=2.7V to 5.5V,
TA= -40 ~ 85 oC
VIN=2.7V to 5.5V
FAULT INDICATION OUTPUT (OCB1 AND OCB2)
tD(OCB)
OCB Output Low Voltage
IOCB=5mA
OCB Leakage Current
VOCB=5V
OCB Deglitch Time
o
OCB assertion, TA= -40 ~ 85 C
ENABLE/DISABLE (EN1/ENB1 AND EN2/ENB2)
VIH
Input Logic HIGH
VIN=2.7V to 5V
2
-
-
V
VIL
Input Logic LOW
VIN=2.7V to 5V
-
-
0.8
V
Input Current
VOUT Discharge Resistance
tD(ON)
tD(OFF)
tSS
VEN=0V or VENB=5V,
Turn on Delay Time
Turn off Delay Time
Soft-Start Time
No load, COUT=1µF, VIN=5V
-
-
1
µA
-
40
100
Ω
-
30
-
µs
-
5
-
µs
-
400
-
µs
-
140
-
°C
-
20
-
°C
OVERT-TEMPERATURE PROTECTION (OTP1 & OTP2)
TOTP
Over-Temperature Threshold
TJ rising
Over-Temperature Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Pin Description
PIN
FUNCTION
NO.
NAME
1
GND
Ground.
2
VIN
Power Supply Input. Connect this pin to external DC supply.
3
4
EN1
(APL3520A/C)
Enable Input. Pulling this pin to high will enable the device and pulling this pin to low will
disable device. The EN1 pin cannot be left floating.
ENB1
(APL3520B/D)
Enable Input. Pulling this pin to high will disable the device and pulling this pin to low will
enable device. The ENB1 pin cannot be left floating.
EN2
(APL3520A/C)
Enable Input. Pulling this pin to high will enable the device and pulling this pin to low will
disable device. The EN2 pin cannot be left floating.
ENB2
(APL3520B/D)
Enable Input. Pulling this pin to high will disable the device and pulling this pin to low will
enable device. The ENB2 pin cannot be left floating.
5
OCB2
Fault Indication Pin. This pin goes low when a current limit or an over-temperature condition
is detected in VOUT2 after a 10ms deglitch time.
6
VOUT2
Output Voltage Pin. The output voltage follows the input voltage. When ENB2 is high or
EN2 is low the output voltage is discharged by an internal resistor.
7
VOUT1
Output Voltage Pin. The output voltage follows the input voltage. When ENB1 is high or
EN1 is low the output voltage is discharged by an internal resistor.
8
OCB1
Fault Indication Pin. This pin goes low when a current limit or an over-temperature condition
is detected in VOUT1 after a 10ms deglitch time.
-
EP
Exposed Pad. Connect it to a large ground plane for heat sinking. (TDFN2x2-8, MSOP-8P)
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Typical Operating Characteristics
Switch On Resistance vs. Junction
Temperature
Switch On Resistance vs. Input
Voltage
130
Switch On Resistance , RDS(on) (mΩ)
Switch On Resistance , RDS(on) (mΩ)
120
100
80
60
40
20
VIN =5V, RLOAD =47Ω, CIN =1uF/X7R,
COUT =10µF/X7R,
RLOAD =47Ω, CIN =1uF/X7R,
COUT =10µF/X7R, TA=25oC
120
110
100
90
80
70
60
50
0
-50
0
50
100
150
2.5
3.0
o
Junction Temperature ( C)
4.5
5.0
5.5
Supply Current vs. Input Voltage
100
100
95
Supply Current, ICC (uA)
95
Supply Current, ICC (uA)
4.0
Input Voltage (V)
Supply Current vs. Junction
Temperature
90
85
80
75
70
90
85
80
75
70
VEN1=VEN2=5V, RLOAD = Open,
CIN =COUTx =33µF/Electrolytic, TA=25℃
65
VIN =VEN1=VEN2=5V, RLOAD = Open,
CIN =COUT =33µF/Electrolytic
65
60
60
-50
0
50
100
2.5
150
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Junction Temperature (oC)
Switch Off Supply Current vs.
Junction Temperature
Current Limit Threshold vs. Input Voltage
4.5
10
VIN = 5V, RLOAD = Open,
CIN = COUT =33µF/Elctrolytic
9
8
Current Limit Threshold, ILIM (A)
Switch Off Supply Current, ICC(OFF) (uA)
3.5
7
6
5
4
3
2
1
4.0
3.5
3.0
2.5
TA =25oC
2.0
0
-50
0
50
100
2.5
150
Junction Temperature C)
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
(o
7
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APL3520A/B/C/D
Typical Operating Characteristics
Current-Limit Response vs. Output
Peak Current
Current Limit Threshold vs.
Junction Temperature
5.0
APL3520A,
VIN = 5V, TA =25oC
250
Current Limit Threshold, ILIM (A)
Current-Limit Response (µs)
300
200
150
100
50
4.5
4.0
3.5
3.0
2.5
2.0
0
0
2
4
6
8
10
-50
Output Peak Current (A)
100
150
Junction Temperature C)
EN pin Threshold Voltage vs.
Junction Temperature
1.6
3.0
TA=25oC
EN pin Threshold Voltage, VEN (V)
Short-Circuit Output Current, ISHORT (A)
50
(o
Short-Circuit Output Current vs.
Input Voltage
1.5
1.4
1.3
1.2
1.1
1.0
2.5
2.0
EN Rising
1.5
EN Falling
1.0
VIN =5V, RLOAD =50Ω,
CIN = COUT =33µF/Elctrolytic
0.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-50
0
50
100
150
Junction Temperature (oC)
Input Voltage (V)
Turn-Off Leakage Current vs.
Junction Temperature
EN pin Threshold Voltage vs.
Input Voltage
2.1
4.0
Turn-Off Leakage Current, ILEAK (uΑ)
EN pin Threshold Voltage, VEN (V)
0
2.0
1.9
1.8
1.7
1.6
EN Rising
1.5
1.4
1.3
EN Falling
1.2
1.1
RLOAD =50Ω,
CIN = COUT =33µF/Elctrolytic,
TA=25oC
1.0
0.9
0.8
2.5
3.0
3.5
4.0
4.5
5.0
VIN =5V, RLOAD =0Ω,
CIN = COUT =33µF/Elctrolytic
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50
5.5
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
3.5
0
50
100
150
o
Junction Temperature ( C)
8
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APL3520A/B/C/D
Typical Operating Characteristics
OCB Deglitch Time vs. Input
Voltage
OCB Deglitch Time vs. Junction
Temperature
15
OCB Deglitch Time , TD(OCB) (ms)
OCB Deglitch Time , TD(OCB) (ms)
15
14
13
12
11
10
9
RLOAD =1Ω,
CIN = COUT =33µF/Elctrolytic
8
14
13
12
11
10
9
RLOAD =1Ω,
CIN = COUT =33µF/Elctrolytic
8
7
7
-50
0
50
100
2.5
150
3.0
UVLO Threshold Voltage vs.
Junction Temperature
4.5
5.0
5.5
Output Voltage vs. Output
Current
3.2
6
2.8
Output Voltage, VOUT (V)
UVLO Threshold Voltage, VVLOC (V)
4.0
Input Voltage (V)
Junction Temperature (oC)
UVLO Rising
2.4
UVLO Falling
2.0
1.6
VIN Increasing, RLOAD =15mΩ,
CIN = COUT =33µF/Elctrolytic
1.2
5
4
3
2
1
0.8
APL3520A,
VIN=5V, TA=25℃
0
-50
0
50
100
150
0.0
0.5
o
Junction Temperature ( C)
1.0
1.5
2.0
2.5
3.5
3.0
Output Current (A)
Turn-On Rising Time vs.
Junction Temperature
Output Voltage vs. Output Current
6
Output Voltage, VOUT (V)
350
Turn-On Rising Time, tR (us)
3.5
300
250
200
150
5
4
3
2
100
1
50
VIN = 5V, RLOAD =30Ω, VOUT 10%~90%
CIN = 33µF/Elctrolytic, COUT =1µF/X7R
0
0
-50
0
50
100
0.0
150
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Output Current (A)
Junction Temperature (oC)
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
APL3520C,
VIN=5V, TA=25℃
9
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APL3520A/B/C/D
Operating Waveforms
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Turn On Response
Turn Off Response
VEN 1
VEN1
1
1
VEN2
VEN 2
2
2
VOUT1
VOUT 1
3
3
V OUT2
4
V OUT2
4
V IN =5V, RLOAD =30Ω, CIN =33uF/Electrolytic ,
COUT =1µF/Electrolytic,
CH1: VEN1, 5V/Div, DC
CH2: VEN2, 5V/Div, DC
CH3: VOUT1, 2V/Div, DC
CH4: VOUT2, 2V/Div, DC
TIME: 200us/Div
UVLO at Rising
VIN =5V, RLOAD =30Ω, CIN =33uF/Electrolytic,
COUT =1µF/Electrolytic,
CH1: VEN1, 5V/Div, DC
CH2: VEN2, 5V/Div, DC
CH3: VOUT 1, 2V/Div, DC
CH4: VOUT 2, 2V/Div, DC
TIME: 200us/Div
UVLO at Falling
VIN
VIN
1
1
VOUT1
V OUT1
2
2
VOUT2
V OUT2
3
3
VIN =5V, RLOAD =30Ω, EN1 and EN2 tied to VIN,
CIN =33uF/Electrolytic, COUT =1µF/Electrolytic ,
CH1: VIN, 2V/Div, DC
CH2: VOUT 1, 1V/Div, DC
CH3: VOUT 2, 1V/Div, DC
TIME:5ms/Div
VIN =5V, RLOAD =30Ω, EN1 and EN2 tied to VIN,
CIN =33uF/Electrolytic, COUT =1µF/Electrolytic ,
CH1: VIN, 2V/Div, DC
CH2: VOUT1, 2V/Div, DC
CH3: VOUT2, 2V/Div, DC
TIME:5ms/Div
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Operating Waveforms
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
OCB Response during Short Circuit
OCB Response during Over Load
VOCBx
VOCBx
1
1
VOUTx
VOUTx
2
2
I OUTx
IOUTx
3
3
VIN =5V, VOUTx switched into ground,
CIN =COUT =33uF/Electrolytic
CH1: VOCBx , 5V/Div, AC
CH2: VOUTx , 2V/Div, DC
CH3: IOUTx , 5A/Div, DC
TIME: 2ms/Div
VIN =5V, RLOAD =1Ω touches VOUTx,
CIN =COUT =33uF/Electrolytic
CH1: VOCBx , 5V/Div, AC
CH2: VOUTx , 2V/Div, DC
CH3: IOUTx , 2A/Div, DC
TIME: 2ms/Div
OCB Response with Ramped Load
Load-Transient
VOCBx
VOUT
V IN
VOUTx
1
VOUTx
I OUTx
2
3
I OUTx
1
I OUT
3
2
VIN =5V, IOUT =0 to 2A, CIN
=COUT=33uF/Electrolytic
CH1: VIN, 2V/Div, DC
CH2: VOUTx , 1V/Div, DC
CH3: IOUT , 2A/Div, DC
VIN =5V, CIN =COUT=33uF/Electrolytic
CH1: VOCBx, 5V/Div, AC
CH2: VOUTx , 2V/Div, DC
CH3: IOUT , 5A/Div, DC
TIME: 2ms/Div
TIME: 20µs/Div
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Block Diagram
VIN
VOUT1
UVLO
Charge
Pump1
Short-Circuit
Protection 1
Current
Limit1
Gate Driver and
Control Logic1
EN1/
ENB1
OCB1
GND
OTP1
VOUT2
Charge
Pump2
EN2/
ENB2
Short-Circuit
Protection2
Current
Limit2
Gate Driver and
Control Logic2
OCB2
OTP2
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Typical Application Circuit
3.3V
COUT1
0.1µF 150µF
5V
CIN
1µF
50kΩ
VIN
USB Port1
VBUS
VOUT1
D+
APL3520A/B/C/D
DOCB1
GND
EN1/ENB1
USB
Controller
COUT2
50kΩ
0.1µF 150µF
OCB2
VOUT2
USB Port2
VBUS
EN2/ENB2
D+
GND
DGND
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APL3520A/B/C/D
Function Description
VIN Under-Voltage Lockout (UVLO)
than 1µA. The enable input is compatible with both TTL
The APL3520 series of power switches have a built-in
and CMOS logic levels. The EN1/EN2 or ENB1/ENB2 pin
cannot be left floating.
under-voltage lockout circuit to keep the output shutting
off and discharging through an internal resistor until in-
Over-Temperature Protection
ternal circuitry is operating properly. The UVLO circuit has
hysteresis and a de-glitch feature so that it will typically
When the junction temperature exceeds 140oC, the inter-
ignore undershoot transients on the input. When input
voltage exceeds the UVLO threshold, the output voltage
nal thermal sense circuit turns off the power FET and
allows the device to cool down. When the device’s junc-
starts a soft-start to reduce the inrush current.
tion temperature cools by 20 oC, the internal thermal
sense circuit will enable the device, resulting in a pulsed
Power Switch
output during continuous thermal protection. Thermal
protection is designed to protect the IC in the event of
The power switches are N-channel MOSFETs with low
RDS(ON). The internal power MOSFETs do not have the body
over temperature conditions. For normal operation, the
junction temperature cannot exceed TJ=+125oC.
diode. When IC is off, the MOSFETs prevent current flowing from the VOUTx back to VIN and VIN to VOUTx.
Current-Limit Protection
The APL3520 series of power switches provide the current-limit protection function. During current limit, the devices limit output current at current limit threshold. For
reliable operation, the device should not be operated in
current limit for extended period.
Short-Circuit Protection
When the output voltage drops below 1.5V, which is
caused by an over-load or a short-circuit, the devices limit
the output current down to a safe level. The short-circuit
current limit is used to reduce the power dissipation during short-circuit conditions. If the junction temperature
reaches over-temperature threshold, the device will enter the thermal shutdown.
OCB Output
The APL3520 series of power switches provide an opendrain output to indicate that a fault has occurred. When
any of current limit or over-temperature protection occurs
for a deglitch time of tD(OCB), the OCB1/OCB2 goes low.
Since the OCB1/OCB2 pin is an open-drain output, connecting a resistor to a pull high voltage is necessary.
Enable/Disable
Pull the ENB1/ENB2 above 2V or EN1/EN2 below 0.8V
will disable the device, and pull ENB1/ENB2 pin below
0.8V or EN1/EN2 above 2V will enable the device. When
the IC is disabled, the supply current is reduced to less
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APL3520A/B/C/D
Application Information (Cont.)
Recommended Minimum Footprint
5.385
0.28
1.537
2.49
1.27
0.305
0.5
0.66
2.49
1.83
Unit: mm
Unit: mm
SOP-8
MSOP-8P
0.23
0.57
0.24
1.537
1.3
0.305
0.50
0.66
0.8
4.585
Unit: mm
Unit: mm
MSOP-8
TDFN2X2-8
0.305
0.61
2.146
0.305
0.66
1.575
Unit: mm
DFN3X3-8
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APL3520A/B/C/D
Package Information
SOP-8
D
E
E1
SEE VIEW A
h X 45
°
c
A
0.25
b
GAUGE PLANE
SEATING PLANE
A1
A2
e
L
VIEW A
S
Y
M
B
O
L
SOP-8
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.75
0.069
0.004
0.25
0.010
A1
0.10
A2
1.25
b
0.31
0.51
0.012
0.020
c
0.17
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.157
e
0.049
1.27 BSC
0.050 BSC
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
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APL3520A/B/C/D
Package Information
MSOP-8
D
b
0.25
A
A1
A2
c
L
GAUGE PLANE
SEATING PLANE
0
e
E
E1
SEE VIEW A
VIEW A
S
Y
M
B
O
L
MSOP-8
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.10
0.043
0.00
0.15
0.000
0.006
A2
0.75
0.95
0.030
0.037
b
0.22
0.38
0.009
0.015
c
0.08
0.23
0.003
0.009
A1
D
2.90
3.10
0.114
0.122
E
4.70
5.10
0.185
0.201
E1
2.90
3.10
0.114
e
0.65 BSC
0.122
0.026 BSC
L
0.40
0.80
0.016
0.031
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MO-187 AA.
2. Dimension “D”does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil
per side.
3. Dimension “E1”does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 5 mil per side.
Copyright  ANPEC Electronics Corp.
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APL3520A/B/C/D
Package Information
MSOP-8P
D
SEE VIEW A
E
c
A
0.25
b
GAUGE PLANE
SEATING PLANE
A1
L
0
A2
e
E1
EXPOSED
PAD
E2
D1
VIEW A
S
Y
M
B
O
L
A
MSOP-8P
INCHES
MILLIMETERS
MIN.
MAX.
MIN.
MAX.
1.10
0.043
A1
0.00
0.15
0.000
0.006
A2
0.75
0.95
0.030
0.037
b
0.22
0.38
0.009
0.015
c
0.08
0.23
0.003
0.009
D
2.90
3.10
0.114
0.122
D1
1.50
2.50
0.059
0.098
E
4.70
5.10
0.185
0.201
E1
2.90
3.10
0.114
0.122
E2
1.50
2.50
0.059
0.098
e
0.65 BSC
0.026 BSC
L
0.40
0.80
0.016
0.031
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MO-187 AA-T
2. Dimension “D”does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not flash or protrusions.
3. Dimension “E1” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 6 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
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APL3520A/B/C/D
Package Information
TDFN2x2-8
A
b
E
D
A1
D2
A3
L
E2
Pin 1 Cornar
e
S
Y
M
B
O
L
TDFN2x2-8
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.70
0.80
0.028
0.031
A1
0.00
0.05
0.000
0.002
A3
0.20 REF
0.008 REF
b
0.18
0.30
0.007
0.012
D
1.90
2.10
0.075
0.083
D2
1.00
1.60
0.039
0.063
E
1.90
2.10
0.075
0.083
E2
0.60
1.00
0.024
0.039
e
L
0.50 BSC
0.30
0.020 BSC
0.012
0.45
0.018
Note : 1. Followed from JEDEC MO-229 WCCD-3.
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APL3520A/B/C/D
Package Information
DFN3x3-8
D
b
E
A
Pin 1
A1
D2
A3
L
K
E2
Pin 1 Corner
e
S
Y
M
B
O
L
DFN3x3-8
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.80
1.00
0.031
0.039
A1
0.00
0.05
0.000
0.002
A3
0.20 REF
0.008 REF
b
0.25
0.35
0.010
0.014
D
2.90
3.10
0.114
0.122
0.094
D2
1.90
2.40
0.075
E
2.90
3.10
0.114
0.122
E2
1.40
1.75
0.055
0.069
0.50
0.012
e
0.65 BSC
L
0.30
K
0.20
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
0.026 BSC
0.020
0.008
20
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APL3520A/B/C/D
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOP-8
MSOP-8(P)
TDFN2x2-8
DFN3x3-8
A
H
T1
C
d
D
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
T1
C
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
4.0±0.10
8.0±0.10
A
H
330.0±2.00
50 MIN.
P0
P1
12.4+2.00 13.0+0.50
-0.00
-0.20
P2
D0
1.5+0.10
-0.00
12.0±0.30 1.75±0.10
12.0±0.30 1.75±0.10
F
5.5±0.05
5.5±0.05
T
A0
B0
K0
1.5 MIN.
0.6+0.00
-0.40
5.30±0.20
3.30±0.20
1.40±0.20
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
8.0±0.20
1.75±0.10
3.50±0.05
D1
A0
B0
K0
2.35±0.20
2.35±0.20
1.30±0.20
d
T
0.6+0.00
-0.4
D
W
E1
F
12.0±0.30 1.75±0.10
8.00±0.10
2.00±0.05
A
H
178.0±2.00
50 MIN.
P0
P1
T1
8.4+2.00
-0.00
P2
4.0±0.10
4.0±0.10
2.0±0.05
A
H
T1
C
13.0+0.50
-0.20
D0
1.5+0.10
-0.00
C
178.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
P0
P1
P2
D0
D1
T
4.0±0.10
8.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
21
E1
D1
4.00±0.10
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Nov., 2012
W
1.5 MIN.
0.6+0.00
-0.40
5.5±0.05
A0
B0
K0
3.30±0.20
3.30±0.20
1.30±0.20
(mm)
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APL3520A/B/C/D
Devices Per Unit
Package Type
Unit
Quantity
SOP-8
Tape & Reel
2500
MSOP-8(P)
Tape & Reel
3000
TDFN2x2-8
Tape & Reel
3000
DFN3x3-8
Tape & Reel
3000
Taping Direction Information
SOP-8
USER DIRECTION OF FEED
MSOP-8(P)
USER DIRECTION OF FEED
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APL3520A/B/C/D
Taping Direction Information (Cont.)
TDFN2x2-8
USER DIRECTION OF FEED
DFN3x3-8
USER DIRECTION OF FEED
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APL3520A/B/C/D
Classification Profile
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APL3520A/B/C/D
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
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Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APL3520A/B/C/D
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
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