Anpec APL3534BAI-TRG Compact, small package 1a power-distribution switch Datasheet

APL3534/A/B
Compact, Small Package 1A Power-Distribution Switches
General Description
Features
•
•
•
•
•
•
•
•
•
•
•
•
High Side N-MOSFET with Internal Charge Pump
1A Continuous Current
The APL3534/A/B is a power-distribution switch with current- limiting function and output OVP protections that can
Built-in Soft-Start
Wide Supply Voltage Range
deliver current up to 1A. The device incorporates a 110mΩ
N-channel MOSFET power switch.
Current-Limit and Short-Circuit Protections
Input Voltage Under Voltage Lockout Protection
The device integrates some protection features, including current-limit protection, output over-voltage protection,
Reverse Current Blocking when Switch Disabled
Output OVP Protection
over-temperature protection and UVLO. The current-limit
protection can protect down-stream devices from cata-
Reverse Current-Limit Protection
Output Discharge
strophic failure by limiting the output current at currentlimit threshold during over-load or short-circuit events.
Over-Temperature Protection
Lead Free and Green Devices Available (RoHS
The output over-voltage protection can prevent current
flowing from VOUT to VIN when an abnormally high volt-
Compliant)
age exists in VOUT. The over-temperature protection function shuts down the N-channel MOSFET power switch
o
when the junction temperature rises beyond 140 C and
will automatically turns on the power switch when the
o
temperature drops by 20 C. The UVLO function keeps
the power switch in off state until there is a valid input
Applications
•
•
•
HDMI Port Protection Switches
voltage present.
The device is available in lead free SOT-23-3 and
Bluetooth Protection Switches
SOT-23-5 packages.
High-side Power Protection Switches
Pin Configuration
Simplified Application Circuit
GND 1
VIN
VOUT
3 VIN
VOUT 2
APL3534
APL3534
SOT-23-3
GND
VIN
GND 1
EN 2
VOUT 3
5 NC
4 VIN
APL3534A
SOT-23-5
VOUT
APL3534A/B
5 NC
GND 1
ENB 2
VOUT 3
EN/ENB
GND
4 VIN
APL3534B
SOT-23-5
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Oct., 2013
1
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APL3534/A/B
Ordering and Marking Information
Enable Function
Blank : No Enable Function A : Active High
B : Active Low
Package Code
A : SOT-23-3 B : SOT-23-5
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APL3534
Assembly Material
Handling Code
Temperature Range
Package Code
Enable Function
APL3534 A:
L34X
X - Date Code
APL3534A B:
L34AX
X - Date Code
APL3534B B:
L34BX
X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VIN
VOUT
VEN, VENB
TJ
TSTG
TSDR
(Note 1)
Rating
Unit
VIN to GND Voltage
Parameter
-0.3 ~ 6.5
V
VOUT to GND Voltage
-0.3 ~ 6.5
V
EN, ENB to GND Voltage
-0.3 ~ 6.5
Maximum Junction Temperature
-40 ~ 150
o
-65 ~ 150
o
260
o
Storage Temperature
Maximum Lead Soldering Temperature (10 Seconds)
V
C
C
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
θJA
(Note 2)
Parameter
Typical Value
Junction-to-Ambient Resistance in free air (SOT-23-3, SOT-23-5)
Unit
o
260
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Recommended Operating Conditions (Note 3)
Symbol
Parameter
VIN
VIN Input Voltage
IOUT
OUT Output Current
TA
Ambient Temperature
TJ
Range
Unit
2.7~ 5.4
V
0~1
Junction Temperature
A
-40 ~ 85
o
-40 ~ 125
o
C
C
Note 3: Refer to the typical application circuit.
Electrical Characteristics
o
VIN=5V, VEN=5V or VENB=0V and TA=25 C (unless otherwise noted).
Symbol
Parameter
APL3534/A/B
Test Conditions
Unit
Min.
Typ.
Max.
2.35
2.5
2.65
V
-
0.1
-
V
UNDER-VOLTAGE LOCKOUT
VIN UVLO Threshold Voltage
VIN rising
VIN UVLO Hysteresis
SUPPLY CURRENT
IVIN
VIN Supply Current
No load,
VEN = High (or VENB = Low)
-
100
150
µA
ISD
VIN Shutdown Current
No load,
VEN = Low (or VENB = High)
-
-
1
µA
OUT Leakage Current
VOUT tied to ground,
VEN =Low (or VENB = High)
-
-
1
µA
OUT Input Current
VOUT=5V, VIN = 0V, no matter VEN =
Low or High
-
-
1
µA
VIN=5V, IOUT=1A, TJ=25oC
-
110
140
mΩ
VIN=5V, IOUT=1A, TJ=-40~125oC
-
-
175
mΩ
VIN=3.3V, IOUT=1A, TJ=25oC
-
120
155
mΩ
-
-
195
mΩ
TJ=25oC,
1.3
1.6
1.9
A
TJ=-40~125oC
1.05
-
-
A
VOUT<1.2V (This function is disabled
during soft start interval)
0.3
0.6
1
A
VOUT - VIN=1V, TJ=25oC
0.3
0.5
0.7
A
-
0.7
-
ms
5.5
5.75
6
V
-
20
-
µs
1
2.5
4
ms
POWER SWITCH
RDS(ON)
Power Switch On Resistance
o
VIN=3.3V, IOUT=1A, TJ=-40~125 C
CURRENT-LIMIT PROTECTIONS
ILIM
ISHORT
Current-Limit Threshold
Short-Circuit Output Current
OUTPUT OVER-VOLTAGE PROTECTS
IRV
tRVDEG
Reverse Current Blocking Threshold
Reverse Current Blocking Deglitch Time Guaranteed by Design
VOVP
Output OVP Threshold
TOVD
Output OVP Delay Time
SOFT-START CONTROL PIN
tSS
Soft-Start Time
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
VIN=5V, VOUT=10% to 90%
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APL3534/A/B
Electrical Characteristics (Cont.)
o
VIN=5V, VEN=5V or VENB=0V and TA=25 C (unless otherwise noted).
Symbol
Parameter
APL3534/A/B
Test Conditions
Unit
Min.
Typ.
Max.
-
40
-
Ω
Input Logic High
2
-
-
V
Input Logic Low
-
-
0.8
V
OUTPUT DISCHARGE AND ENABLE
VOUT Discharge Resistance
VEN, VENB
VIN=5V, VEN=Low(or VENB=High),
VOUT=1V
EN, ENB Input Current
VEN=5V or VENB=5V
-
-
1
µA
EN, ENB Leakage
VEN=0V or VENB=0V
-
-
1
µA
TJ rising
-
140
-
°C
-
20
-
°C
OUTPUT TEMPERATURE PROTECTION (OTP)
TOTP
Over-Temperature Threshold
Over-Temperature Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Pin Description
PIN
FUNCTION
NO.
NAME
SOT-23-3
SOT-23-5
1
1
GND
2
3
VOUT
3
4
VIN
-
2
EN/ENB
-
5
NC
Ground.
Output Voltage Pin. The output voltage follows the input voltage. When EN is low or
VIN is UVLO, the output voltage is discharged by an internal resistor.
Power Supply Input Connect this pin to external DC supply.
Pulling the ENB above 2V or EN below 0.8V will disable the device, and pulling ENB
pin below 0.8V or EN above 2V will enable the device.
The EN and ENB pins cannot be left floating.
Not Connected Internally.
Block Diagram
VOUT
VIN
UVLO
Charge
Pump
Current- Limit
&
Short Current Limit
Gate Driver and
Control Logic
OVP
EN / ENB
(SOT-23-5)
OTP
GND
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Typical Application Circuit
SOT-23-5
SOT-23-3
VIN
0.1µF
3
VIN
VOUT
2
APL3534
VIN
VOUT
0.1µF
4
VIN
VOUT
3
VOUT
0.1µF
0.1µF
APL3534A
GND
On
1
Off
2
EN
GND
1
SOT-23-5
VIN
4
3
VIN
VOUT
VOUT
0.1µF
0.1µF
APL3534B
Off
On
2
ENB
GND
1
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Function Description
VIN Under-voltage Lockout (UVLO)
Output Over-Voltage Protection
The APL3534/A/B power switch has a built-in under-volt-
The output over-voltage protection is implemented by 2
either sensing mechanisms. One is by sensing when
age lockout circuit to keep the output shut off until internal
circuitry is operating properly. The UVLO circuit has hys-
VOUT voltage is above VOVP threshold, the internal power
MOSFET is turned off. The other is by sensing when re-
teresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. When input volt-
verse current, flowing from VOUT to VIN, surpasses IRV.
When the reverse current reachers the reverse current
age exceeds the UVLO threshold, the output voltage starts
a soft-start to reduce the inrush current.
Blocking threshold, the device limits the reveres current
at IRV threshold level. When the reverse current fault ex-
Power Switch
ists for more than 0.7ms, the internal power MOSFET is
turned off. The internal power MOSFET is allowed to turn-
The power switch is an N-channel MOSFET with a low
RDS(ON). The internal power MOSFET does not have the
on once the output voltage gose below VIN-1.2V.
body diode. When IC is in UVLO state, the MOSFET prevents a current flowing from the VOUT back to VIN and
Output Discharge
VIN to VOUT.
When the input voltage is under VIN UVLO Threshold or
VEN=Low or VENB=High, the output discharge device is
Current-Limit Protection
The APL3534/A/B power switch provides the current-limit
protection function. During current-limit, the devices limit
turned on to discharge the output voltage.
output current at current-limit threshold. For reliable
operation, the device should not be operated in current-
Enable/Disable (SOT-23-5)
limit for extended period time.
the device, and pulling ENB pin below 0.8V or EN above
2V will enable the device.
Short-Circuit Protection
When the output voltage drops below 1.2V, which is
When the IC is disabled the supply current is reduced to
less than 1µA. The enable input is compatible with both
caused by the over load or short-circuit, the devices limit
the output current down to a safe level. The short-circuit
TTL and CMOS logic levels. The EN/ENB pins cannot be
left floating.
current-limit is used to reduce the power dissipation during short-circuit condition. If the junction temperature is
Over-temperature Protection
over the thermal shutdown temperature the device will
enter the thermal shutdown. This Function is disabled
When the junction temperature exceeds 140 C, the internal thermal sense circuit turns off the power FET and
during soft-start interval.
allows the device to cool down. When the device’s junco
tion temperature cools by 20 C, the internal thermal sense
Soft-Start
circuit will enable the device, resulting in a pulsed output
during continuous thermal protection. Thermal protec-
Pulling the ENB above 2V or EN below 0.8V will disable
o
The APLA3534/A/B has a built-in output soft-start control
tion is designed to protect the IC in the event of overtemperature conditions. For normal operation, the junc-
to limit the current surge during start-up. The soft-start
interval is 2.5ms.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
tion temperature cannot exceed TJ=+125oC.
7
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APL3534/A/B
Application Information
Input Capacitor
Recommanded Minimum Footprit
The APL3534/A/B requires proper input capacitance to
supply current surge during stepping load transients to
0.037
0.057
prevent the input voltage rail from dropping. Because the
parasitic inductor from the voltage sources or other bulk
capacitors to the VIN pin limit the slew rate of the surge
currents, more parasitic inductance needs more input
0.102
0.024
capacitance.
A ceramic input capacitor (0.1 to 10µF) from VIN to GND,
located near the APL3534/A/B, is strongly recommended
to suppress the ringing during short circuit fault event.
0.074
Without the input capacitor, the output short may cause
sufficient ringing on the input (from supply lead inductance)
Unit : Inch
SOT-23-3
to damage internal control circuitry.
0.076
Layout Consideration
The PCB layout should be carefully performed to maxi-
0.1
mize thermal dissipation and to minimize voltage drop,
droop and EMI. The following guidelines must be
considered:
0.05
1. Please place the input capacitors near the VIN pin as
close as possible.
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling highfrequency ripples.
0.038
0.02
Unit : Inch
SOT-23-5
3. Locate APL3534/A/B and output capacitors near the
load to reduce parasitic resistance and inductance for
excellent load transient performance.
4. The negative pins of the input and output capacitors
and the GND pin must be connected to the ground plane
of the load.
5. Keep VIN and VOUT traces as wide and short as possible.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Package Information
SOT-23-3
D
e
E
E1
SEE
VIEW A
c
b
0.25
A
L
GAUGE PLANE
SEATING PLANE
0
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-3
INCHES
MILLIMETERS
MIN.
MIN.
MAX.
A
MAX.
0.057
1.45
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
e
0.95 BSC
e1
0.071
0.037 BSC
1.90 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-5
INCHES
MILLIMETERS
MIN.
A
MAX.
0.057
1.45
0.000
0.006
1.30
0.035
0.051
0.50
0.012
0.020
0.22
0.003
0.009
0.122
0.118
0.00
0.15
A2
0.90
b
0.30
c
0.08
A1
MIN.
MAX.
D
2.70
3.10
0.106
E
2.60
3.00
0.102
E1
1.40
1.80
0.055
e
0.95 BSC
e1
0.071
0.037 BSC
1.90 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOT-23-3
Application
SOT-23-5
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-3
Tape & Reel
3000
SOT-23-5
Tape & Reel
3000
Copyright  ANPEC Electronics Corp.
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APL3534/A/B
Taping Direction Information
SOT-23-3
USER DIRECTION OF FEED
SOT-23-5
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Classification Profile
Supplier Tp≧Tc
User Tp≦Tc
TC
TC -5oC
User tp
Supplier tp
Tp
tp
Temperature
Max. Ramp Up Rate = 3oC/s
Max. Ramp Down Rate = 6oC/s
TL
Tsmax
TC -5oC
t
Preheat Area
Tsmin
tS
25
Time 25oC to Peak
Time
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3 °C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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APL3534/A/B
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2013
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