Anpec APL5538 Dual channel 300ma regulator reset ic Datasheet

APL5538
Dual Channel 300mA Regulator + Reset IC
Features
General Description
•
Low Quiescent Current : 110µA (No load)
The APL5538 is a dual-channel regulator with reset
•
Low Dropout Voltage :
function (specific voltage monitoring), and internal de-
VDROP1=350mV@300mA
lay circuit, set to detect 3.9V or 4.2V. Maximum in-
VDROP2=350mV@300mA
put voltage is 6V, output1 and output2 deliver up to
Fixed Output Voltage :
300mA. VOUT1 typical dropout voltage is 350mV at
•
VOUT1=3.3V/300mA
300mA loading and VOUT2 typical dropout voltage is
VOUT2=3.3V/300mA
350mV at 300mA loading. Design with an internal P-
•
Stable with 2.2µF Output Capacitor
channel MOSFET pass transistor, the APL5538 main-
•
Stable with Aluminum, Tantalum or Ceramic
tains a low supply current. Other features include,
Capacitors
thermal-shutdown protection, current limit protection
•
Built in Thermal Protection
to ensure specified output current. The APL5538 come
•
Fast Transient Response
in miniature SOP-8 and SOP-8-P packages.
•
Short Setting Time
•
SOP-8, SOP-8-P with Thermal Pad Packages
•
Adjustment-free Reset Detection Voltage :
Pinouts
3.9V or 4.2V typ
•
SOP-8 Top View
Easy to Set Delay Time from Voltage
Detection to Reset Release
C d
1
8
C O N T
R E S E T
2
7
G N D
3
6
V
O U T 2
4
5
V
O U T 1
V
D E T
V
Applications
•
IN
SOP-8-P Top View
CD-ROM drive.
C d
1
8
C O N T
R E S E T
2
7
G N D
3
6
V
O U T 2
4
5
V
O U T 1
V
D E T
V
IN
APL5538
= Thermal Pad
(connected to GND plane for better heat
dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
1
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APL5538
Ordering and Marking Information
Package Code
K : SOP-8
KA : SOP-8-P
Temp. Range
C : 0 to 70 °C
I : -40 to 85 °C
Handling Code
TR : Tape & Reel
Detection Voltage :
A : 3.9V
B : 4.2V
Lead Free Code
L : Lead Free Device
Blank : Orginal Device
APL5538 Lead Free Code
Handling Code
Temp. Range
Package Code
Detection Voltage
APL5538 K / KA :
APL5538X
XXXXX
X
- Detection Voltage
XXXXX - Date Code
Pin Description
PIN
Name
No.
1
Cd
2
3
4
5
6
7
8
RESET
VDET
VIN
VOUT1
VOUT2
GND
CONT
I/O
O
I
I
O
O
I
Description
Delay time capacitor pin, RESET pin output delay time can be set by
the capacitor connected to the Cd pin. tPLH = 130000∗C, tPLH :
transmission delay time (s), C:capacitor value (F)
Input voltage detection output pin , low = VDET<VS , high = VDET>VS
Input pin of voltage detection.
Voltage supply input pin.
Regulator output pin.
Regulator output pin.
GND pin
VOUT1 on/off-control pin, VOUT1 will be turn off when CONT pull to low.
Absolute Maximum Ratings
Symbol
VIN, VOUT
CONT
VDET
RTH,JA
RTH,JC
Parameter
Input Voltage or Out Voltage
Rating
6.5
Unit
V
VOUT1 Shutdown Control Pin
6.5
V
RESET Pin Supply Voltage
Thermal Resistance – Junction to Ambient
SOP-8
SOP-8-P
Thermal Resistance – Junction to Case
SOP-8
6.5
V
130
80
°C/W
30
°C/W
SOP-8-P
5
PD
Power Dissipation
TJ
Operating Junction Temperature
Control Section
Power Transistor
TSTG
TL
Storage Temperature Range
Lead Temperature (Soldering, 10 second)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
2
Internally Limited
W
0 to 125
°C
0 to 150
-65 to +150
°C
260
°C
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APL5538
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=2.2µF,
COUT2=2.2µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
Parameter
Input Voltage
Quiescent Current
IQ
Shutdown Supply Current
ICONT Shutdown Input Bias current
High Threshold Voltage
VCONT
Low Threshold Voltage
ICCQ VDET Input Current
Regulator1
Test Conditions
APL5538
Min.
Typ.
20
Max.
6
220
140
0.1
VIN+0.3
0.4
40
3.3
3.366
VIN
VOUT1
Output Voltage
ILIMIT
Circuit Current Limit
Load Current
IOUT
REGLINE Line Regulation
REGLOAD Load Regulation
(Note)
Dropout Voltage
VDROP (VOUT(Nominal)=3.3V
Version)
PSRR Ripple Rejection
TC
COUT
110
70
1.6
-0.3
VDET =5V
VIN=5V
VIN=5V
3.234
800
F≤1kHz, 1Vpp at IOUT=50mA
C =10nf
µA
V
mA
4
20
0.1
350
6
60
450
mV
mV
%
mV
dB
150
°C
Over Temperature Shutdown
Hysteresis
Hysteresis
10
°C
Output Voltage Temperature
Ta= -20 ~ 80°C
Coefficient
100
ppm/°C
Output Capacitor
2.2
µF
ESR
45
V
mA
300
VOUT+0.5V< VIN<6.0V, IOUT=10mA
VIN =5V, 0mA< IOUT < IMAX
515X
IOUT =300mA
V
µA
µA
µA
50
Over Temperature Shutdown
OTS
IOUT1 =0mA, IOUT2 =0mA
CONT = low, IOUT2=0mA
VCONT =VIN
Unit
0.01
1
Ohm
3.366
V
Regulator2
VOUT2
Output Voltage
ILIMIT
Circuit Current Limit
Load Current
IOUT
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
VIN=5V
VIN=5V
3.234
3.3
800
300
3
mA
mA
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APL5538
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=2.2µF,
COUT2=2.2µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
Parameter
REGLINE Line Regulation
REGLOAD Load Regulation
TC
COUT
Output Voltage
Temperature
Coefficient
Min.
VOUT+0.5V< VIN<6.0V, IOUT=10mA
VIN =5V, 0mA< IOUT < IMAX
(Note)
Dropout Voltage
VDROP (VOUT(Nominal)=3.3V
Version)
PSRR Ripple Rejection
Over Temperature
Shutdown
OTS
Over Temperature
Shutdown Hysteresis
APL5538
Test Conditions
515X
IOUT =300mA
F≤1kHz, 1Vpp at IOUT=50mA
C =10nf
45
Typ.
Max.
4
20
0.1
350
6
60
450
Unit
mV
mV
%
mV
50
dB
150
°C
Hysteresis
10
°C
Ta= -20 ~ 80°C
100
ppm/°C
2.2
µF
Output Capacitor
ESR
0.01
1
Ohm
RESET / RESET
VS
Detection Voltage
VDET=HàL (APL5538A)
3.822
3.9
3.978
VDET=HàL (APL5538B)
4.116
4.2
4.284
Vs Temperature
Coefficient
Ta = -20~+80°C
∆VS
Hysteresis Voltage
VDET = HàLàH
VOL
Low-level Output
Voltage
IOH
∆VS/∆T
100
100
V
ppm/°C
150
200
mV
VDET = 3.9V, RL = 4.7kΩ
12
60
mV
Output Leakage
Current
VDET = 5V
0.5
1
µA
IOL1
Output Current1
VDET =3.9V, VRESET = 0.4V
25
30
mA
IOL2
Output Current2
VDET = 3.9V, VRESET = 0.4V
Ta = -20~+80°C
20
25
mA
tPLH
“H” Transmission Delay Cd = 0µF
Time
tPLH1
Reset Delay Time
tPHL
“L” Transmission Delay
Cd = 0µF
Time
VOPL
Threshold Operating
Voltage
VDET = 3.7Và5V, Cd = 0.1µF
VRESET = 0.4V
8
42
90
µs
13
18
ms
4
90
µs
0.95
1.25
V
Note : Dropout voltage definition : VIN- VOUT when VOUT is 2% below the value of VOUT for VIN=5V
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Application Circuit
3.3V
VOUT1
VIN
1µ F
RL
VDET
APL5538
4.7kΩ
3.3V
RESET
Cd
GND
VOUT2
CONT
COUT2
2.2µ F
0.1µ F
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
COUT1
2.2µ F
5
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APL5538
Timing Chart
APL5538
V IN . V DET
5V
Vs
Vs
RESET
5V
t PLH + t PLH1
0V
CONT
H
L
V OUT1
5V
0V
V OUT2
5V
0V
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Typical Characteristics
Quiescent Current vs. Output Current
Quiescent Current vs. Input Voltage
700
160
VIN = 5V
IOUT1=IOUT1=0mA
600
Quiescent Current (µA)
Quiescent Current (µA)
140
120
100
80
60
40
20
500
VOUT1,V OUT2
400
300
200
100
0
0
0
1
2
3
4
5
0
6
50
Input Voltage (V)
100
150
200
250
300
Output Current (mA)
Output Voltage vs. Input Voltage
Output Voltage vs. Temperature
3.320
3.5
3.330
IOUT1=IOUT1=0mA
3.320
3.310
VOUT1
3.300
VOUT1,V OUT2
2
1.5
1
3.300
3.290
3.290
VOUT2
3.280
3.280
VOUT2 (V)
3.310
2.5
VOUT1 (V)
Output Voltage (V)
3
3.270
3.270
0.5
3.260
3.250
3.260
0
0
1
2
3
4
-40 -20
5
20
40
60
80 100 120 140
Temperature (°C)
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Typical Characteristics
Dropout Voltage vs. Output Current
PSRR vs. Frequency
350
+0
VIN = 5V
-10 IOUT1 = IOUT2 = 50mA
-20
250
PSRR (dB)
Dropout Voltage (mV)
300
200
VOUT1,V OUT2
150
100
-30
-40
-50
VOUT1,V OUT2
-60
50
-70
-80
10
0
0
50
100
150
200
250
300
100
1k
10k
100k
Frequency (Hz)
Output Current (mA)
Load-Transient Response
Load-Transient Response
VOUT1(150mV/div)
VOUT2(150mV/div)
IOUT1=1mA ~ 300mA
COUT1=2.2uF(Aluminum)
IOUT2=1mA ~ 300mA
COUT2=2.2uF(Aluminum)
Time (0.1ms/div)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
Time(0.1ms/div)
8
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APL5538
Typical Characteristics
Line-Transient Response
Shutdown Response
RLOAD = 100 Ω
VIN = 4.5 ~ 5.5V
VOUT1 (2v/div)
VOUT1(20mV/div)
IOUT1=10mA
COUT1=2.2uF
VOUT2
CONT(2v/div)
VOUT2(20mV/div)
IOUT2=10mA
COUT2=2.2uF
Time(20µs/div)
Time (1ms/div)
Powering On
Powering Off
V IN(2V/div)
VOUT1
VOUT1
V IN(2V/div)
VOUT2
VOUT2
RESET(2V/div)
RESET(2V/div)
Time(10ms/div)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
Time(0.2ms/div)
9
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APL5538
Typical Characteristics
Safe Operating Area (Power Dissipation Limit)
550
1.6
500
1.4
450
Output Current (mA)
Power Dissipation (mW)
Power Dissipation vs. Ambient Temperature
1.8
1.2
1
SOP-8-P
0.8
0.6
0.4
0.2
IL1=IL2, 2oZ Copper on SOP-8
Package Mounted on recommended
minimum footprint
400
TA=25°C
350
300
250
TA=85°C
200
150
SOP-8
0
100
25
50
75
100
125
150
1
Ambient Temperature (°C)
1.25
1.5
1.75
2
2.25
2.5
2.75
Input-Output Voltage Differential VIN-VOUT(V)
Safe Operating Area (Power Dissipation Limit)
800
IL1=IL2, 2oZ Copper on SOP-8-P
Package Mounted on recommended
minimum footprint
Output Current (mA)
700
600
TA=25°C
500
400
TA=85°C
300
200
100
1
1.25
1.5
1.75
2
2.25
2.5
2.75
Input-Output Voltage Differential VIN-VOUT(V)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Application Information
Capacitor Selection and Regulator Stabil-
RESET
ity
The RESET pin is asserted whenever VDET falls below
The APL5538 uses at least a 1uF capacitor on the
the reset threshold voltage or if CONT is forced low at
input. This capacitor can use Aluminum, Tantalum or
some special IC(refer timing chart and pin description).
Ceramic capacitors. Input capacitor with large value
The reset function ensures the microprocessor is prop-
and low ESR provides better PSRR and line-transient
erly reset and powers up into a known condition after
response. The output capacitor also can use
a power failure. RESET will remain valid with VIN as
Aluminum, Tantalum or Ceramic capacitors, and it’s
low as 0.95V. The RESET output is a simple open-
minimum values is recommended 2.2uF, ESR muse
drain N channel MOSET structure. A pull-up resistor
be above 0.01Ω. Large output capacitor values can
must be used to pull this output up to some voltage.
reduce noise and improve load-transient response,
For most application, this voltage will be the same
stability, and PSRR. Note that some ceramic dielec-
power supply that supplies VIN to the APL5538. The
trics exhibit large capacitance and ESR variation with
APL5538 is relatively immune to negative-going
Temperature. If use this capacitor, it may be neces-
glitches below the reset threshold. Typically reset delay
sary to use 2.2uF or more to ensure stability at tem-
time is 13ms while using o.1uF at Cd pin. If more
perature below -10°C.
transient immunity is needed, a Cd capacitor can be
placed as larger as possible.
Load-Transient Considerations
Input-Output (Dropout)Voltage
The APL5538 load-transient response graphs in Typical Characteristics show the transient response. A
step change in the load current from 1mA to 300mA
The minimun input-output voltage differential (dropout)
at 1u second will cause less than 200mV transient
determines the lowest usable supply voltage. The drop-
spike. Large output capacitor’s value and low ESR
out voltage is a function of drain-to-source on resis-
can reduce transient spike.
tance multiplied by the load current.
Shutdown/Enable
Current Limit
The APL5538 has an active high enable function. Force
APL5538 includes two separate current-limit circuitry
CONT high (>1.6V) enables the VOUT1 , CONT low (<0.
for each linear regulator. The current limit protection,
4V) disables the VOUT1 and VOUT2 can not be affected
which sense the current flows the P-channel MOSFET,
by CONT. Enter the shutdown mode, it also causes
and controls the output voltage. The point where limit-
the output voltage to discharge through a 500 Ω resis-
ing occurs is IOUT=950mA. The output can be shorted
tance to ground. In shutdown mode, the quiescent
to ground for an indefinite amount of time without dam-
current can reduce to 100uA. The CONT pin cannot
aging to the part.
be floating, a floating CONT pin may cause an indeterminate state on the output. If it is no use, connect
to VIN for normal operation.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Application Information
Thermal Protection
Thermal protection limits total power dissipation in the
heat into ambient air. The vias are recommended to
APL5538. When the junction temperature exceeds
have proper size to retain solder, helping heat
TJ=+150°C, the thermal sensor generate a logic sig-
conduction.
nal to turn off the pass transistor and let IC to cool.
102 mil
When the IC’s junction temperature cools by 10°C,
the thermal sensor will turn the pass transistor on again,
resulting in a pulsed output during continuous thermal
118 mil
protection. Thermal protection is designed to protect
SOP-8-P
the IC in the event of fault conditions. For continual
operation, do not exceed the absolute maximum junction temperature rating of TJ=+150°C.
Die
Thermal
pad
Operating Region and Power Dissipation
The thermal resistance of the case and circuit board,
Top
ground
pad
Ambient
Air
ambient and junction air temperature, and the rate of
Vias
air flow all control the APL5538 maximum power
dissipation. The power dissipation across the device
Internal
ground
plane
Printed
circuit
board
Figure 1
is P = IOUT (VIN-VOUT). The maximum power dissipation
is:
PMAX = (TJ-TA) / (θJB +θBA )
where TJ-TA is the temperature difference between the
junction and ambient air.
θJB is the thermal resistance of the package, θBA is the
thermal resistance through the printed circuit board,
copper traces, and other materials to the surrounding
air. The GND pin provides an electrical connection to
ground and channeling heat away. Connect the GND
pin to ground using a large pad or ground plane as a
heat sink, it can improve maximize thermal dissipation.
See figure 1. The SOP-8-P utilizes a bottom thermal
pad to minimize the thermal resistance of the package,
making the package suitable for high current
applications. The thermal pad is soldered to the top
ground pad and is connected to the internal or bottom
ground plane by several vias. The printed circuit board
(PCB) forms a heat sink and dissipates most of the
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Packaging Information
E
e1
0.015X45
SOP-8 pin ( Reference JEDEC Registration MS-012)
H
e2
D
A1
A
1
L
0.004max.
Dim
Millimeters
Inches
Min.
Max.
Min.
Max.
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
D
4.80
5.00
0.189
0.197
E
3.80
4.00
0.150
0.157
H
5.80
6.20
0.228
0.244
L
0.40
1.27
0.016
0.050
e1
0.33
0.51
0.013
0.020
e2
1.27BSC
0.50BSC
φ 1
8°
8°
Copyright  ANPEC Electronics Corp.
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APL5538
Packaging Information
E1
E
0.015X45
SOP-8-P pin ( Reference JEDEC Registration MS-012)
H
D1
e1
e2
D
A1
A
1
L
0.004max.
Dim
Millimeters
Inches
Min.
Max.
Min.
Max.
1.35
1.75
0.053
0.069
A1
0
0 .1 5
0
0.00 6
D
D1
4.80
5.00
0.189
0.197
E
3.80
A
3 . 0 0R E F
0.118REF
4.00
0.150
2 . 6 0R E F
0.157
E1
H
5.80
6.20
0.228
0.244
L
0.40
1.27
0.016
0.050
e1
e2
0.33
0.51
0.013
0.02 0
φ 1
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
0.102REF
1.27BSC
0.50BSC
8°
8°
14
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APL5538
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
T L to T P
Temperature
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
t 25 °C to Peak
Tim e
ClassificatinReflowProfiles
Profile Feature
Sn-Pb Eutectic Assembly
Large Body
Small Body
Average ramp-up rate
3°C/second max.
(TL to TP)
Preheat
- Temperature Min (Tsmin)
100°C
- Temperature Mix (Tsmax)
150°C
- Time (min to max)(ts)
60-120 seconds
Tsmax to TL
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
183°C
- Time (tL)
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
Time within 5°C of actual Peak
10-30 seconds
10-30 seconds
Temperature(tp)
Ramp-down Rate
6°C/second max.
6 minutes max.
Time 25°C to Peak Temperature
Pb-Free Assembly
Large Body
Small Body
3°C/second max.
150°C
200°C
60-180 seconds
3°C/second max
217°C
60-150 seconds
245 +0/-5°C
250 +0/-5°C
10-30 seconds
20-40 seconds
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
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APL5538
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C , 5 SEC
1000 Hrs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-65°C ~ 150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
Carrier Tape
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Application
SOP- 8/-P
A
B
330 ± 1
F
5.5± 1
J
T1
T2
W
P
E
62 +1.5
C
12.75+
0.15
2 ± 0.5
12.4 ± 0.2
2 ± 0.2
12± 0. 3
8± 0.1
1.75±0.1
D
D1
Po
P1
Ao
Bo
Ko
t
2.0 ± 0.1
6.4 ± 0.1
5.2± 0. 1
1.55 +0.1 1.55+ 0.25 4.0 ± 0.1
2.1± 0.1 0.3±0.013
(mm)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
16
www.anpec.com.tw
APL5538
Cover Tape Dimensions
Application
SOP- 8/-P
Carrier Width
12
Cover Tape Width
9.3
Devices Per Reel
2500
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Jul., 2006
17
www.anpec.com.tw
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