APT5F100K 1000V, 5A 2.8Ω Max, Trr ≤ 155nS N-Channel FREDFET POWER MOS 8® is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. TO-220 APT5F100K D Single die FREDFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 5 Continuous Drain Current @ TC = 100°C 3 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 310 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 3 A 1 20 Thermal and Mechanical Characteristics Max Unit W PD Total Power Dissipation @ TC = 25°C 225 RθJC Junction to Case Thermal Resistance 0..35 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-247 Package), 4-40 or M3 screw Microsemi Website - http://www.microsemi.com 0.15 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 5-2009 Typ Rev B Min Characteristic 050-8164 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 1000 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 3A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance VDS = 500V TJ = 25°C VGS = 0V TJ = 125°C Typ Max 1.15 2.4 4 -10 2.8 5 250 1000 ±100 VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 0.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT5F100K Min Test Conditions VDS = 50V, ID = 3A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 5.6 1409 19 118 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 48 VGS = 0V, VDS = 0V to 500V 25 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 666V, ID = 3 tr td(off) tf Turn-Off Delay Time 43 7.6 21 23 21 72 21 VGS = 0 to 10V, ID = 6A, VDS = 500V RG = 2.2Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) A 20 S TJ = 25°C TJ = 125°C TJ = 25°C diSD/dt = 100A/μs TJ = 125°C VDD = 100V TJ = 25°C Unit 5.4 G ISD = 3A, TJ = 25°C, VGS = 0V ISD = 3A 3 Max TJ = 125°C ISD ≤ 3A, di/dt ≤1000A/μs, VDD = 400V, TJ = 125°C 130 199 0.4 0.8 6 8 1.3 155 247 V ns μC A 25 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 69mH, RG = 25Ω, IAS = 3A. 050-8164 Rev B 5-2009 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.43E-8/VDS^2 + 1.44E-8/VDS + 5.38E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT5F100K 6 16 V GS = 10V T = 125°C J 14 5 ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) TJ = -55°C 12 10 8 TJ = 25°C 6 4 TJ = 125°C 2 V = 6, 7, 8 & 9V GS 4 3 5V 2 1 4.5V TJ = 150°C 0 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 Figure 2, Output Characteristics 20 NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. 18 VGS = 10V @ 3A 2.5 2.0 1.5 1.0 14 12 10 TJ = -55°C 8 TJ = 25°C 6 TJ = 125°C 4 0.5 2 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 3,000 8 7 1,000 TJ = -55°C 6 C, CAPACITANCE (pF) TJ = 25°C 5 TJ = 125°C 4 3 2 Ciss 100 Coss 10 1 1.0 1.5 2.0 2.5 3.0 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 200 400 600 800 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 200V 10 VDS = 500V 8 6 VDS = 800V 4 2 0 0 20 ID = 3A 14 0 1 3.5 10 20 30 40 50 60 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 18 16 14 TJ = 25°C 12 10 TJ = 150°C 8 5-2009 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 0.5 6 4 2 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage Rev B 0 ISD, REVERSE DRAIN CURRENT (A) 0 Crss 050-8164 gfs, TRANSCONDUCTANCE 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE 16 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) APT5F100K 40 IDM 10 13µs 100µs 1 1ms 10ms Rds(on) 0.1 Rds(on) 13µs 100µs 1ms 10ms TJ = 150°C 100ms TC = 25°C DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 1 100ms TJ = 125°C TC = 75°C 1 IDM 10 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 DC line 0.1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area C 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area D = 0.9 0.50 0.40 0.7 0.30 0.5 Note: PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.60 0.20 0.3 t2 t1 = Pulse Duration SINGLE PULSE 0.10 t Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC 0.1 0.05 0 t1 -5 10 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 TO-220 (K) Package Outline e3 100% Sn Plated 1.39 (.055) 0.51 (.020) Drain 10.66 (.420) 9.66 (.380) 5.33 (.210) 4.83 (.190) 6.85 (.270) 5.85 (.230) 12.192 (.480) 9.912 (.390) 4.08 (.161) Dia. 3.54 (.139) 3.42 (.135) 2.54 (.100) 050-8164 Rev B 5-2009 3.683 (.145) MAX. 0.50 (.020) 0.41 (.016) 2.92 (.115) 2.04 (.080) 4.82 (.190) 3.56 (.140) 14.73 (.580) 12.70 (.500) Gate Drain Source 1.01 (.040) 3-Plcs. 0.83 (.033) 2.79 (.110) 2.29 (.090) 5.33 (.210) 4.83 (.190) 1.77 (.070) 3-Plcs. 1.15 (.045) Dimensions in Millimeters and (Inches) Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. US and Foreign patents pending. All Rights Reserved.