APT8M100B
APT8M100S
1000V, 8A, 1.80Ω Max
N-Channel MOSFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
TO
-2
47
D3PAK
APT8M100B
APT8M100S
Single die MOSFET
D
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI/RFI
• PFC and other boost converter
• Low RDS(on)
• Buck converter
• Ultra low Crss for improved noise immunity
• Two switch forward (asymmetrical bridge)
• Low gate charge
• Single switch forward
• Avalanche energy rated
• Flyback
• RoHS compliant
• Inverters
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
8
Continuous Drain Current @ TC = 100°C
5
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
415
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
4
A
1
27
Thermal and Mechanical Characteristics
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
290
RθJC
Junction to Case Thermal Resistance
0.43
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
Torque
Mounting Torque ( TO-247 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
0.11
-55
150
300
°C/W
°C
0.22
oz
6.2
g
10
in·lbf
1.1
N·m
2-2007
Typ
Rev A
Min
Characteristic
050-8109
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
Test Conditions
Min
VBR(DSS)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
1000
∆VBR(DSS)/∆TJ
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
∆VGS(th)/∆TJ
VGS = 10V, ID = 4A
3
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
VDS = 1000V
VGS = 0V
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
1.80
5
100
500
±100
TJ = 125°C
Min
VGS = 0V, VDS = 25V
f = 1MHz
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Typ
7.5
1885
25
160
Max
Unit
V
V/°C
Ω
V
mV/°C
µA
nA
Unit
S
pF
65
VGS = 0V, VDS = 0V to 667V
33
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 667V, ID = 4A
tf
1.15
1.53
4
-10
TJ = 25°C
Test Conditions
VDS = 50V, ID = 4A
4
td(off)
Max
TJ = 25°C unless otherwise specified
Co(cr)
tr
Typ
VGS = ±30V
Parameter
gfs
3
VGS = VDS, ID = 1mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
Reference to 25°C, ID = 250µA
Breakdown Voltage Temperature Coefficient
RDS(on)
APT8M100B_S
Turn-Off Delay Time
60
10
27
8.5
7.8
29
7.2
VGS = 0 to 10V, ID = 4A,
VDS = 500V
RG = 10Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Test Conditions
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
Diode Forward Voltage
ISD = 4A, TJ = 25°C, VGS = 0V
trr
Reverse Recovery Time
ISD = 4A, VDD = 100V 3
Qrr
Reverse Recovery Charge
Peak Recovery dv/dt
Typ
Max
Unit
8
A
G
VSD
dv/dt
Min
D
27
S
diSD/dt = 100A/µs, TJ = 25°C
ISD ≤ 4A, di/dt ≤1000A/µs, VDD = 667V,
TJ = 125°C
1.0
1030
18
V
ns
µC
10
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 51.88mH, RG = 10Ω, IAS = 4A.
050-8109
Rev A
2-2007
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -5.47E-8/VDS^2 + 9.66E-9/VDS + 1.87E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
20
V
GS
18
= 10V
J
V
TJ = -55°C
14
ID, DRIAN CURRENT (A)
12
10
TJ = 25°C
8
6
4
TJ = 125°C
2
5
4
5V
3
2
1
TJ = 150°C
0
30
25
20
15
10
5
0
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
4.5V
0
VGS = 10V @ 4A
2.0
1.5
1.0
20
15
TJ = -55°C
TJ = 25°C
10
TJ = 125°C
0
0
25 50 75 100 125 150
0
-55 -25
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
8
7
6
5
4
3
2
1
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
3,000
C, CAPACITANCE (pF)
8
TJ = 25°C
6
Ciss
1,000
TJ = -55°C
TJ = 125°C
4
100
Coss
10
2
16
4
3
2
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
1
1000
800
600
400
200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
12
VDS = 200V
10
VDS = 500V
8
6
VDS = 800V
4
2
70 80
30 40 50 60
10 20
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
0
0
30
ID = 4A
14
0
1
5
25
20
TJ = 25°C
15
TJ = 150°C
10
2-2007
0
5
0
1.5
1.2
0.9
0.6
0.3
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
0
Rev A
0
Crss
ISD, REVERSE DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
5
0.5
10
VGS, GATE-TO-SOURCE VOLTAGE (V)
VDS> ID(ON) x RDS(ON) MAX.
25
ID, DRAIN CURRENT (A)
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
30
NORMALIZED TO
2.5
30
25
20
15
10
5
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2, Output Characteristics
Figure 1, Output Characteristics
3.0
= 6, 7, 8 & 9V
GS
6
050-8109
ID, DRAIN CURRENT (A)
T = 125°C
7
16
0
APT8M100B_S
8
I
13µs
100µs
1ms
Rds(on)
10ms
13µs
100µs
1
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25 C)*(TJ - TC)/125
DC line
0.1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
1ms
10ms
100ms
DC line
TJ = 150°C
TC = 25°C
100ms
TJ = 125°C
TC = 75°C
1
Rds(on)
C
°
1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
TJ (°C)
TC (°C)
0.0502
0.178
0.205
Dissipated Power
(Watts)
0.00301
0.00743
ZEXT
1
DM
10
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
IDM
10
0.1
APT8M100B_S
50
50
0.105
ZEXT are the external thermal
impedances: Case to sink,
sink to ambient, etc. Set to
zero when modeling only
the case to junction.
Figure 11, Transient Thermal Impedance Model
0.40
D = 0.9
0.7
0.30
Note:
0.5
0.20
PDM
Z JC, THERMAL IMPEDANCE (°C/W)
θ
0.50
t1
0.3
t2
0.10
0
t1 = Pulse Duration
SINGLE PULSE
t
Duty Factor D = 1/t2
Peak TJ = PDM x ZθJC + TC
0.1
0.05
10-5
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
D3PAK Package Outline
TO-247 (B) Package Outline
15.49 (.610)
16.26 (.640)
6.15 (.242) BSC
5.38 (.212)
6.20 (.244)
Drain
(Heat Sink)
e3 100% Sn Plated
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
15.95 (.628)
16.05(.632)
Drain
13.79 (.543)
13.99(.551)
Revised
4/18/95
20.80 (.819)
21.46 (.845)
1.04 (.041)
1.15(.045)
2-2007
Rev A
Revised
8/29/97
11.51 (.453)
11.61 (.457)
3.50 (.138)
3.81 (.150)
0.46 (.018)
0.56 (.022) {3 Plcs}
050-8109
13.41 (.528)
13.51(.532)
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
19.81 (.780)
20.32 (.800)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
1.01 (.040)
1.40 (.055)
Gate
Drain
0.020 (.001)
0.178 (.007)
2.67 (.105)
2.84 (.112)
1.27 (.050)
1.40 (.055)
1.22 (.048)
1.32 (.052)
1.98 (.078)
2.08 (.082)
5.45 (.215) BSC
{2 Plcs.}
Source
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
Source
Drain
Gate
Dimensions in Millimeters (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786
5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
3.81 (.150)
4.06 (.160)
(Base of Lead)
Heat Sink (Drain)
and Leads
are Plated