ams AS1312 Ul t ra low quiescent cur rent , hysteret ic dc-dc step-up conver ter Datasheet

A S1 3 1 2
Ul tr a L o w Q u ie s c e n t Cu rr e n t , H y s te r e ti c D C- DC St ep - U p C o n v e r te r
1 General Description
2 Key Features
The AS1312 is an ultra low IQ hysteretic step-up DC-DC converter.
Input voltage range: 0.7V to 5.0V
The AS1312 achieves an efficiency of up to 94% and is designed to
operate from a +0.7V to +5.0V supply, the output voltage is fixed in
50mV steps from +2.5V to 5.0V.
Fixed output voltage range: 2.5V to 5.0V
Peak output current: 200mA
Quiescent current: 1µA
In order to save power the AS1312 features a shutdown mode,
where it draws less than 100nA. In shutdown mode the battery is not
connected to the output.
Shutdown current: < 100nA
Up to 94% efficiency
If the input voltage exceeds the output voltage the device is in a
feedthrough mode and the input is directly connected to the output
voltage.
Output disconnect in shutdown
In light load operation, the device enters a sleep mode when most of
the internal operating blocks are turned off in order to save power.
This mode is active approximately 50µs after a current pulse
provided that the output is in regulation.
Adjustable low battery detection or Power-OK output selectable
Feedthrough mode when VIN > VOUT
No external diode or transistor required
Over temperature protection
Packages:
- 8-pin (2x2) TDFN
- 8-pin WL-CSP with 0.4mm pitch
The AS1312 also offers an adjustable low battery detection. If the
battery voltage decreases below a threshold defined by two external
resistors on pin LBI, the LBO output is pulled to logic low. LBO is
working as Power-OK when LBI is connected to GND.
3 Applications
The AS1312 is available in a 8-pin (2x2) TDFN and a 0.4mm pitch 8pin WL-CSP package.
The AS1312 is an ideal solution for handheld devices and battery
powered products.
Figure 1. AS1312 - Typical Application Diagram
L1 = 6.8µH
LX
VIN
0.7V to 5.0V
Low Battery Detect
VIN
C1 = 22µF
LBO
R1
LBI
R2
AS1312
R3
VOUT
2.5V to 5.0V
VOUT
C2 = 10µF
On
Off
REF
EN
CREF = 100nF
GND
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AS1312
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
8-pin WL-CSP
8-pin (2x2) TDFN
LBI 1
GND 2
LX 3
8 VIN
7 EN
AS1312
VOUT 4
6 LBO
9
5 REF
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
Pin Name
Description
WL-CSP
TDFN
A1
1
LBI
A2
2
GND
A3
3
LX
A4
4
VOUT
B4
5
REF
Reference Pin. Connect a 100nF ceramic capacitor to this pin.
B3
6
LBO
Low Battery Comparator Output. Open-drain output.
B2
7
EN
Enable Pin. Logic controlled shutdown input.
1 = Normal operation;
0 = Shutdown; shutdown current <100nA.
B1
8
VIN
Battery Voltage Input. Decouple VIN with a ceramic capacitor as close as possible to VIN
and GND.
-
9
NC
Exposed Pad. This pad is not connected internally. Can be left floating or connect to GND
to achieve an optimal thermal performance.
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Low Battery Comparator Input. 0.6V Threshold. May not be left floating. If connected to
GND, LBO is working as Power Output OK.
Ground
External Inductor Connector.
Output Voltage. Decouple VOUT with a ceramic capacitor as close as possible to VOUT
and GND.
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AS1312
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
Comments
Electrical Parameters
VIN, VOUT, EN, LBI, LBO to GND
-0.3
+7
V
LX, REF to GND
-0.3
VOUT + 0.3
V
Input Current (latch-up immunity)
-100
100
mA
Norm: JEDEC 78
kV
Norm: MIL 883 E method 3015
ºC/W
Junction-to-ambient thermal resistance is very
dependent on application and board-layout. In
situations where high maximum power dissipation
exists, special attention must be paid to thermal
dissipation during board design.
Electrostatic Discharge
Electrostatic Discharge HBM
±2
Temperature Ranges and Storage Conditions
Thermal Resistance θJA
TDFN
60
WL-CSP
97
Junction Temperature
Storage Temperature Range
+125
ºC
-55
+150
ºC
for 8-pin (2x2) TDFN
-55
+125
ºC
for 8-pin WL-CSP
+260
ºC
The reflow peak soldering temperature (body
temperature) specified is in accordance with IPC/
JEDEC J-STD-020“Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is matte
tin (100% Sn).
85
%
Package Body Temperature
Humidity non-condensing
Moisture Sensitive Level
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5
1
Represents a maximum floor life time of unlimited
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AS1312
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
All limits are guaranteed. The parameters with Min and Max values are guaranteed by production tests or SQC (Statistical Quality Control)
methods.
VIN = 1.5V, C1 = C2 = 22µF, CREF = 100nF, Typical values are at TAMB = +25ºC. Unless otherwise specified. All limits are guaranteed. The
parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods.
Table 3. Electrical Characteristics
Symbol
Parameter
Max
Units
TAMB
Operating Temperature Range
Conditions
Min
-40
Typ
85
°C
TJ
Operating Junction Temperature Range
-40
125
°C
Input Voltage Range
0.7
5.0
V
Input
VIN
Minimum Startup Voltage
TAMB = +25°C
0.9
V
Regulation
VOUT
Output Voltage Range
Output Voltage Tolerance
1
VOUT Lockout Threshold
2.5
5.0
V
ILOAD = 0mA to 10mA, TAMB = +25°C
-2
+2
%
ILOAD = 0mA to 10mA
-4
+4
%
ILOAD = 0mA to 30mA,
TAMB = -20°C to +60°C
-2
+2
%
Rising Edge
2.45
V
Operating Current
Quiescent Current VIN
VOUT = 1.02xVOUTNOM,
REF = 0.99xVOUTNOM, TAMB = +25°C
Quiescent Current VOUT
VOUT = 5V, No load, TAMB = +25°C
Shutdown Current
TAMB = +25ºC
IQ
ISHDN
0.7
1
100
nA
1.3
µA
100
nA
Switches
NMOS
RON
VOUT = 5V
PMOS
NMOS maximum on-time
IPEAK
3.3
Peak current limit
0.4
Ω
0.45
Ω
4.0
4.6
400
Zero crossing current
5
VENH
EN input voltage ‘high’
0.7
VENL
EN input voltage ‘low’
IEN
EN input bias current
IREF
REF input bias current
20
µs
mA
35
mA
Enable, Reference
V
0.1
V
EN = 5V, TAMB = +25°C
100
nA
REF = 0.99xVOUTNOM, TAMB = +25°C
100
nA
0.63
V
Low Battery & Power-OK
VLBI
LBI threshold
Falling edge
LBI hysteresis
0.6
25
ILBI
LBI leakage current
VLBO
LBO voltage low
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0.57
2
LBI ≤ VIN or VOUT (which ever is higher),
TAMB = +25°C
ILBO = 1mA
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100
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AS1312
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 3. Electrical Characteristics
Symbol
Parameter
Conditions
ILBO
LBO leakage current
TAMB = +25°C
Power-OK threshold
LBI = 0V, Falling Edge
Min
87
Typ
91
Max
Units
100
nA
95
%
Thermal Protection
Thermal shutdown
3
10°C Hysteresis
150
°C
1. The regulator is in startup mode until this voltage is reached.
Caution: Do not apply full load current until the device output > 2.5V
2. LBO goes low in startup mode as well as during normal operation if,
(i) The voltage at the LBI pin is higher than LBI threshold.
(ii) The voltage at the LBI pin is below 0.1V (connected to GND) and VOUT is below 92.5% of its nominal value.
3. Further switching is inhibited.
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Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
VOUT = 5.0V, TAMB = +25°C, unless otherwise specified.
Figure 3. Efficiency vs. Output Current
100
L1: LPS4018-682M
90
90
80
80
70
70
Efficiency (%)
Efficiency (%)
100
Figure 4. Efficiency vs. Output Current
60
50
40
30
Vin = 0.9V
Vin = 1.5V
20
0.01
0.1
1
10
50
40
30
Vin = 0.9V
Vin = 1.5V
Vin = 2.5V
10
Vin = 4.0V
0
0.001
60
20
Vin = 2.5V
10
L1: XPL2010-682M
Vin = 4.0V
0
0.001
100
0.01
Output Current (mA)
Figure 5. Efficiency vs. Input Voltage
100
1
10
100
Figure 6. Maximum Output Current vs. Input Voltage
200
L1: XPL2010-682M
90
175
Output Current (mA) .
80
Efficiency (%)
0.1
Output Current (mA)
70
60
50
40
30
Iout = 1mA
Iout=10mA
20
Iout=50mA
10
150
125
100
75
50
25
Iout=100mA
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
1
5
Input Voltage (V)
1.5
2
2.5
3
3.5
4
4.5
Input Voltage (V)
Figure 8. Output Voltage Ripple; VIN = 2V, Rload = 100Ω
Figure 7. Start-up Voltage vs. Output Current
1
VLX
0.9
0.85
0.75
200mA/Div
0.8
ILX
0.7
0.65
VOUT (AC)
0.6
0.55
0.5
0
1
2
3
4
5
6
7
8
9
10
5µs/Div
Output Current (mA)
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100mV/Div
Start-up Voltage (V)
2V/Div
0.95
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AS1312
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
8.1 Hysteretic Boost Converter
Hysteretic boost converters are so called because comparators are the active elements used to determine on-off timing via current and voltage
measurements. There is no continuously operating fixed oscillator, providing an independent timing reference. As a result, a hysteretic or
comparator based converter has a very low quiescent current. In addition, because there is no fixed timing reference, the operating frequency is
determined by external component (inductor and capacitors) and also the loading on the output.
Ripple at the output is an essential operating component. A power cycle is initiated when the output regulated voltage drops below the nominal
value of VOUT (0.99 x VOUT).
Inductor current is monitored by the control loop, ensuring that operation is always dis-continuous.
The application circuit shown in Figure 1 will support many requirements. However, further optimization may be useful, and the following is
offered as a guide to changing the passive components to more closely match the end requirement.
8.1.1
Input Loop Timing
The input loop consists of the source dc supply, the input capacitor, the main inductor, and the N-channel power switch. The on timing of the Nchannel switch is determined by a peak current measurement or a maximum on time. In the AS1312, peak current is 400mA (typ) and maximum
on time is 4.2µs (typ). Peak current measurement ensures that the on time varies as the input voltage varies. This imparts line regulation to the
converter.
The fixed on-time measurement is something of a safety feature to ensure that the power switch is never permanently on. The fixed on-time is
independent of input voltage changes. As a result, no line regulation exists.
Figure 9. Simplified Boost DCDC Architecture
L1
SW2
VIN
VOUT
Q
CIN
SW1
Q
COUT
FB
RLOAD
IPK
GND
0V
0V
On time of the power switch (Faraday’s Law) is given by:
LI PK
T ON = ------------------------------------------------------------------ sec [volts, amps, ohms, Henry]
V IN – ( I PK R SW1 + I PK R L1 )
(EQ 1)
Applying Min and Max values and neglecting the resistive voltage drop across L1 and SW1;
TON _ MIN =
TON _ MAX =
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LMIN I PK _ MIN
VIN _ MAX
(EQ 2)
LMAX I PK _ MAX
V IN _ MIN
(EQ 3)
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Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 10. Simplified Voltage and Current Waveforms
V
0.99VOUT_NOM
VOUT Ripple
VOUT
B
VIND_TOFF
B
VIN
VIND_TON
C
D
A
C
D
T
0
TOFF
TWAIT
IL
TON
SW1_on
SW2_off
TOFF
TWAIT
IPK
T
0
SW2_on
SW1_off
T
T
Another important relationship is the “volt-seconds” law. Expressed as following:
V ON T ON = VOFF T OFF
(EQ 4)
Voltages are those measured across the inductor during each time segment. Figure 10 shows this graphically with the shaded segments marked
“A & B”. Re-arranging (EQ 4):
T ON
VOUT – VIN
------------ = ---------------------------T OFF
V IN
(EQ 5)
The time segment called TWAIT in Figure 10 is a measure of the “hold-up” time of the output capacitor. While the output voltage is above the
threshold (0.99xVOUT), the output is assumed to be in regulation and no further switching occurs.
8.1.2
Inductor Choice Example
For the AS1312 VIN_MIN = 0.9V, VOUT_MAX = 3.3V, (EQ 5) gives Ton=2.66TOFF.
Let the maximum operating on-time = 1µs.
Note that this is shorter than the minimum limit on-time of 3.6µs. Therefore from (EQ 5), TOFF = 0.376µs. Using (EQ 3), LMAX is obtained:
LMAX = 1.875µH. The nearest preferred value is 2.2µH.
This value provides the maximum energy storage for the chosen fixed on-time limit at the minimum VIN.
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Datasheet - D e t a i l e d D e s c r i p t i o n
Energy stored during the on time is given by:
E = 0,5L ( I PK )
2
Joules (Region A in Figure 10)
(EQ 6)
If the overall time period (TON + TOFF) is T, the power taken from the input is:
2
0,5L ( I PK )
P IN = --------------------------- Watts
T
(EQ 7)
Assume output power is 0.8 PIN to establish an initial value of operating period T.
TWAIT is determined by the time taken for the output voltage to fall to 0.99xVOUT. The longer the wait time, the lower will be the supply current of
the converter. Longer wait times require increased output capacitance. Choose TWAIT = 10% T as a minimum starting point for maximum energy
transfer. For very low power load applications, choose TWAIT ≥ 50% T.
8.1.3
Output Loop Timing
The output loop consists of the main inductor, P-channel synchronous switch (or diode if fitted), output capacitor and load. When the input loop is
interrupted, the voltage on the LX pin rises (Lenz’s Law). At the same time a comparator enables the synchronous switch, and energy stored in
the inductor is transferred to the output capacitor and load. Inductor peak current supports the load and replenishes the charge lost from the
output capacitor. The magnitude of the current from the inductor is monitored, and as it approaches zero, the synchronous switch is turned off.
No switching action continues until the output voltage falls below the output reference point (0.99 x VOUT).
Output power is composed of the dc component (Region C in Figure 10):
I PK T OFF
PREGION_C = VIN -------- ------------2 T
(EQ 8)
Output power is also composed of the inductor component (Region B in Figure 10), neglecting efficiency loss:
2
0,5L ( I PK )
PREGION_B = --------------------------T
(EQ 9)
Total power delivered to the load is the sum of (EQ 8) and (EQ 9):
2
I PK T OFF 0,5L ( IPK )
P TOTAL = V IN -------- ------------- + --------------------------2 T
T
(EQ 10)
From (EQ 3) (using nominal values) peak current is given by:
T ON VIN
I PK = ------------------L
(EQ 11)
Substituting (EQ 11) into (EQ 10) and re-arranging:
2
V IN T ON
PTOTAL = ---------------------- ( 0,9T )
2TL
(EQ 12)
0.9T incorporates a wait time TWAIT = 10% T
Output power in terms of regulated output voltage and load resistance is:
2
V OUT
P OUT = ----------------R LOAD
(EQ 13)
Combining (EQ 12) and (EQ 13):
2
2
V IN T ON
V OUT
---------------- = --------------------- ( 0,9T )η
R LOAD
2TL
(EQ 14)
Symbol η reflects total energy loss between input and output and is approximately 0.8 for these calculations. Use (EQ 14) to plot duty cycle
(TON/T) changes for various output loadings and changes to VIN.
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AS1312
Datasheet - D e t a i l e d D e s c r i p t i o n
8.1.4
Input Capacitor Selection
The input capacitor supports the triangular current during the on-time of the power switch, and maintains a broadly constant input voltage during
this time. The capacitance value is obtained from choosing a ripple voltage during the on-time of the power switch. Additionally, ripple voltage is
generated by the equivalent series resistance (ESR) of the capacitor. For worst case, use maximum peak current values from the datasheet.
I PEAK T ON
C IN = ------------------------V RIPPLE
(EQ 15)
Using TON = 1µs, and IPEAK = 400mA (typ), and VRIPPLE = 50mV, EQ 15 yields:
CIN = 8.0µF
Nearest preferred would be 10µF.
V PK _ RIPPLE _ ESR = I PK R ESR
(EQ 16)
Typically, the ripple due to ESR is not dominant. ESR for the recommended capacitors (Murata GMR), ESR = 5mΩ to 10mΩ. For the AS1312,
maximum peak current is 400mA. Ripple due to ESR is 2.0mV to 4.0mV.
Ripple at the input propagates through the common supply connections, and if too high in value can cause problems elsewhere in the system.
The input capacitance is an important component to get right.
8.1.5
Output Capacitor Selection
The output capacitor supports the triangular current during the off-time of the power switch (inductor discharge period), and also the load current
during the wait time (Region D in Figure 10) and on-time (Region A in Figure 10) of the power switch.
COUT =
I LOAD (TON + TWAIT )
(1 − 0.99)VOUT _ NOM
(EQ 17)
Note: There is also a ripple component due to the equivalent series resistance (ESR) of the capacitor.
8.2 Summary
User Application Defines: VINmin, VINmax, VOUTmin, VOUTmax, ILOADmin, ILOADmax
Inductor Selection:
Select Max on-time = 0.5µs to 3µs for AS1312. Use (EQ 3) to calculate inductor value.
Use (EQ 5) to determine off-time.
Use (EQ 6) to check that power delivery matches load requirements assume 70% conversion efficiency.
Use (EQ 13) to find overall timing period value of T at min VIN and max VOUT for maximum load conditions.
Input Capacitor Selection: Choose a ripple value and use (EQ 14) to find the value.
Output Capacitor Selection: Determine TWAIT via (EQ 6) or (EQ 13), and use (EQ 16) to find the value.
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AS1312
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
The AS1312 is available with fixed output voltages from 2.5V to 5.0V in 50mV steps.
Figure 11. AS1312 - Block Diagram
0.7 to 5.0V
Input
6.8µH
CIN
22µF
2.5V to 5.0V
Output
Zero
Crossing
Detector
LX
VOUT
COUT
22µF
Startup
Circuitry
Driver
and
Control
Logic
VIN
R3
–
+
LBI
LBO
Imax
Detection
EN
AS1312
VREF
REF
CREF
100nF
GND
9.1 AS1312 Features
Shutdown.
The part is in shutdown mode while the voltage at pin EN is below 0.1V and is active when the voltage is higher than 0.7V.
Note: EN can be driven above VIN or VOUT, as long as it is limited to less than 5.0V.
Output Disconnect.
During shutdown VOUT is going to 0V and no current from the input source is running through the device.
Feedthrough Mode.
If the input voltage is higher than the output voltage (and the AS1312 is enabled) the supply voltage is connected to the load through the device.
To guarantee a proper function of the AS1312 it is not allowed that the supply exceeds the maximum allowed input voltage (5.0V).
In this feedthrough mode the quiescent current is 35µA (typ.). The device goes back into step-up mode when the output voltage is 4% (typ.)
below VOUTNOM.
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AS1312
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.1.1
Power-OK and Low-Battery-Detect Functionality
LBO goes low in startup mode as well as during normal operation if:
- The voltage at the LBI pin is below LBI threshold (0.6V). This can be used to monitor the battery voltage.
- LBI pin is connected to GND and VOUT is below 92.5% of its nominal value. LBO works as a power-OK signal in this case.
The LBI pin can be connected to a resistive-divider to monitor a particular definable voltage and compare it with a 0.6V internal reference. If LBI
is connected to GND an internal resistive-divider is activated and connected to the output. Therefore, the Power-OK functionality can be realized
with no additional external components.
The Power-OK feature is not active during shutdown and provides a power-on-reset function that can operate down to VIN = 0.7V. A capacitor to
GND may be added to generate a power-on-reset delay. To obtain a logic-level output, connect a pull-up resistor R3 from pin LBO to pin VOUT.
Larger values for this resistor will help to minimize current consumption; a 100kΩ resistor is perfect for most applications (see Figure 13 on page
12).
For the circuit shown in the left of Figure 12, the input bias current into LBI is very low, permitting large-value resistor-divider networks while
maintaining accuracy. Place the resistor-divider network as close to the device as possible. Use a defined resistor for R2 and then calculate R1
as:
V IN
R1 = R2 ⋅  ----------- – 1
 V LBI

(EQ 18)
Where:
VLBI is 0.6V
Figure 12. Typical Application with adjustable Battery Monitoring
L1
6.8µH
3
VIN
0.7V to 5.0V
LX
8
VIN
C1
22µF
LBO
R1
1
LBI
R2
On
Off
Low Battery Detect
6
R3
VOUT
2.5V to 5.0V
4
AS1312
VOUT
C2
22µF
5
7
REF
EN
2
CREF
100nF
GND
Figure 13. Typical Application with LBO working as Power-OK
L1
6.8µH
3
VIN
0.7V to 5.0V
LX
8
VIN
C1
22µF
1
LBI
On
Off
LBO
AS1312
R3
VOUT
2.5V to 5.0V
4
VOUT
C2
22µF
5
7
REF
EN
2
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Low Battery Detect
6
CREF
100nF
GND
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AS1312
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.1.2
Thermal Shutdown
To prevent the AS1312 from short-term misuse and overload conditions the chip includes a thermal overload protection. To block the normal
operation mode all further switching is inhibited for output voltage above VOUT lockout threshold. The device is in thermal shutdown when the
junction temperature exceeds 150°C. To resume the normal operation the temperature has to drop below 140°C.
A good thermal path has to be provided to dissipate the heat generated within the package. Otherwise it’s not possible to operate the AS1312 at
its usable maximal power. To dissipate as much heat as possible from the package into a copper plane with as much area as possible, it’s
recommended to use multiple vias in the printed circuit board. It’s also recommended to solder the Exposed Pad (pin 9) to the GND plane.
Note: Continuing operation in thermal overload conditions may damage the device and is considered bad practice.
9.2 Component Selection
Only four components are required to complete the design of the step-up converter. The low peak currents of the AS1312 allow the use of low
value, low profile inductors and tiny external ceramic capacitors.
9.3 Inductor Selection
For best efficiency, choose an inductor with high frequency core material, such as ferrite, to reduce core losses. The inductor should have low
DCR (DC resistance) to reduce the I²R losses, and must be able to handle the peak inductor current without saturating. A 6.8µH inductor with a
> 500mA current rating and < 500mΩ DCR is recommended.
Table 4. Recommended Inductors
Part Number
L
DCR
Current Rating
Dimensions (L/W/T)
XPL2010-682M
6.8µH
421mΩ
0.62A
2.0x1.9x1.0mm
EPL2014-682M
6.8µH
287mΩ
0.59A
2.0x2.0x1.4mm
LPS3015-682M
6.8µH
300mΩ
0.86A
3.0x3.0x1.5mm
LPS3314-682M
6.8µH
240mΩ
0.9A
3.3x3.3x1.3mm
LPS4018-682M
6.8µH
150mΩ
1.3A
3.9x3.9x1.7mm
LQH32CN6R8M53L
6.8µH
250mΩ
0.54A
3.2x2.5x1.55mm
LQH3NPN6R8NJ0L
6.8µH
210mΩ
0.7A
3.0x3.0x1.1mm
LQH44PN6R8MJ0L
6.8µH
143mΩ
0.72A
4.0x4.0x1.1mm
Manufacturer
Coilcraft
www.coilcraft.com
Murata
www.murata.com
9.4 Capacitor Selection
The convertor requires three capacitors. Ceramic X5R or X7R types will minimize ESL and ESR while maintaining capacitance at rated voltage
over temperature. The VIN capacitor should be 22µF. The VOUT capacitor should be between 22µF and 47µF. A larger output capacitor should
be used if lower peak to peak output voltage ripple is desired. A larger output capacitor will also improve load regulation on VOUT. See Table 5
for a list of capacitors for input and output capacitor selection.
Table 5. Recommended Input and Output Capacitors
Part Number
C
TC Code
Rated Voltage
Dimensions (L/W/T)
GRM21BR60J226ME99
22µF
X5R
6.3V
0805, T=1.25mm
GRM31CR61C226KE15
22µF
X5R
16V
1206, T=1.6mm
GRM31CR60J475KA01
47µF
X5R
6.3V
1206, T=1.6mm
Manufacturer
Murata
www.murata.com
On the pin REF a 100nF capacitor with an Insulation resistance >1GΩ is recommended.
Table 6. Recommended Capacitors for REF
Part Number
C
TC Code
Insulation
Resistance
Rated
Voltage
Dimensions (L/W/T)
Manufacturer
GRM188R71C104KA01
100nF
X7R
>5GΩ
16V
0603, T=0.8mm
Murata
www.murata.com
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Revision 1.12
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AS1312
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.5 Layout Considerations
Relatively high peak currents of 400mA (typ) circulate during normal operation of the AS1312. Long printed circuit tracks can generate additional
ripple and noise that mask correct operation and prove difficult to “de-bug” during production testing. Referring to Figure 1, the input loop formed
by C1, VIN and GND pins should be minimized. Similarly, the output loop formed by C2, VOUT and GND should also be minimized. Ideally both
loops should connect to GND in a “star” fashion. Finally, it is important to return CREF to the GND pin directly.
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AS1312
Datasheet
10 Package Drawings and Markings
The device is available in a 8-pin (2x2) TDFN and 8-pin WL-CSP package.
Figure 14. 8-pin (2x2) TDFNMarking
XXX
YY
Figure 15. 8-pin WL-CSP Marking
YY
XXXX
Table 7. Packaging Code
XXX
XXXX
YY
encoded datecode for TDFN
encoded datecode for WL-CSP
marketing code
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AS1312
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
Figure 16. 8-pin (2x2) TDFN Drawings and Dimensions
Symbol
A
A1
A3
L
b
D
E
e
D2
E2
aaa
bbb
ccc
ddd
eee
fff
N
Min
0.51
0.00
0.225
0.18
1.45
0.75
-
Nom
0.55
0.02
0.15 REF
0.325
0.25
2.00 BSC
2.00 BSC
0.50 BSC
1.60
0.90
0.15
0.10
0.10
0.05
0.08
0.10
8
Max
0.60
0.05
0.425
0.30
1.70
1.00
-
Notes:
1.
2.
3.
4.
5.
Dimensioning & tolerancing conform to ASME Y14.5M-1994.
All dimensions are in millimeters. Angles are in degrees.
Coplanarity applies to the exposed heat slug as well as the terminal.
Radius on terminal is optional.
N is the total number of terminals.
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AS1312
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
Figure 17. 8-pin WL-CSP Drawings and Dimensions
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AS1312
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
Revision History
Revision
Date
Owner
Initial revision
1.0
1.5
Description
26 Mar, 2012
Updated Detailed Description and Application Information sections
1.7
27 Apr, 2012
Detailed Description section updated
1.8
19 Jul, 2012
1.9
10 Aug, 2012
Updated storage temp values for WL-CSP
1.10
17 Aug, 2012
Updated (EQ 17)
1.11
14 Sep, 2012
Updated conditions for ‘Output Voltage Tolerance’ parameter (see page 4)
1.12
14 Oct, 2013
1.6
afe
tka
Added info on Thermal resistance, conditions for Output Voltage Tolerance.
Updated ordering table.
Update Green & ROHS logo, update ordering information
Note: Typos may not be explicitly mentioned under revision history.
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AS1312
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The device is available as the standard products listed below.
Table 8. Ordering Information
Ordering Code
Marking
VOUT
AS1312-BTDT-50
BE
AS1312-BTDT-33
BX
AS1312-BWLT-50
BF
5.0V
AS1312-BWLT-45
BQ
4.5V
tbd
xx
AS1312
1
Description
Delivery Form
Package
5.0V
Tape and Reel
8-pin (2x2) TDFN
3.3V
Tape and Reel
8-pin (2x2) TDFN
Tape and Reel
8-pin WL-CSP
Tape and Reel
8-pin WL-CSP
Tape and Reel
tbd
Ultra Low Quiescent Current, Hysteretic DC-DC
Step-Up Converter
1. Non-standard devices from 2.5V to 5.0V are available in 50mV steps.
For more information and inquiries contact http://www.ams.com/contact
All products are RoHS compliant and ams green.
Buy our products or get free samples online at www.ams.com/ICdirect
Technical Support is available at www.ams.com/Technical-Support
For further information and requests, email us at [email protected]
(or) find your local distributor at www.ams.com/distributor
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AS1312
Datasheet - O r d e r i n g I n f o r m a t i o n
Copyrights
Copyright © 1997-2012, ams AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights
reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the
copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. ams AG makes no
warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in normal
commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability
applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing
by ams AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
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Tobelbaderstrasse 30
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Tel
Fax
: +43 (0) 3136 500 0
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For Sales Offices, Distributors and Representatives, please visit:
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