ALSC ASM811TEUS-T 4 pin p voltage supervisor with manual reset Datasheet

ASM811, ASM812
October 2003
rev 1.0
4 Pin µP Voltage Supervisor with Manual Reset
General Description
Six voltage thresholds are available to support 3V to 5V
systems:
The ASM811/ASM812 are cost effective low power supervisors
RESET THRESHOLD
designed to monitor voltage levels of 3.0V, 3.3V and 5.0V
power
supplies
in
low-power
microprocessor
(µP),
Suffix
Voltage
L
4.63
M
4.38
A reset signal is issued if the power supply voltage drops below
J
4.00
a preset reset threshold and is asserted for at least 140ms after
T
3.08
the supply has risen above the reset threshold. The ASM811
S
2.93
has an active-low output RESET that is guaranteed to be in the
R
2.63
microcontroller (µC) and digital systems. They provide excellent
reliability by eliminating external components and adjustments.
correct state for VCC down to 1.1V. The ASM812 has an activehigh RESET output. The reset comparator is designed to ignore
fast transients on VCC. A debounced manual reset input allows
the user to manually reset the systems to bring them out of
locked state.
Low power consumption makes the ASM811/ASM812 ideal for
use in portable and battery operated equipment. The ASM811/
ASM812 are available in a compact 4-pin SOT-143 package
and thus use minimal board space.
Applications
Features
•
New 4.0V threshold option
•
9µA supply current
•
Monitor 5V, 3.3V and 3V supplies
•
Manual reset input
•
140ms min. reset pulse width
•
Guaranteed over temperature
•
Active-low reset valid with 1.1V supply (ASM811)
•
Small 4-pin SOT-143 package
•
No external components
•
Power-supply transient-immune design
Typical Operating Circuit
•
Computers and Controllers
•
Embedded controllers
•
Portable/Battery operated systems
•
Intelligent instruments
•
Wireless communication systems
•
PDAs and handheld equipment
•
Automotive systems
•
Safety Systems
VCC
VCC
VCC
µP
MR RESET
(RESET)
GND
RESET (RESET)
Input
GND
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
ASM811, ASM812
October 2003
rev 1.0
Pin Diagram:
Block Diagram
SOT143
GND
VCC
4 VCC
1
20kΩ
MR
ASM811
(ASM812)
(RESET) RESET
2
VCC
3 MR
+
+
-
Pin Description
RESET Generator
4.63V
4.38V
4.00V
4.38V
3.08V
2.93V
2.63V
RESET
(RESET)
ASM811
(ASM812)
GND
Pin #
Pin
Name
ASM811
ASM812
1
1
GND
2
-
RESET
-
2
RESET
3
3
MR
4
4
VCC
Function
Ground.
RESET is asserted LOW if VCC falls below VTH and remains LOW for TRST after VCC exceeds
the Threshold. In addition, RESET is active LOW as long as the manual reset is low.
RESET is asserted HIGH if VCC falls below VTH and remains HIGH for TRST after VCC exceeds
the threshold. In addition, RESET is active HIGH as long as the manual reset is low.
Manual Reset Input. A logic LOW on MR asserts reset. Reset remains active as long as MR is
LOW and for TMRST after MR returns HIGH. The active low input has an internal 20kΩ pull-up
resistor. The input should be left open if not used. It can be driven by TTL or CMOS logic or
shorted to ground by a switch.
Power supply input voltage (3.0V, 3.3V, 5.0V)
Detailed Description
Manual Reset (MR) Input
A
proper
reset
input
enables
a
microprocessor
/
microcontroller to start in a known state. ASM811/812 assert
reset to prevent code execution errors during power-up, powerdown and brown-out conditions.
A logic low on MR assserts RESET LOW on the ASM811 and
RESET HIGH on the ASM812. MR is internally pulled high
through a 20kΩ resistor and can be driven by TTL/CMOS gates
or with open collector/drain outputs. MR can be left open if not
used. MR may be connected to ground through a normallyopen momentary switch without an external debounce circuit.
Reset Timing
The reset signal is asserted- LOW for the ASM811 and HIGH
for the ASM812- when the VCC supply voltage falls below the
threshold trip voltage and remains asserted for 140ms
A 0.1µF capacitor from MR to ground can be added for
additional noise immunity.
minimum after the VCC has risen above the threshold.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
2 of 10
ASM811, ASM812
October 2003
rev 1.0
VTH
5V
VCC
TRST
MR
5V
0V
100kΩ
ASM811
Power Supply
MR
TMRST
ASM811
5V
0V
ASM812
ASM812
Power Supply
RESET
MR
RESET
100kΩ
GND
5V
RESET
0V
RESET
VCC
VCC
0V
GND
Figures 2 & 3: RESET valid with VCC under 1.1V
Figure 1: Reset Timing and Manual Reset (MR)
Application Information
Reset Output Operation
In µP / µC systems it is important to have the processor and
Negative VCC Transients
the system begin operation from a known state. A reset
Typically short duration transients of 100mV amplitude and
output to a processor is provided to prevent improper
20µs duration do not cause a false RESET. A 0.1µF capacitor
operation during power supply sequencing or low voltage
at VCC increses transient immunity.
brown-out conditions.
Bidirectional Reset Pin Interfacing
The ASM811/812 are designed to monitor the system power
The ASM811/812 can interface with µP / µC bi-directional
supply voltages and issue a reset signal when the levels are
reset pins by connecting a 4.7kΩ resistor in series with the
out of range. RESET outputs are guaranteed to be active for
ASM811/812 reset output and the µP/µC bi-directional reset
VCC above 1.1V. When VCC exceeds the reset threshold, an
internal timer keeps RESET active for the reset timeout
input pin.
BUF
Buffered
RESET
period, after which RESET becomes inactive (HIGH for the
ASM811 and LOW for the ASM812). If VCC drops below the
VCC
reset threshold, RESET automatically becomes active.
Alternatively, external circuitry or an operator can initiate this
condition using the Manual Reset (MR) pin. MR can be left
open if it is not used. MR can be driven by TTL/CMOS logic
ASM811
Power supply
4.7kΩ
MR
or even an external switch.
µC or µP
RESET
RESET
Input
GND
GND
Valid Reset with VCC under 1.1V
To ensure logic inputs connected to the ASM811 RESET pin
are in a known state when VCC is under 1.1V, a 100kΩ pulldown resistor at RESET is needed. The value is not critical.
Bi-directional I/O Pin
Figure 4: Bi-directional Reset Pin Interface
A 100kΩ pull-up resistor to VCC is needed with the ASM812.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
3 of 10
ASM811, ASM812
October 2003
rev 1.0
Absolute Maximum Ratings, Table 1:
Parameter
Min
Max
Units
VCC
-0.3
6.0
V
RESET, RESET and MR
-0.3
VCC + 0.3
V
Input current at VCC and MR
20
mA
Output current: RESET, RESET
20
mA
Rate of Rise at VCC
100
V/µs
Pin Terminal Voltage With Respect To Ground
Note: These are stress ratings only and the functional operation is not implied. Exposure
to absolute maximum ratings for prolonged time periods may affect device reliability.
Absolute Maximum Ratings, Table 2:
Parameter
Min
Power Dissipation (TA = 70°C)
Derate SOT-143 4mW/°C above 70°C
Max
Units
320
uW
Operating temperature range
-40
105
°C
Storage temperature range
-65
160
°C
300
°C
Lead temperature (Soldering, 10 sec)
Note: These are stress ratings only and the functional operation is not implied. Exposure to absolute
maximum ratings for prolonged time periods may affect device reliability.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
4 of 10
ASM811, ASM812
October 2003
rev 1.0
Electrical Characteristics:
Unless otherwise noted, VCC is over the full voltage range, TA = -40°C to 105°C.
Typical values at TA = 25°C, VCC = 5V for L/M/J devices, VCC = 3.3V for T/S devices and VCC = 3V for R devices.
Symbol
VCC
ICC
VTH
TCVTH
Parameter
Input Voltage Range
Supply Current (Unloaded)
Conditions
Min
TA = 0°C to 70°C
TA = -40°C to 105°C
1.1
1.2
TA= -40°C to 85°C
TA = -40°C to 85°C
TA = 85°C to 105°C
TA = 85°C to 105°C
VCC <
VCC <
VCC <
VCC <
5.5V, L/M/J
3.6V, R/S/T
5.5V, L/M/J
3.6V, R/S/T
9
6.8
Unit
5.5
5.5
V
V
15
10
25
20
µA
TA = 25°C
TA = -40°C to 85°C
TA = 85°C to 105°C
4.56
4.50
4.40
4.63
4.70
4.75
4.86
M devices
TA = 25°C
TA = -40°C to 85°C
TA = 85°C to 105°C
4.31
4.25
4.16
4.38
4.45
4.50
4.56
J devices
TA = 25°C
TA = -40°C to 85°C
TA = 85°C to 105°C
3.93
3.89
3.80
4.00
4.06
4.10
4.20
T devices
TA = 25°C
TA = -40°C to 85°C
TA = 85°C to 105°C
3.04
3.00
2.92
3.08
3.11
3.15
3.23
S devices
TA = 25°C
TA = -40°C to 85°C
TA = 85°C to 105°C
2.89
2.85
2.78
2.93
2.96
3.00
3.08
R devices
TA = 25°C
TA = -40°C to 85°C
TA = 85°C to 105°C
2.59
2.55
2.50
2.63
2.66
2.70
2.76
V
Reset Threshold Temp.
Coefficient
VCC = VTH to (VTH - 125mV),
TA = 0°C to 70°C
Reset Active Timeout Period
TA = -40°C to 105°C
MR Minimum Pulse Width
Max
L devices
Reset Threshold
VCC to Reset Delay
tMR
Typ
30
ppm/°C
60
µs
140
100
560
240
840
10
ms
µs
Notes:
1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.
2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.
3. Glitches of 100ns or less typically will not generate a reset pulse.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
5 of 10
ASM811, ASM812
October 2003
rev 1.0
Symbol
tMD
VIH
Parameter
VOL
Unit
ns
MR to RESET Propogation
Delay
Note 2
0.5
µs
VCC > VTH (MAX),
ASM811/812L/M/J
MR Input Threshold
VCC > VTH (MAX),
ASM811/812R/S/T
MR Input Threshold
Low RESET Output Voltage
(ASM811)
High RESET Output Voltage
(ASM811)
Low RESET Output Voltage
(ASM812)
2.3
V
0.8
0.77VCC
10
20
30
VCC= VTH min., ISINK = 1.2mA,
ASM811R/S/T
0.3
VCC= VTH min., ISINK = 3.2mA,
ASM811L/M/J
0.4
VCC > 1.1V, ISINK = 50µA
0.3
VCC > VTH max., ISOURCE = 500µA,
ASM811R/S/T
kΩ
V
0.8VCC
V
VCC > VTH max., ISOURCE = 800µA,
ASM811L/M/J
VCC - 1.5
VCC= VTH max., ISINK = 1.2mA,
ASM812R/S/T
0.3
VCC= VTH max., ISINK = 3.2mA,
ASM812L/M/J
0.4
V
High RESET Output Voltage
(ASM812)
1.8V < VCC < VTH min., ISOURCE = 150µA
0.8VCC
TRST
Active Reset Timeout Period
VCC > VTH
140
Manual Active Reset Timeout Period
V
0.25VCC
VOH
TMRST
Max
100
MR Pullup Resistance
VOH
Typ
Note 3
VIL
VOL
Min
MR Glitch Immunity
VIL
VIH
Conditions
MR returns HIGH
V
240
msec
180
msec
Notes:
1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.
2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.
3. Glitches of 100ns or less typically will not generate a reset pulse.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
6 of 10
ASM811, ASM812
October 2003
rev 1.0
Typical Operating Characteristics
Unless otherwise noted, VCC is over the full voltage range, TA = -40°C to 105°C. Typical values at TA = 25°C,
VCC = 5V for L/M/J devices, VCC = 3.3V for T/S devices and VCC = 3V for R devices.
Supply Current vs Tem perature
Supply Current (µA)
10
ASM811T
8
6
4
ASM811R
2
0
-40
-20
0
20
40
60
80
100
125
100
125
Tem perature (°C)
Normalised Reset
Threshold
Norm alised Reset Threshold vs Tem perature
1.02
1.01
1
0.99
0.98
0.97
0.96
0.95
-40
ASM811T
ASM811R
-20
0
20
40
60
80
Tem perature (°C)
Reset Timeout Period
(ms)
Reset Tim eout Period vs Tem perature
400
350
300
250
200
150
100
50
0
-40
ASM811R
ASM811T
-20
0
20
40
60
80
100
125
Tem perature (°C)
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
7 of 10
ASM811, ASM812
October 2003
rev 1.0
Package Dimensions:
Plastic SOT-143 (4-Pin)
Inches
Millimeters
e1
B
Min
Max
Min
Max
A
0.031
0.047
0.787
1.194
A1
0.001
0.005
0.025
0.127
B
0.014
0.022
0.356
0.559
B1
0.030
0.038
0.762
0.965
C
0.0034
0.006
0.086
0.152
D
0.105
0.120
2.667
3.048
E
0.047
0.055
1.194
1.397
e
0.070
0.080
1.778
2.032
e1
0.071
0.079
1.803
2.007
H
0.082
0.098
2.083
2.489
L
0.004
0.012
0.102
0.305
E
B1
H
e
D
A
a = 0° -8°
A1
e
C
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
L
8 of 10
ASM811, ASM812
October 2003
rev 1.0
Ordering Information:
Part Number 1
Reset Threshold (V)
Temperature Range
Pin-Package
Package Marking
(XX Lot Code)
ASM811 ACTIVE LOW RESET
ASM811LEUS-T
4.63
-40°C to +105°C
4-SOT143
SMXX
ASM811MEUS-T
4.38
-40°C to +105°C
4-SOT143
SNXX
ASM811JEUS-T
4.00
-40°C to +105°C
4-SOT143
SOXX
ASM811TEUS-T
3.08
-40°C to +105°C
4-SOT143
SPXX
ASM811SEUS-T
2.93
-40°C to +105°C
4-SOT143
SQXX
ASM811REUS-T
2.63
-40°C to +105°C
4-SOT143
SRXX
ASM812LEUS-T
4.63
-40°C to +105°C
4-SOT143
SSXX
ASM812MEUS-T
4.38
-40°C to +105°C
4-SOT143
STXX
ASM812JEUS-T
4.00
-40°C to +105°C
4-SOT143
SUXX
ASM812TEUS-T
3.08
-40°C to +105°C
4-SOT143
SVXX
ASM812SEUS-T
2.93
-40°C to +105°C
4-SOT143
SWXX
ASM812REUS-T
2.63
-40°C to +105°C
4-SOT143
SXXX
ASM812 ACTIVE HIGH RESET
Notes:
1. Tape and Reel packaging is indicated by the -T designation.
Related Products:
Max Supply Current
Package Pins
ASM809
ASM810
ASM811
ASM812
15µA
15µA
15µA
15µA
3
3
4
4
„
„
SOT - 143
SOT - 143
Manual RESET input
Package Type
SOT - 23
Active-HIGH RESET Output
Active-LOW RESET Output
SOT - 23
„
„
„
„
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
9 of 10
ASM811, ASM812
Alliance Semiconductor Corporation
2575, Augustine Drive,
Santa Clara, CA 95054
Tel: 408 - 855 - 4900
Fax: 408 - 855 - 4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Part Number: ASM811, ASM812
Document Version: v 1.0
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or
registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the
right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may
appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the
right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these
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