ATMEL AT59C22-10PI-2.5 4-wire serial eeprom Datasheet

Features
• Low Voltage and Standard Voltage Operation
•
•
•
•
•
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
User Selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
4-Wire Serial Interface
Self-Timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >4000V
8-Pin PDIP and 8-Pin EIAJ SOIC Packages
4-Wire Serial
EEPROMs
1K (128 x 8 or 64 x 16)
Description
2K (256 x 8 or 128 x 16)
The AT59C11/22/13 provides 1024/2048/4096 bits of serial EEPROM (Electrically
Erasable Programmable Read Only Memory) organized as 64/128/256 words of 16
bits each, when the ORG Pin is connected to VCC and 128/256/512 words of 8 bits
each when it is tied to ground. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operation are essential.
The AT59C11/22/13 is available in space saving 8-pin PDIP and 8-pin EIAJ SOIC
packages.
The AT59C11/22/13 is enabled through the Chip Select pin (CS), and accessed via a
4-wire serial interface consisting of Data Input (DI), Data Output (DO), and Clock
(CLK). Upon receiving a READ instruction at DI, the address is decoded and the data
is clocked out serially on the data output pin DO, the WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is
only enabled when the part is in the ERASE/WRITE ENABLE state. Ready/Busy status can be monitored upon completion of a programming operation by polling the
Ready/Busy pin.
The AT59C11/22/13 is available in 5.0V ± 10%, 2.7V to 5.5V and 2.5V to 5.5V versions.
4K (512 x 8 or 256 x 16)
Pin Configurations
Pin Name
Function
CS
Chip Select
CLK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
GND
Ground
VCC
Power Supply
ORG
Internal Organization
RDY/BUSY
Status Output
8-Pin PDIP
AT59C11
AT59C22
AT59C13
4-Wire, 1K
Serial E2PROM
8-Pin SOIC
Rev. 0173K–07/98
1
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
DC Output Current........................................................ 5.0 mA
Block Diagram(1)
Note:
2
1.
When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected, then an internal pullup device will select the x 16 organization.
AT59C11/22/13
AT59C11/22/13
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Test Conditions
Max
Units
Conditions
COUT
Output Capacitance (DO)
5
pF
VOUT = 0V
CIN
Input Capacitance (CS, CLK, DI, RDY/BUSY)
5
pF
VIN = 0V
Note:
1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +2.5V to +5.5V,
TAC = 0°C to +70°C, VCC = +2.5V to +5.5V (unless otherwise noted).
Symbol
Parameter
VCC1
Supply Voltage
VCC2
Test Condition
Max
Units
1.8
5.5
V
Supply Voltage
2.5
5.5
V
VCC3
Supply Voltage
2.7
5.5
V
VCC4
Supply Voltage
4.5
5.5
V
ICC
Supply Current
VCC = 5.0V
Min
Typ
READ at 1.0 MHz
0.5
2.0
mA
WRITE at 1.0 MHz
0.5
2.0
mA
ISB1
Standby Current
VCC = 2.5V
CS = 0V
6.0
10.0
µA
ISB2
Standby Current
VCC = 2.7V
CS = 0V
6.0
10.0
µA
ISB3
Standby Current
VCC = 5.0V
CS = 0V
21.0
30.0
µA
IIL
Input Leakage
VIN = 0V to VCC
0.1
1.0
µA
0.1
1.0
µA
IOL
Output Leakage
VIN = 0V to VCC
(1)
VIL1
VIH1(1)
Input Low Voltage
Input High Voltage
4.5V ≤ VCC ≤ 5.5V
-0.6
2.0
0.8
VCC + 1
V
VIL2(1)
VIH2(1)
Input Low Voltage
Input High Voltage
2.5V ≤ VCC ≤ 2.7V
-0.6
VCC x 0.7
VCC x 0.3
VCC + 1
V
VOL1
VOH1
Output Low Voltage
Output High Voltage
4.5V ≤ VCC ≤ 5.5V
IOL = 2.1 mA
IOH = 0.4 mA
0.4
V
2.4
VOL2
VOH2
Output Low Voltage
Output High Voltage
2.5V ≤ VCC ≤ 2.7V
IOL = 0.15 mA
IOH = -0.1 mA
0.2
V
VCC - 0.2
Note:
1. VIL min and VIH max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +2.5V to +5.5V,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
Parameter
Test Condition
Min
Typ
Max
fCLK
CLK Clock Frequency
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
0
0
0
0
tCKH
CLK High Time
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
250
250
500
1000
ns
tCKL
CLK Low Time
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
250
250
500
1000
ns
tCS
Minimum CS Low Time
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
250
250
500
1000
ns
tCSS
CS Setup Time
Relative to SK
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
50
50
100
200
ns
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
100
100
200
400
ns
0
ns
100
100
200
400
ns
1
1
0.5
0.25
Units
MHz
tDIS
DI Setup Time
Relative to SK
tCSH
CS Hold Time
Relative to SK
tDIH
DI Hold Time
Relative to SK
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
250
250
500
1000
ns
tPD1
Output Delay to ‘1’
AC Test
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
tPD0
Output Delay to ‘0’
AC Test
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
250
250
500
1000
ns
tRBD
RDY/BUSY Delay to
Status Valid
AC Test
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
250
250
500
1000
ns
tCZ
CS to DO in High
Impedance
AC Test
CS = VIL
4.5V ≤ VCC
2.7V ≤ VCC
2.5V ≤ VCC
1.8V ≤ VCC
≤ 5.5V
≤ 5.5V
≤ 5.5V
≤ 5.5V
100
100
200
400
ns
10
ms
tWC
Endurance
Note:
4
(1)
Write Cycle Time
0.1
5.0V, 25°C, Page Mode
1M
1. This paramter is characterized and is not 100% tested.
AT59C11/22/13
Write Cycles
AT59C11/22/13
Instruction Set for the AT59C11
Address
Data
SB
Op
Code
x8
x 16
READ
1
10XX
A6 - A0
A5 - A0
EWEN
1
0011
XXXXXXX
XXXXXX
WRITE
1
X1XX
A6 - A0
A5 - A0
ERAL
1
0010
XXXXXXX
XXXXXX
WRAL
1
0001
XXXXXXX
XXXXXX
EWDS
1
0000
XXXXXXX
XXXXXX
Instruction
x8
x 16
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
D7 - D0
D15 - D0
Writes memory location An - A0.
Erases all memory locations. Valid only
at VCC = 4.5V to 5.5V.
D7 - D0
D15 - D0
Writes all memory locations. Valid only
at VCC = 4.5V to 5.5V.
Disables all programming
instructions.
Instruction Set for the AT59C22
Address
Data
SB
Op
Code
x8
x 16
READ
1
10XX
A7 - A0
A6 - A0
EWEN
1
0011
XXXXXXXX
XXXXXXX
WRITE
1
X1XX
A7 - A0
A6 - A0
ERAL
1
0010
XXXXXXXX
XXXXXXX
WRAL
1
0001
XXXXXXXX
XXXXXXX
EWDS
1
0000
XXXXXXXX
XXXXXXX
Instruction
x8
x 16
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
D7 - D0
D15 - D0
Writes memory location An - A0.
Erases all memory locations. Valid only
at VCC = 4.5V to 5.5V.
D7 - D0
D15 - D0
Writes all memory locations. Valid when
VCC = 5.0V ± 10% and Disable Register
cleared.
Disables all programming instructions.
5
Instruction Set for the AT59C13
Address
Data
SB
Op
Code
x8
x 16
READ
1
10XX
A8 - A0
A7 - A0
EWEN
1
0011
XXXXXXXXX
XXXXXXXX
WRITE
1
X1XX
A8 - A0
A7 - A0
ERAL
1
0010
XXXXXXXXX
XXXXXXXX
WRAL
1
0001
XXXXXXXXX
XXXXXXXX
EWDS
1
0000
XXXXXXXXX
XXXXXXXX
Instruction
6
AT59C11/22/13
x8
x 16
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
D7 - D0
D15 - D0
Writes memory location An - A0.
Erases all memory locations. Valid only
at VCC = 4.5V to 5.5V.
D7 - D0
D15 - D0
Writes all memory locations. Valid when
VCC = 5.0V ± 10% and Disable Register
cleared.
Disables all programming instructions.
AT59C11/22/13
Functional Description
The AT59C11/22/13 are accessed via a simple and versatile 4-wire serial communication interface. Device operation
is controlled by six instructions issued by the host processor. A valid instruction starts with a rising edge of CS
and consists of a Start Bit (logic ‘1’) followed by the appropriate Op Code and the desired memory Address location.
READ (READ): The Read (READ) instruction contains
the Address code for the memory location to be read. After
the instruction and address are decoded, data from the
selected memory location is available at the serial output
pin DO. Output data changes are synchronized with the rising edges of serial clock CLK. It should be noted that a
dummy bit (logic ‘0’) precedes the 8- or 16-bit data output
string.
ERASE/WRITE (EWEN): To assure data integrity, the
part automatically goes into the Erase/Write Disable
(EWDS) state when power is first applied. An Erase/Write
Enable (EWEN) instruction must be executed first before
any programming instructions can be carried out. Please
note that once in the Erase/Write Enable state, programming remains enabled until an Erase/Write Disable
(EWDS) instruction is executed or VCC power is removed
from the part.
WRITE (WRITE): The Write (WRITE) instruction contains
the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle, tWP, starts
after the last bit of data is received at serial data input pin
DI. The Ready/Busy status of the AT59C11/22/13 can be
determined by polling the RDY/BUSY pin. A logic ‘0’ at
RDY/BUSY indicates that programming is still in progress.
A logic ‘1’ indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further
instructions.
ERASE ALL (ERAL): The Erase All (ERAL) instruction
programs every bit in the memory array to the logic ‘1’ state
and is primarily used for testing purposes. The Ready/Busy
status of the AT59C11/22/13 can be determined by polling
the RDY/BUSY pin. The ERAL instruction is valid only at
VCC = 5.0V ± 10%.
WRITE ALL (WRAL): The Write All (WRAL) instruction
programs all memory locations with the data patterns specified in the instruction. The Ready/Busy status of the
AT59C11/22 /1 3 can be de termi ned by pol ling the
RDY/BUSY pin. The WRAL instruction is valid only at VCC =
5.0V ± 10%.
ERASE/WRITE DISABLE (EWDS): To protect against
accidental data disturb, the Erase/Write Disable (EWDS)
instruction disables all programming modes and should be
executed after all programming operations. The operation
of the READ instruction is independent of both the EWEN
and EWDS instructions and can be executed at any time.
Timing Diagrams
Synchronous Data Timing
Note:
1.
This is the minimum CLK period.
7
Organization Key for Timing Diagrams
Density 1K
Density 2K
Density 4K
I/O
x8
x 16
x8
x 16
x8
x 16
AN
A6
A5
A7
A6
A8
A7
DN
D7
D15
D7
D15
D7
D15
READ Timing
CS
CLK
1
DI
1
0
0
0
AN
...
A0
0
...
DN
DO
HIGH-Z
D0
WRITE Timing
CS
CLK
1
DI
X
1
0
0
AN
...
...
DN
A0
1
D0
tRBD
RDY/BUSY
tWC
EWEN/EWDS Timing
CS
CLK
DI
1
0
0
*
ENABLE = 11
*DISABLE = 00
8
AT59C11/22/13
X
X
X
X
X
X
X
AT59C11/22/13
ERAL Timing
CS
CLK
DI
1
0
0
1
X
X
X
X
X
X
X
1
tRBD
RDY/BUSY
tWC
WRAL Timing
CS
CLK
DI
RDY/BUSY
1
0
0
0
1
X
X
X
X
X
X
X
DN
...
D0
1
tRBD
tWC
9
AT59C11 Ordering Information
tWC (max)
(ms)
ICC (max)
(µA)
ISB (max)
(µA)
fMAX
(kHz)
10
2000
30.0
10
10
800
600
Ordering Code
Package
1000
AT59C11-10PC
AT59C11W-10SC
8P3
8S2
Commercial
(0°C to 70°C)
30.0
1000
AT59C11-10PI
AT59C11W-10SI
8P3
8S2
Industrial
(-40°C to 85°C)
10.0
1000
AT59C11-10PC-2.7
AT59C11W-10SC-2.7
8P3
8S2
Commercial
(0°C to 70°C)
10.0
1000
AT59C11-10PI-2.7
AT59C11W-10SI-2.7
8P3
8S2
Industrial
(-40°C to 85°C)
10.0
500
AT59C11-10PC-2.5
AT59C11W-10SC-2.5
8P3
8S2
Commercial
(0°C to 70°C)
10.0
500
AT59C11-10PI-2.5
AT59C11W-10SI-2.5
8P3
8S2
Industrial
(-40°C to 85°C)
Package Type
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S2
8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
Options
Blank
Standard Device (4.5V to 5.5V)
-2.7
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
10
AT59C11/22/13
Operation Range
AT59C11/22/13
AT59C22 Ordering Information
tWC (max)
(ms)
ICC (max)
(µA)
ISB (max)
(µA)
fMAX
(kHz)
10
2000
30.0
10
10
800
600
Ordering Code
Package
Operation Range
1000
AT59C22-10PC
AT59C22W-10SC
8P3
8S2
Commercial
(0°C to 70°C)
30.0
1000
AT59C22-10PI
AT59C22W-10SI
8P3
8S2
Industrial
(-40°C to 85°C)
10.0
1000
AT59C22-10PC-2.7
AT59C22W-10SC-2.7
8P3
8S2
Commercial
(0°C to 70°C)
10.0
1000
AT59C22-10PI-2.7
AT59C22W-10SI-2.7
8P3
8S2
Industrial
(-40°C to 85°C)
10.0
500
AT59C22-10PC-2.5
AT59C22W-10SC-2.5
8P3
8S2
Commercial
(0°C to 70°C)
10.0
500
AT59C22-10PI-2.5
AT59C22W-10SI-2.5
8P3
8S2
Industrial
(-40°C to 85°C)
Package Type
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S2
8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
Options
Blank
Standard Device (4.5V to 5.5V)
-2.7
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
11
AT59C13 Ordering Information
tWC (max)
(ms)
ICC (max)
(µA)
ISB (max)
(µA)
fMAX
(kHz)
10
2000
30.0
10
10
800
600
Ordering Code
Package
1000
AT59C13-10PC
AT59C13W-10SC
8P3
8S2
Commercial
(0°C to 70°C)
30.0
1000
AT59C13-10PI
AT59C13W-10SI
8P3
8S2
Industrial
(-40°C to 85°C)
10.0
1000
AT59C13-10PC-2.7
AT59C13W-10SC-2.7
8P3
8S2
Commercial
(0°C to 70°C)
10.0
1000
AT59C13-10PI-2.7
AT59C13W-10SI-2.7
8P3
8S2
Industrial
(-40°C to 85°C)
10.0
500
AT59C13-10PC-2.5
AT59C13W-10SC-2.5
8P3
8S2
Commercial
(0°C to 70°C)
10.0
500
AT59C13-10PI-2.5
AT59C13W-10SI-2.5
8P3
8S2
Industrial
(-40°C to 85°C)
Package Type
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S2
8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
Options
Blank
Standard Device (4.5V to 5.5V)
-2.7
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
12
AT59C11/22/13
Operation Range
AT59C11/22/13
Packaging Information
8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)
8S2, 8-Lead, 0.200" Wide, Plastic Gull Wing Small
Outline (EIAJ SOIC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-001 BA
.020 (.508)
.012 (.305)
.400 (10.16)
.355 (9.02)
PIN
1
.280 (7.11)
.240 (6.10)
.300 (7.62) REF
.210 (5.33) MAX
.037 (.940)
.027 (.690)
.330 (8.38)
.300 (7.62)
.050 (1.27) BSC
.100 (2.54) BSC
.212 (5.38)
.203 (5.16)
SEATING
PLANE
.080 (2.03)
.070 (1.78)
.015 (.380) MIN
.150 (3.81)
.115 (2.92)
.070 (1.78)
.045 (1.14)
.022 (.559)
.014 (.356)
.013 (.330)
.004 (.102)
.325 (8.26)
.300 (7.62)
.012 (.305)
.008 (.203)
.213 (5.41)
.205 (5.21)
PIN 1
0
REF
15
.430 (10.9) MAX
0
REF
8
.010 (.254)
.007 (.178)
.035 (.889)
.020 (.508)
13
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