AME ATTM02M Processor thermal monitor Datasheet

AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
1. General Description
2. Features
The ATTM01/ATTM02 are precision remote diode temperature sensors with a 2-wire System Management Bus
(SMBus) serial interface. The ATTM01/ATTM02 measure:
(1) Local temperature and (2) the temperature of a remote
diode based transistor from Computer Processor Unit
(CPU), Graphic Processor Unit (GPU) or other ASICs.
The ATTM01/ATTM02 provide two system alarms:
ALERT# and OVERT#.
(1) ALERT# event occurs when any temperature goes
outside the value that setup by preprogrammed HIGH and
LOW temperature limit registers.
l Remote and Local Temperature Sensing.
l ±1℃ Accuracy.
l Programmable HIGH/LOW Alarm Temperature
Thresholds.
l ALERT# Output Supports SMBus Protocol.
l OVERT# Output Useful for System Shutdown.
l SMBus-compatible interface.
l SMBus timeout support.
l Packages: SOP-8 and MSOP-8
(2) OVERT# event occurs when any temperature exceeds the OVERT# programmed limit.
ATTM02 has a different SMBus address to the ATTM01.
The SMBus address of the ATTM01 is 0x90 and ATTM02
is 0x94.
3. Pin Configuration/ Top Side Mark
1
D+
2
D-
3
OVERT#
4
Product Name
XXXX
(Data code)
XXXXXXX_XX
(Lot NO_IID)
VDD
8
SMBCLK
7
SMBDATA
6
ALERT#
5
GND
Figure1. ATTM01/ATTM02 Pin Diagram (Top View)
Rev. B.01
1
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
※ Ordering Information
Part number
Package
SMBus address
Marking
ATTM01
SOP-8
0x90
TM01
ATTM01G
SOP-8, Green
0x90
TM01G
ATTM01M
MSOP-8
0x90
TM01M
ATTM01MG
MSOP-8, Green
0x90
TM01MG
ATTM02
SOP-8
0x94
TM02
ATTM02G
SOP-8, Green
0x94
TM02G
ATTM02M
MSOP-8
0x94
TM02M
ATTM02MG
MSOP-8, Green
0x94
TM02MG
4. Pin Description
Pin Type Description
OD - Open-drain output
IN - Input pin
AIN - Analog input.
I/OD - Bi-directional with open-drain output.
2
Pin No.
Pin Name
I/O Type
Function
1
VDD
Power
2
D+
AIN
Thermal diode anode Input
3
D-
AIN
Thermal diode cathode Input.
4
OVERT#
OD
Power supply shutdown control.
5
GND
Ground
6
ALERT#
OD
SMBus alert (interrupt) Output.
7
SMBDATA
I/OD
SMBus bi-directional data line.
8
SMBCLK
IN
3.3V Power Input.
Ground pin.
SMBus clock Input.
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
n Typical Application
3.3Vsb
3.3V
C3
C2
C1
10u
0.1u
100p
VCORE
R1
R2
4.7k
4.7k
U2
C6
1
R6
2.2n
2
4.7k
3
4
R4
VDD
D+
SMBCLK
SMBDATA
D
OVERT#
ALERT#
GND
8
SCLK
7
SDA
6
5
C4
47p
C5
47p
0
ATTM01/ATTM02
South bridge
3.3V
Shutdown circuit
Rev. B.01
THERMTRIP#
CPU
R7
4.7k
3
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
6. Electrical Specifications
(These specifications apply for VCC = 3.3V and T A = +25oC, unless otherwise noted.) (Note 1)
Parameter
Supply Voltage
Symbol
Test Conditions
V CC
Min
Typ
3
Max Units
3.6
0.5
Temperature Resolution
°C
9
V CC = 3.3V, TA =+25°C to +100°C,
Remote Temperature Error
V CC
TRJ = +60°C to +100°C
= 3.3V, TA =+25°C to +100°C,
V CC
TRJ = 0°C to +100°C
= 3.3V, TA =+25°C to +100°C,
TRJ = 0°C to +125°C
V CC = 3.3V,
TA = +60°C to +100°C
V CC = 3.3V,
Local Temperature Error
TA = 0°C to +100°C
V
Bits
-1.0
+ 1.0
°C
-3.0
+ 3.0
°C
-5.0
+ 5.0
°C
-2.0
2.0
°C
-3.0
3.0
°C
Supply Sensitivity of Temperature Error
±0.2
°C/V
UVLO Hysteresis
120
mV
UVLO Threshold
Falling edge
2.62
V
Power-On-Reset (POR) Threshold
Rising edge
2.74
V
120
mV
SMBus static
7.8
µA
During conversion
0.53
mA
Power-On-Reset (POR) Hysteresis
Standby Supply Current
Operating Current
Conversion Time
t CONV
From stop bit to conversion completion
Conversion Time Error
Remote-Diode Source Current
95
125
-25
IRJ
156
ms
+25
%
High level
75
100
140
Low level
7.5
10
14
µA
ALERT, OVERT
Output Low Voltage
Output High Leakage Current
ISINK = 1mA
0.4
V
ISINK = 4mA
0.6
V
V OH = 5.5V
1
µA
0.8
V
SMBus-COMPATIBLE INTERFACE (SMBCLK AND SMBDATA)
4
Logic Input Low Voltage
V IL
Logic Input High Voltage
V IH
V CC = 3.0V
2.2
V
V CC = 5.5V
2.6
V
Input Leakage Current
ILEAK
V IN = GND or VCC
-1
Output Low-Sink Current
ISINK
V OL = 0.6V
6
Input Capacitance
CIN
1
µA
mA
5
pF
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
6. Electrical Specifications
Parameter
Symbol
Test Conditions
fSMBCLK
(Note 3)
Min
Typ
Max Units
SMBus-COMPATIBLE TIMING (Note 2)
Serial Clock Frequency
Bus Free Time Between STOP and
START Condition
tBUF
START Condition Setup Time
100
kHz
4.7
µs
4.7
µs
Repeat START Condition Setup Time
tSU:STA
90% to 90%
50
ns
START Condition Hold Time
tHD:STA
10% of SMBDATA to 90% of SMBCLK
4
µs
STOP Condition Setup Time
tSU:STO
90% of SMBCLK to 90% of SMBDATA
4
µs
Clock Low Period
tLOW
10% to 10%
4.7
µs
Clock High Period
tHIGH
90% to 90%
4
µs
Data Setup Time
tHD:DAT
(Note 4)
250
µs
Receive SMBCLK/SMBDATA Rise Time
tR
1
µs
Receive SMBCLK/SMBDATA Fall Time
tF
300
ns
Pulse Width of Spike Suppressed
tSP
60
ns
45
ms
SMBus Timeout
tTIMEOUT SMBDATA low period for interface reset
0
25
37
Note 1: All parameters tested at a single temperature. Specifications over temperature are guaranteed by design.
Note 2: Timing specifications guaranteed by design.
Note 3: The serial interface resets when SMBCLK is low for more than t TIMEOUT.
Note 4: A transition must internally provide at least a hold time to bridge the undefined region (300ns max) of
SMBCLK’s falling edge.
Rev. B.01
5
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
7. Hardware Monitor Block
Control
Register
Remote
Data Control
Logic
SMBCLK
DXP
Sigma-Delta
ADC
Control
SMBus
Codec
DXN
SMBDATA
Status
Register
Local Data
Control
Logic
ALERT _N
OVER _N
Hardware Monitor Interface
This chip is using the 2-wire SMBus serial interface to control the hardware monitor function. The
major function of the hardware monitor is monitored
the remote diode and local diode temperature. It also
using the trimmed mechanism to control the accuracy of the temperature sensor under ± 1 ℃. It also
uses the 2-wire SMBus serial interface. The two interrupt outputs ALERT# and OVER# are active low
at default state and can change these outputs to
active high when set bit 1 of register address 8’h31
to logic one. The slave address of SMBus can select by initial state of ALERT# when power on or
access the command index 8’h42. This chip provides two slave address 7’h1001000 and
7’h1001010 to avoid conflict with other devices.
6
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
8. SMBus Protocol
In this chip it supports the write byte and read byte mode protocol. The following is SMBus read/write data format.
Write Byte Format:
START
Slave
Address
WR
ACK
COMMAND
ACK
DATA
ACK
STOP
1 bit
7 bits
1 bit
1 bit
8 bits
1 bit
8 bits
1 bit
1 bit
The COMMAND Byte is selects that register you are writing to. The DATA Byte is data goes into the register set by
the command byte (to set thresholds, configuration, and update rate).
Read Byte Format:
S
Address
WR
ACK
COMMAND
ACK
S
Address1
RD
ACK
DATA
NAK
STOP
1 bit
7 bits
1 bit
1 bit
8 bits
1 bit
1 bit
8 bits
1 bit
1 bit
8 bits
1 bit
1 bit
The S denotes Start Bit. Address represents slave address. The COMMAND Byte is selects that register you are
reading from. The Address1 is due to change in data flow direction. The DATA Byte is reads from the register set by the
command byte. The in above table the red color denotes Slaver transmission.
SMBus Write Timing Diagram:
SMBCLK
A
B
C
D
E F
G
H
I
J
K
L
M
SMBDATA
A = START CONDITION
B = MSB OF ADDRESS CLCOKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W_ BIT CLOCKED INTO SLAVE
E = SLAVE PULL SMBDATA BUS LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
Rev. B.01
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
I = SLAVE PULLS SMBDATA BUS LOW
J = ACKNOWLEDGE BIT CLOCKED INTO MASTER
K = ACKNOWLEDGE CLEAR PULSE
L = STOP CONDITION DATA EXECUTED BY SLAVE
M = NEW START CONDITION
7
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
SMBus Read Timing Diagram:
SMBCLK
A
B
C
D
E F
G
H
I
J
K
L
M
SMBDATA
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W_ BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA BUS LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
8
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = MASTER PULLS DATA BUS INTO LOW
J = ACKNOWLEDGE BIT CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLEAR PULSE
L = STOP CONDITION, DATA EXECUTED BY SLAVE
M = NEW START CONDITION
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
9. Hardware Monitor Register
The following registers define the temperature sensor control and status registers, data registers and SMBus slave
address register.
9.1 Local Diode Higher Byte Temperature Register, Access Address: “Command Index = 0h”
Field
Type
Position
Bits
I
Function
ADCLOCA_DATA
RO
[7:0]
8
0
Local diode higher byte temperature data.
Bit 7 denotes the sign bit. The LSB represents 1℃.
9.2 Remote Diode Higher Byte Temperature Register, Access Address: “Command Index = 1h”
Field
Type
ADCREMOTE_DATA
Position
RO
Bits
[7:0]
8
I
Function
0
Remote diode higher byte temperature data.
The bit 7 denotes the sign bit. The LSB represents
the 1 ℃.
9.3 Temperature Sensor Status Register, Access Address: “Command Index = 2h”
Field
Type
Position
Bits
I
BUSY
RO
[7]
1
0
ADC converting data.
0
The ADC measure the temperature of local diode that
exceed the alerting high limit. When software reading
this register it will reset to zero if active condition no
more satisfy.
0
The ADC measure the temperature of local diode that
below the alerting low limit. W hen software reading this
register it will reset to zero if active condition no more
satisfy.
0
The ADC measure the temperature of remote diode that
exceed the alerting high limit. When software reading
this register it will reset to zero if active condition no
more satisfy.
LTHOT_REG
LTCOOL_REG
RTHOT_REG
RC
RC
RC
[6]
[5]
[4]
1
1
1
Function
RTCOOL_REG
RC
[3]
1
0
The ADC measure the temperature of remote diode that
below the alerting low limit. W hen software reading this
register it will reset to zero if active condition no more
satisfy.
DIODE_OPEN
RO
[2]
1
0
The ADC detects the DXP and DXN pins disconnect to
remote diode.
0
The ADC measure the temperature of remote diode that
exceed the remote diode critical limit. When software
reading this register it will reset to zero if active
condition no more satisfy.
0
The ADC measure the temperature of local diode that
exceed the local diode critical limit. When software
reading is register it will reset to zero if active condition
no more satisfy.
RCRITI_REG
LCRITI_REG
Rev. B.01
RC
RC
[1]
[0]
1
1
9
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
9.4 ADC Configuration Register, Access Address: “Command Index = 3h”
Field
Type
Position
Bits
I
ALERT_MASK
RO
[7]
1
0
ALERT# mask. When set to “1” ALERT# interrupts
are masked.
STOP
RO
[6]
1
0
When set to “1” the ADC will be terminated.
Reserved
NA
[5]
1
0
Reserved. Not implemented.
CRITI_MASK
RO
[4]
1
0
OVER# mask. When set to “1” OVER# interrupts is
masked.
Reserved
NA
[3:1]
3
0
Reserved. Not implemented.
FAULT_QUEUE
RO
[0]
1
0
When set to “1” denotes three consecutive remote
temperature measurement outside the Alerting,
Critical limit.
Function
9.5 ADC Conversion Rate Register, Access Address: “Command Index = 4h”
Field
Type
Position
Bits
I
Reserved
NA
[7:5]
3
0
Reserved. Not implemented.
UPDATE_RATE
RO
[4:0]
5
0
ADC measure temperature value rate.
Function
9.6 Local Diode Alerting High Limit Register, Access Address: “Command Index = 5h”
Field
Type
Position
Bits
I
Function
LALERT_HIGH
RO
[7:0]
8
8’h50
Local diode alerting high limit register.
The default is set to 80 ℃. The LSB denotes 1 ℃.
9.7 Local Diode Alerting Low Limit Register, Access Address: “Command Index = 6h”
Field
Type
Position
Bits
I
LALERT_LOW
RO
[7:0]
8
0
Function
Local diode alerting low limit register.
The default is set to 0 ℃. The LSB denotes 1 ℃.
9.8 Remote Diode Alerting High Limit Register, Access Address: “Command Index = 7h”
Field
Type
Position
Bits
I
RALERT_HIGH
RO
[7:0]
8
8’h50
Function
Remote diode alerting high limit register.
The default is set to 80℃. The LSB denotes 1 ℃
9.9 Remote Diode Alerting Low Limit Register, Access Address: “Command Index = 8h”
10
Field
Type
Position
RLAERT_LOW
RO
[7:0]
Bits
I
0
Function
Remote diode alerting low limit. The default value
is set to 0 ℃. The LSB represents 1 ℃.
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
9.10 Temperature sensor Configuration Register, Access Address: “Command Index = 9h”
Field
Type
Position
Bits
I
Function
ALERT_MASK
WO
[7]
1
0
When set to “1” ALERT# interrupt is masked.
STOP
WO
[6]
1
0
When set to “1” then the ADC will be terminated.
Reserved
NA
[5]
1
0
Reserved. Not implemented.
CRITI_MASK
WO
[4]
1
0
When set to “1” the Remote/Local diodes exceed
the critical set point will no activated the OVER#
pin..
Reserved
NA
[3:0]
4
0
Reserved. Not implemented.
9.11 ADC Conversion Rate Register, Access Address: “Command Index = Ah”
Field
Type
Position
Bits
I
Reserved
N/A
[7:4]
4
0
CONVERSIO_RATE
WO
[3:0]
4
4’h8
Function
Reserved. Not implemented.
Control the ADC value update to SMBus register.
The variable rate control can be used to reduce
supply current in portable equipment application.
4’h8: conversion rate is 16 Hz (default value), 4’h7:
conversion rate is 8 Hz, 4’h6: conversion rate is 4
Hz, 4’h5: conversion rate is 2 Hz, 4’h4: conversion
rate is 1 Hz, 4’h3: conversion rate is 0.5 Hz, 4’h2:
conversion rate is 0.25 Hz, 4’h1: conversion rate is
0.125 Hz, 4’h0: conversion rate is 0.0625 Hz, other
values are reserved.
9.12 Local Diode Alerting High Limit Register, Access Address: “Command Index = Bh”
Field
Type
Position
Bits
I
Function
LALERT_HIGH
WO
[7:0]
8
8’h50
Setting the local diode alerting high limit register.
The default value is 80 ℃ and the LSB denotes 1 ℃.
9.13 Local Diode Alerting Low Limit Register, Access Address: “Command Index = Ch”
Field
Type
Position
Bits
I
Function
LAERT_LOW
WO
[7:0]
8
0
Setting the local diode alerting low limit register. The
default value is 0 ℃ and the LSB represents 1 ℃.
9.14 Remote Diode Alerting High Limit Temperature Register, Access Address: “Command Index = Dh”
Field
RHIGH_DATA
Rev. B.01
Type
W/O
Position
[7:0]
Bits
8
I
8’h50
Function
Host set the remote diode high limit temperature
value. The default value set to 80 ℃ and LSB
denotes 1 ℃.
11
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
9.15 Remote Diode Alerting Low Limit Temperature Register, Access Address: “Command Index = Eh”
Field
Type
Position
Bits
I
Function
RLOW_DATA
W/O
[7:0]
8
0
Host set the remote diode low limit temperature value.
The default value is 0 ℃ and LSB represents 1 ℃.
9.16 One Shot Register, Access Address: “Command Index = Fh”
Field
Type
Position
Bits
I
Reserved
NA
[7:1]
7
0
Reserved. Not implemented.
0
When want to reduce the supply current it can set bit
6 of register 9 configuration register to “1” and also
set this bit to “1” and then write to “0”, i.e., create a
one shot pulse. The ADC will be ceased operation
after measure one cycle per each remote/local diode.
ONESHOT_ADC
WO
[0]
1
Function
9.17 Remote Diode Lower Byte Temperature Register, Access Address: “Command Index = 10h”
Field
Type
Position
Bits
I
Reserved
NA
[7:1]
7
0
Reserved. Not implemented.
ADCREMOTE_DATA
RO
[0]
1
0
The remote diode lower byte temperature data.
The LSB denotes 0.5 ℃.
Function
9.18 Remote Diode Temperature Offset Register, Access Address: “Command Index = 11h”
Field
ROFFSET_DATA
Type
W/R
Position
[7:0]
Bits
8
I
Function
0
Remote diode temperature offset register to adjust
the decimated filter because of the PCB
placement, routing, and different thermal diode.
Two’s complement format.
9.19 Remote Diode Critical Temperature Limit Register, Access Address: “Command Index = 19h”
Field
Type
Position
Bits
I
RCRITI_DATA
W/R
[7:0]
8
8’h6E
Function
Remote diode critical temperature registers. The
default value is 110 ℃ and the LSB denotes 1 ℃.
9.20 Local Diode Critical Temperature Limit Register, Access Address: “Command Index = 20h”
12
Field
Type
Position
Bits
I
LCRITI_DATA
W/R
[7:0]
8
8’h55
Function
Local diode critical temperatures register. The
default is 85 ℃ and the LSB denotes 1 ℃.
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
9.21 Remote Diode Critical Hysteresis Temperature Register, Access Address: “Command Index = 21h”
Field
Type
Position
Bits
I
Reserved
NA
[7:5]
3
0
CRITI_HYSTE
W/R
[4:0]
5
8’hA
Function
Reserved. Not implement.
Hysteresis the remote diode temperature registers.
The default value is 10 ℃ and LSB denotes 1 ℃.
When temperature exceed the critical temperature
limit the OVER# pin will be activate and the
OVER# pin will be deactivate when temperature
below the critical temperature limit minus this
register value (CRITI_HYSTE).
9.22 Local Diode Lower Byte Temperature Register, Access Address: “Command Index = 30h”
Field
Type
Position
Bits
I
Reserved
NA
[7:1]
7
0
Reserved. Not implemented.
ADCLOCAL_DATA
RO
[0]
1
0
The local diode temperature data. The LSB
denotes 0.5 ℃.
Function
9.23 Thermal Sensor Control Register, Access Address: “Command Index = 31h”
Field
Type
Position
Bits
I
CLEAR_REG
WR
[7]
1
0
Clear the ADC data.
EN_DIRECT
WR
[5]
1
0
Enable the local diode temperature data without
moving average.
EN_RADC_DIR
WR
[4]
1
0
Enable the remote diode temperature data without
moving average.
ANA_MODE
WR
[3]
1
0
When set to “1” then the internal clock and band
gap voltage can output from ALERT# and OVER#,
respectively.
EN_ADCLOCAL
WR
[2]
1
1
Enable the ADC measure the local diode.
INT_POLARITY
WR
[1]
1
1
Change the polarity of ALERT# and OVER#. When
set to “0” these two signals change to active high
signal from active low.
EN_ADCREMOTE
WR
[0]
1
1
Enable the ADC measure the remote diode.
Rev. B.01
Function
13
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
9.24 Thermal Sensor Status Register, Access Address: “Command Index = 32h”
Field
Type
Position
Bits
I
Function
UVLO
RO
[7]
1
1
When the voltage drop to 2.62V then this signal
will be activated. Because when the voltage below
2.62V the ADC can not normal operation.
DIODE_SHORT
RO
[6]
1
0
The ADC analog circuit detects the DXP and DXN
pins are short together.
Reserved
NA
[5:0]
6
0
Reserved. Not implemented.
9.25 SMBus Control Register, Access Address: “Command Index = 42h”
Field
14
Type
Position
Bits
I
Function
ADDR_SEL
WR
[7]
1
0
Select SMBus slave address. 0: slave address is
7’h48, 1: slave address is 7’h4A. The SMBus slave
address can determine from this register bit and
also can pull up or pull down the ALERT# pin.
When pull up ALERT# pin the slave address is
7’h48, otherwise it is 7’h4A.
Reserved
NA
[6:4]
3
0
Reserved. Not implemented.
SOFT_RESET
WR
[3]
1
0
Software reset the control logic.
Reserved
NA
[2:1]
2
2’b10
Reserved. Not implemented. Bit [2] always one.
FREE_RUN_MODE
WR
[0]
1
0
ADC free run mode, i.e., the ADC operation does
not restrict by conversion rate.
Rev. B.01
AME, Inc.
ATTM01/ATTM02
Processor Thermal Monitor
10. Hardware Monitor Programming Guide
If want to this chip fully operation on PCB board the
first step it need setting the remote and local diode offset. This offset can eliminate the PCB trace, binding
wire loading. When software setting the offset register
to reduce side effect of PCB trace to minimum then the
temperature data accuracy is 0.5 ℃.
Setting the bit 5, bit4 of Thermal Sensor Control Register can enable or disable the digital filter. When these
bit set to logic one then the digital filter will be turned
on, otherwise, these digital filter will be turned off.
In this chip has a parity check mechanism to avoid
the software reading remote or local temperature data
and the ADC converting temperature into this register. In
other words, when the software reading the temperature
data (register 8’h0, 8’h1, 8’h10, 8’h30) and at the
same time the ADC want converting temperature data to
register 8’h0, 8’h1, 8’h10, or 8’h30 then the parity
check mechanism will halt the ADC converting temperature data to these registers before software read finish
these register. In order to make parity check mechanism can work well when read the temperature data it
need read the high byte temperature data at first and
continue read the low byte temperature data, i.e., read
the temperature data register the first need read register 8’h0 or 8’h1 and consecutive read register 8’h30
or 8’h10.
When the software want to reduce the supply current
it can enable the one shot mode and this mode operation only at standby mode, i.e., bit 6 of Configuration
register set to “1”. The software need set the bit 1 of
register 8’hF address to “1” and consecutive set this
bit to “1” to generate one pulse signal.
The bit 7 (BUSY) of status register will not effect the
reading temperature data. Because of this bits only show
that ADC converting data.
Rev. B.01
15
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
11. Package Dimension
SOP-8
SYMBOLS
Top View
MAX
MIN
MAX
A
1.35
1.75
0.05315
0.0689
A1
0.10
0.30
0.00394 0.01181
A2
E
H
D
L
θ
Front View
INCHES
MIN
Side View
C
MILLIMETERS
1.473 REF
0.05799 REF
B
0.33
0.51
0.01299 0.02008
C
0.19
0.25
0.00748 0.00984
D
4.80
5.33
0.18898 0.20984
E
3.80
4.00
0.14961 0.15748
1.27 BSC
e
0.05000 BSC
L
0.40
1.27
0.01575 0.05000
H
5.80
6.30
0.22835 0.24803
y
-
0.10
-
0.00394
θ
0o
8o
0o
8o
e
A1
A
A2
7o(4X)
B
16
Rev. B.01
AME, Inc.
Processor Thermal Monitor
ATTM01/ATTM02
11. Package Dimension
MSOP-8
SYMBOLS
Top View
DETAIL A
D
e1
TOP PKG.
BTM PKG.
E1
θ
L2
E
L
L1
PIN 1 I.D
(SHINNY SURFACE)
A
A2
INCHES
MIN
MAX
MIN
MAX
A
-
1.07
-
0.04197
A1
0.05
0.20
0.002
0.008
A2
0.81
0.92
0.032
0.036
b
0.28
0.38
0.011
0.015
b1
0.28
0.33
0.011
0.013
c
0.13
0.23
0.005
0.009
c1
0.13
0.17
0.005
0.006
D
2.90
3.10
0.114
0.122
E
4.77
4.98
0.188
0.196
E1
2.90
3.10
0.114
0.122
e
0.65 TYP
0.0255 TYP
e1
1.95 TYP
0.0767 TYP
L
R0.127(0.005) TYP
ALL CORNER
& EDGES
Front View
MILLIMETERS
0.406
0.686
0.01598 0.02701
L1
0.94 REF
0.037 REF
L2
0.254 TYP
0.010 TYP
θ
0o
8o
0o
8o
A1
e
b
SECTION B-B
End View
b
b1
BASE METAL
B
c
B
E1
c1
WITH PLATING
See Detail A
Rev. B.01
17
www.ame.com.tw
E-Mail: [email protected]
Life Support Policy:
These products of AME, Inc. are not authorized for use as critical components in life-support
devices or systems, without the express written approval of the president
of AME, Inc.
AME, Inc. reserves the right to make changes in the circuitry and specifications of its devices and
advises its customers to obtain the latest version of relevant information.
 AME, Inc. , June 2007
Document: ATT-DSATTM01/ATTM02-B.01
Corporate Headquarter
U.S.A. (Subsidiary)
AME, Inc.
Analog Microelectronics, Inc.
2F, 302 Rui-Guang Road, Nei-Hu District
Taipei 114, Taiwan.
3100 De La Cruz Blvd., Suite 201
Santa Clara, CA. 95054-2438
Tel: 886 2 2627-8687
Fax: 886 2 2659-2989
Tel : (408) 988-2388
Fax: (408) 988-2489