PHILIPS BF1109 N-channel dual-gate mos-fet Datasheet

DISCRETE SEMICONDUCTORS
DATA SHEET
BF1109; BF1109R; BF1109WR
N-channel dual-gate MOS-FETs
Product specification
Supersedes data of 1997 Sep 03
File under Discrete Semiconductors, SC07
1997 Dec 08
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
PINNING
FEATURES
• Short channel transistor with high
forward transfer admittance to input
capacitance ratio
PIN
DESCRIPTION
1
source
• Low noise gain controlled amplifier
up to 1 GHz
2
drain
3
gate 2
• Internal self-biasing circuit to
ensure good cross-modulation
performance during AGC and good
DC stabilization.
4
gate 1
handbook, 2 columns
3
4
2
1
Top view
MSB035
BF1109R marking code: NBp.
Fig.2
APPLICATIONS
Simplified outline
(SOT143R).
• VHF and UHF applications with 9 V
supply voltage, such as television
tuners and professional
communications equipment.
4
3
1
2
3
fpage
4
DESCRIPTION
Enhancement type N-channel
field-effect transistor with source and
substrate interconnected. Integrated
diodes between gates and source
protect against excessive input
voltage surges. The BF1109,
BF1109R and BF1109WR are
encapsulated in the SOT143B,
SOT143R and SOT343R plastic
packages respectively.
Top view
MSB014
BF1109 marking code: NFp.
Fig.1
2
1
Top view
MSB842
BF1109WR marking code: NB.
Simplified outline
(SOT143B).
Fig.3
Simplified outline
(SOT343R).
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
drain-source voltage
−
−
11
V
ID
drain current (DC)
−
−
30
mA
Ptot
total power dissipation
−
−
200
mW
yfs
forward transfer admittance
Tamb ≤ 80 °C
−
30
−
mS
Cig1-ss
input capacitance at gate 1
−
2.2
2.7
pF
Crss
reverse transfer capacitance
f = 1 MHz
−
25
40
fF
F
noise figure
f = 800 MHz
−
1.5
2.5
dB
Xmod
cross-modulation
input level for k = 1% at 40 dB AGC 100
−
−
dBµV
Tj
operating junction temperature
−
150
°C
−
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1997 Dec 08
2
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage
−
11
V
ID
drain current (DC)
−
30
mA
IG1
gate 1 current
−
±10
mA
IG2
gate 2 current
Ptot
total power dissipation
Tstg
Tj
−
±10
mA
−
200
mW
storage temperature
−65
+150
°C
operating junction temperature
−
+150
°C
Tamb ≤ 80 °C; note 1
Note
1. Device mounted on a printed-circuit board.
MGM243
250
handbook, halfpage
Ptot
(mW)
200
150
100
50
0
0
40
80
120
160
Tamb (°C)
Fig.4 Power derating curve.
1997 Dec 08
3
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
Rth j-a
thermal resistance from junction to ambient in free air
Rth j-s
thermal resistance from junction to soldering point
VALUE
note 1
UNIT
350
K/W
200
K/W
Note
1. Device mounted on a printed-circuit board.
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VG1-S = VG2-S = 0; ID = 10 µA
11
−
V
V(BR)G1-SS gate 1-source breakdown voltage
VG2-S = 0; IG1-S = 10 µA; ID = 0
11
−
V
V(BR)G2-SS gate 2-source breakdown voltage
VG1-S = VDS = 0; IG2-S = 10 µA
11
−
V
V(BR)DSS
drain-source breakdown voltage
VG2-S (th)
gate 2-source threshold voltage
VG1-S = 9 V; VDS = 9 V; ID = 20 µA
0.3
1.2
V
IDSX
self-biasing drain current
VG2-S = 4 V; VDS = 9 V
8
16
mA
IG1-SS
gate 1 cut-off current
VG1-S = 9 V; VG2-S = 0; ID = 0
−
20
nA
IG2-SS
gate 2 cut-off current
VG1-S = VDS = 0; VG2-S = 9 V
−
20
nA
DYNAMIC CHARACTERISTICS
Common source; Tamb = 25 °C; VG2-S = 4 V; VDS = 9 V; self-biasing current; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
yfs
forward transfer admittance
pulsed; Tj = 25 °C
24
30
Cig1-ss
input capacitance at gate 1
f = 1 MHz
−
Cig2-ss
input capacitance at gate 2
f = 1 MHz
−
Coss
output capacitance
f = 1 MHz
Crss
F
Gp
Xmod
MAX.
UNIT
−
mS
2.2
2.7
pF
1.5
−
pF
−
1.3
−
pF
reverse transfer capacitance f = 1 MHz
−
25
40
fF
noise figure
f = 800 MHz; YS = YS opt
−
1.5
2.5
dB
power gain
GS = 2 mS; BS = BS opt; GL = 0.5 mS;
BL = BL opt; f = 200 MHz; see Fig.16
−
38
−
dB
GS = 3.3 mS; BS = BS opt; GL = 1 mS;
BL = BL opt; f = 800 MHz; see Fig.17
−
20
−
dB
input level for k = 1% at 0 dB AGC;
fw = 50 MHz; funw = 60 MHz; see Fig.18
85
−
−
dBµV
input level for k = 1% at 40 dB AGC;
fw = 50 MHz; funw = 60 MHz; see Fig.18
100
−
−
dBµV
cross-modulation
1997 Dec 08
4
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
MDA613
25
MDA614
40
handbook, halfpage
handbook, halfpage
ID
(mA)
ID
(mA)
20
VG1 = 1.6 V
30
3.5 V
3V
VG2-S = 4 V
1.5 V
15
1.4 V
20
2.5 V
1.3 V
10
2V
1.2 V
10
1.1 V
5
1V
1.5 V
1V
0
0
2
0
4
6
8
0
10
VDS (V)
VG2-S = 4 V.
Tj = 25 °C.
0.5
1
1.5
2
2.5
VG1 (V)
VDS = 9 V.
Tj = 25 °C.
Fig.5 Output characteristics; typical values.
Fig.6 Transfer characteristics; typical values.
MDA615
MDA616
16
40
handbook, halfpage
handbook, halfpage
yfs
(mS)
ID
(mA)
VG2-S = 4 V
3.5 V
30
12
(1) (2) (3)
3V
8
20
(4)
4
10
2.5 V
2V
0
0
0
10
20
ID (mA)
0
30
(1) VDS = 9 V.
(2) VDS = 7 V.
VDS = 9 V.
Tj = 25 °C.
Fig.7
Forward transfer admittance as a function
of drain current; typical values.
1997 Dec 08
Fig.8
5
1
2
3
4
5
VG2-S (V)
(3) VDS = 5 V.
(4) VDS = 3 V.
Drain current as a function of gate 2
voltage; typical values.
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
MDA618
MDA617
16
16
handbook, halfpage
handbook, halfpage
ID
(mA)
ID
(mA)
12
12
8
8
4
4
0
0
0
2
4
6
8
10
VDS (V)
VG2-S = 4 V.
Tj = 25 °C.
Fig.9
−4
−2
IG1 (µA)
0
Fig.10 Drain current as a function of gate 1 current;
typical values.
MDA619
120
handbook, halfpage
Vunw
(dBµV)
110
100
90
80
20
40
60
gain reduction (dB)
VDS = 9 V; VG2nom = 4 V; IDnom = 12 mA; fw = 50 MHz;
funw = 60 MHz; Tamb = 25 °C.
Fig.11 Unwanted voltage for 1% cross-modulation
as a function of gain reduction;
typical values (see Fig.18).
1997 Dec 08
−6
VDS = 9 V; VG2-S = 4 V; Tj = 25 °C.
Drain current as a function of drain-source
voltage; typical values.
0
−8
6
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
MDA620
102
handbook, halfpage
MDA621
103
handbook, halfpage
yis
(mS)
−103
ϕrs
(deg)
|yrs|
(mS)
10
|yrs|
102
−102
bis
1
ϕrs
10−1
10−2
10
gis
102
−10
10
f (MHz)
1
10
103
−1
103
102
f (MHz)
VDS = 9 V; VG2-S = 4 V.
ID = 12 mA; Tamb = 25 °C.
VDS = 9 V; VG2-S = 4 V.
ID = 12 mA; Tamb = 25 °C.
Fig.12 Input admittance as a function of frequency;
typical values.
Fig.13 Reverse transfer admittance and phase as
a function of frequency; typical values.
MDA622
102
handbook, halfpage
|yfs|
(mS)
MDA623
−102
10
handbook, halfpage
ϕfs
(deg)
|yfs|
yos
(mS)
bos
1
−10
ϕfs
10
10−1
gos
1
10
102
f (MHz)
−1
103
10−2
10
VDS = 9 V; VG2-S = 4 V.
ID = 12 mA; Tamb = 25 °C.
f (MHz)
103
VDS = 9 V; VG2-S = 4 V.
ID = 12 mA; Tamb = 25 °C.
Fig.14 Forward transfer admittance and phase as
a function of frequency; typical values.
1997 Dec 08
102
Fig.15 Output admittance as a function of
frequency; typical values.
7
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
VAGC
handbook, full pagewidth
VDS
1 nF
2 µH
1 nF
1 nF
1 nF
47 kΩ
1 nF
L2
G2
D
BF1109
BF1109R
BF1109WR
5.5 pF
input
50 Ω
G1
C1
L1
output
50 Ω
S
15
pF
10 pF
BB405
330 kΩ
1 nF
BB405
1 nF
330 kΩ
1 nF
Vtun input
Vtun output
MDA624
VDS = 9 V, GS = 2 mS, GL = 0.5 mS, f = 200 MHz.
L1 = 45 nH, 4 turns, internal diameter = 4 mm, 0.8 mm copper wire.
L2 = 160 nH, 3 turns, internal diameter = 8 mm, 0.8 mm copper wire; tapped at approximately half a turn from the cold side, to set GL = 0.5 mS.
C1 adjusted for GS = 2 mS.
Fig.16 Gain test circuit.
VAGC
handbook, full pagewidth
VDS
1 nF
1 nF
47 kΩ
,,,
1 nF
input
50 Ω
1 nF
L1
2 to 18 pF
G2
G1
,,,,
,,,,
L3
L2
D
BF1109
BF1109R
BF1109WR
0.5 to 3.5 pF
S
0.5 to 3.5 pF
VDS = 9 V, GS = 3.3 mS, GL = 1 mS, f = 800 MHz.
L1 = 2 cm, silvered 0.8 mm copper wire 4 mm above ground plane.
L2 = 2 cm, silvered 0.8 mm copper wire 4 mm above ground plane.
L3 = 11 turns 0.5 mm copper wire without spacing, internal diameter = 3 mm, L = approx. 200 nH.
Fig.17 Gain test circuit.
1997 Dec 08
8
1 nF
output
50 Ω
4 to 40 pF
MDA625
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
VG2
handbook, full pagewidth
VDS
4.7 nF
10 kΩ
4.7 nF
10 nF
Rgen
50 Ω
47 µH
G2
D
BF1109
BF1109R
G1 BF1109WR
S
10 nF
R1 =
50 Ω
50 Ω
MDA626
Vi
Fig.18 Cross-modulation test set-up.
Table 1
f
(MHz)
Scattering parameters: VDS = 9 V; VG2-S = 4 V; ID = 12 mA
S21
S11
MAGNITUDE
(ratio)
ANGLE
(deg)
S12
S22
MAGNITUDE
(ratio)
ANGLE
(deg)
MAGNITUDE
(ratio)
ANGLE
(deg)
MAGNITUDE
(ratio)
ANGLE
(deg)
50
0.995
−3.71
3.013
175.0
0.000
88.2
0.998
−1.8
100
0.992
−7.29
3.002
170.2
0.001
83.7
0.997
−3.5
200
0.984
−14.3
2.967
160.7
0.002
86.2
0.995
−7.0
300
0.973
−21.2
2.922
151.3
0.002
83.2
0.992
−10.5
400
0.961
−27.9
2.869
142.0
0.003
84.1
0.990
−13.9
500
0.944
−34.4
2.793
132.9
0.003
85.7
0.987
−17.2
600
0.926
−40.8
2.730
124.1
0.003
88.4
0.985
−20.5
700
0.906
−46.9
2.660
1115.3
0.003
94.6
0.983
−23.7
800
0.887
−52.9
2.605
106.5
0.004
107.2
0.981
−26.8
900
0.868
−58.8
2.527
97.8
0.004
114.9
0.977
−30.0
1000
0.852
−64.3
2.457
89.6
0.004
129.7
0.9377
−33.1
Table 2
Noise data: VDS = 9 V; VG2-S = 4 V; ID = 12 mA
Γopt
f
(MHz)
Fmin
(dB)
(ratio)
(deg)
Rn
(Ω)
800
1.5
0.684
40.94
40.4
1997 Dec 08
9
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
PACKAGE OUTLINES
Plastic surface mounted package; 4 leads
SOT143B
D
B
E
A
X
y
HE
v M A
e
bp
w M B
4
3
Q
A
A1
c
1
2
Lp
b1
e1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.1
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
1.9
1.7
2.5
2.1
0.45
0.15
0.55
0.45
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-02-28
SOT143B
1997 Dec 08
EUROPEAN
PROJECTION
10
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
Plastic surface mounted package; reverse pinning; 4 leads
D
SOT143R
B
E
A
X
y
HE
v M A
e
bp
w M B
3
4
Q
A
A1
c
2
1
Lp
b1
e1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.1
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
1.9
1.7
2.5
2.1
0.55
0.25
0.45
0.25
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-03-10
SOT143R
1997 Dec 08
EUROPEAN
PROJECTION
11
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
Plastic surface mounted package; reverse pinning; 4 leads
D
SOT343R
E
B
A
X
HE
y
v M A
e
3
4
Q
A
A1
c
2
w M B
1
bp
Lp
b1
e1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.4
0.3
0.7
0.5
0.25
0.10
2.2
1.8
1.35
1.15
1.3
1.15
2.2
2.0
0.45
0.15
0.23
0.13
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-05-21
SOT343R
1997 Dec 08
EUROPEAN
PROJECTION
12
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
DEFINITIONS
Data Sheet Status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Dec 08
13
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
NOTES
1997 Dec 08
14
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
NOTES
1997 Dec 08
15
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Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1997
SCA55
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
117067/00/02/pp16
Date of release: 1997 Dec 08
Document order number:
9397 750 02954
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