April 1987 DM54ALS390/DM74ALS390 Dual 4-Bit Decade Counters General Description Features Each of these monolithic counters contains eight masterslave flip-flops and additional gating to implement two independent four bit counters in a single package. To use their maximum count length, the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained by connecting the QD output to the A input and applying the input count to the B input. Y Connection Diagram Function Tables Y Y Y Y Switching specifications at 50 pF Switching specifications guaranteed over full temperature and VCC range Advanced oxide-isolated, ion-implanted Schottky TTL process Individual clocks for A and B flip-flops provide dual divide-by-2 and divide-by-5 counters Direct clear for each 4-bit counter BCD Count Sequence (See Note 2) Output Count TL/F/9169 – 1 Order Number DM54ALS390J, DM74ALS390M or DM74ALS390N See NS Package Number J16A, M16A or N16A QD QC QB 0 L L L QA L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H QB Bi-Quinary (5-2) (See Note 3) Output Count QA QD QC 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 H L L L 6 H L L H 7 H L H L 8 H L H H 9 H H L L Note 2: Output QA is connected to input B for BCD count Note 3: Output QD is connected to input A for bi-quinary count H e High Logic Level, L e Low Logic Level This document contains information on a product under development. NSC reserves the right to change or discontinue this product without notice. C1995 National Semiconductor Corporation TL/F/9169 RRD-B30M105/Printed in U. S. A. DM54ALS390/DM74ALS390 Dual 4-Bit Decade Counters PRELIMINARY Absolute Maximum Rating Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55§ C to a 125§ C DM54ALS DM74ALS 0§ C to a 70§ C Storage Temperature Range b 65§ C to a 150§ C Recommended Operating Conditions Symbol VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage IOH High Level Output Current IOL Low Level Output Current fCOUNT Count Frequency tW DM54ALS390 Parameter Pulse Width DM74ALS390 Units Min Nom Max Min Nom Max 4.5 5 5.5 4.5 5 5.5 2 2 V V 0.7 0.8 V b 0.4 b 0.4 mA 8 mA 4 A Input 0 0 B Input 0 0 MHz A Input High A Input Low ns B Input High Clear High tSU Clear Inactive-State Setup Time TA Free Air Operating Temperature ns b 55 125 0 70 §C Electrical Characteristics over recommended free air temperature range Symbol VIC Parameter Test Conditions Input Clamp Voltage VCC e Min, II e b18 mA VOH High Level Output Voltage VCC e 4.5V to 5.5V, IOH e b0.4 mA VOL Low Level Output Voltage VCC e Min II IIH IIL Input Current at Max, VI e 7V Input Voltage VCC e Max, VI e 7V High Level Input Current VCC e Max, VI e 2.7V Low Level Input Current VCC e Max, VI e 0.4V IO Output Drive Current (B Bus Ports Only) VCC e Max, VO e 2.25V ICC Supply Current VCC e Max (Note 1) 2 Min Typ Max Units b 1.5 V VCC b 2 V 54/74ALS IOL e 4 mA 0.25 74ALS IOL e 8 mA 0.35 0.4 V 0.5 Clear 100 Input A 200 Input B 300 Clear 20 Input A 40 Input B 60 Clear b 100 Input A b 200 Input B b 300 b 30 b 112 mA mA mA mA mA Switching Characteristics over recommended operating free air temperature range Symbol fmax Parameter Maximum Clock Frequency tPLH Propagation Delay Time Low to High Level Output tPHL Conditions From (Input) To (Output) VCC e 4.5 to 5.5V, RL e 500,X CL e 50 pF TA e Min to Max (Note 2) DM54ALS390 DM74ALS390 Min Min Max Units Max A to QA MHz B to QB A to QA ns Propagation Delay Time High to Low Level Output A to QA ns tPLH Propagation Delay Time Low to High Level Output A to QC ns tPHL Propagation Delay Time High to Low Level Output A to QC ns tPLH Propagation Delay Time Low to High Level Output B to QB ns tPHL Propagation Delay Time High to Low Level Output B to QB ns tPLH Propagation Delay Time Low to High Level Output B to QC ns tPHL Propagation Delay Time High to Low Level Output B to QC ns tPLH Propagation Delay Time Low to High Level Output B to QD ns tPHL Propagation Delay Time High to Low Level Output B to QD ns tPHL Propagation Delay Time High to Low Level Output Clear to Any Q ns Note 1: ICC is measured with all outputs open, both clear inputs grounded following momentary connection to 4.5V and all other inputs grounded. Note 2: See Section 5 for test waveforms and output load. 3 Logic Diagram TL/F/9169 – 2 4 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number DM54ALS390J NS Package Number J16A S.O. Package (M) Order Number DM74ALS390M NS Package Number M16A 5 DM54ALS390/DM74ALS390 Dual 4-Bit Decade Counters Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number DM74ALS390N NS Package Number N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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