19-4322; Rev 0; 10/08 RS-485 Transceivers with Low-Voltage Logic Interface Applications Industrial Control Systems Portable Industrial Equipment Features ♦ Wide +3V to +5V Input Supply Range ♦ Low-Voltage Logic Interface +1.62V (min) ♦ Ultra-Low Supply Current in Shutdown Mode 10µA ICC (max), 1µA IL (max) ♦ Thermal Shutdown Protection ♦ Hot-Swap Input Structures on DE and RE ♦ 1/8-Unit Load Allows Up to 256 Transceivers on the Bus ♦ Enhanced Slew-Rate Limiting (MAX13430E/MAX13432E) ♦ Extended ESD Protection for RS-485 I/O Pins ±30kV Human Body Model ±15kV Air-Gap Discharge per IEC 61000-4-2 ±10kV Contact Discharge per IEC 61000-4-2 ♦ Extended -40°C to +85°C Operating Temperature Range ♦ Space-Saving TDFN and µMAX Packages Pin Configurations and Functional Diagrams appear at end of data sheet. Motor Control HVAC Ordering Information/Selector Guide PART PIN-PACKAGE FULL/HALF DUPLEX DATA RATE SLEW RATE (Mbps) LIMITED TRANSCEIVERS ON BUS TOP MARK PACKAGE CODE MAX13430EETB+ 10 TDFN-EP* (3mm x 3mm) Half 0.5 Yes 256 AUS T1033-1 MAX13430EEUB+** 10 µMAX (3mm x 3mm) Half 0.5 Yes 256 — U10-2 MAX13431EETB+ 10 TDFN-EP* (3mm x 3mm) Half 16 No 256 AUT T1033-1 MAX13431EEUB+** 10 µMAX (3mm x 3mm) Half 16 No 256 — U10-2 MAX13432EESD+ 14 SO Full 0.5 Yes 256 — S14-1 MAX13432EETD+** 14 TDFN-EP* (3mm x 3mm) Full 0.5 Yes 256 AEG T1433-2 MAX13433EESD+ 14 SO Full 16 No 256 — S14-1 MAX13433EETD+** 14 TDFN-EP** (3mm x 3mm) Full 16 No 256 AEH T1433-2 Note: All devices are specified over the extended -40°C to +85°C operating temperature range. +Denotes a lead-free/RoHS-compliant package. *EP = Exposed pad. **Future product—contact factory for availability. µMAX is a registered trademark of Maxim Integrated Products, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX13430E–MAX13433E General Description The MAX13430E–MAX13433E are full- and half-duplex RS-485 transceivers that feature an adjustable low-voltage logic interface for operation in multivoltage systems. This allows direct interfacing to low-voltage ASIC/FPGAs without extra components. The MAX13430E–MAX13433E RS-485 transceivers operate with a VCC voltage supply from +3V to +5V. The low-voltage logic interface operates with a voltage supply from +1.62V to VCC. The MAX13430E/MAX13432E feature reduced slewrate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 500kbps. The MAX13431E/MAX13433E driver slew rates are not limited, enabling data transmission up to 16Mbps. The MAX13430E/MAX13431E are intended for half-duplex communications, and the MAX13432E/MAX13433E are intended for full-duplex communications. The MAX13430E/MAX13431E are available in 10-pin µMAX® and 10-pin TDFN packages. The MAX13432E/ MAX13433E are available in 14-pin TDFN and 14-pin SO packages. MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) Supply Voltage (VCC) ...............................................-0.3V to +6V Logic Supply Voltage (VL ) ......................................-0.3V to +6V Control Input Voltage (RE) .............................-0.3V to (VL+0.3V) Control Input Voltage (DE) ......................................-0.3V to +6V Driver Input Voltage (DI) ..........................................-0.3V to +6V Driver Output Voltage (Y, Z, A, B) ............................-8V to +13V Receiver Input Voltage (A, B) (MAX13430E/MAX13431E)....................................-8V to +13V Receiver Input Voltage (A, B) (MAX13432E/MAX13433E)..................................-25V to +25V Receiver Output Voltage (RO) .....................-0.3V to (VL + 0.3V) Driver Output Current ....................................................±250mA Short-Circuit Duration (RO, A, B) to GND .................Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 8.8mW/°C above +70°C) ..........707mW 10-Pin TDFN (derate 24.4mW/°C above +70°C) ......1951mW 14-Pin TDFN (derate 24.4mW/°C above +70°C) ......1951mW 14-Pin SO (derate 11.9mW/°C above +70°C) .............952mW Junction-to-Ambient Thermal Resistance (ΘJA) (Note 1) 10-Pin µMAX ...........................................................113.1°C/W 10-Pin TDFN .................................................................41°C/W 14-Pin TDFN ................................................................41°C/W 14-Pin SO ....................................................................84°C/W Junction-to-Ambient Thermal Resistance (ΘJC) (Note 1) 10-Pin µMAX ................................................................42°C/W 10-Pin TDFN ...................................................................9°C/W 14-Pin TDFN ..................................................................8°C/W 14-Pin SO ....................................................................34°C/W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ..................................................... +150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to http://www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +3V to +5.5V, VL = +1.8V to VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLY VCC Supply-Voltage Range VL Supply-Voltage Range ICC Supply Current ICC Supply Current in Shutdown Mode VL Supply Current VCC 3 5.5 V VL 1.62 VCC V ICC DE = RE = high, no load DE = RE = low, no load DE = high, RE = low, no load 2 mA ISHDN DE = low, RE = high, no load 10 µA RO = no load 1 µA IL DRIVER RL = 100Ω, VCC = +3V Differential Driver Output (Figure 1) VOD VCC RL = 54Ω, VCC = +3V 1.5 VCC RL = 100Ω, VCC = +4.5V 2.25 VCC RL = 54Ω, VCC = +4.5V 2.25 VCC Change in Magnitude of Differential Output Voltage ΔVOD RL = 100Ω or 54Ω, Figure 1 (Note 4) Driver Common-Mode Output Voltage VOC RL = 100Ω or 54Ω, Figure 1 Change in Magnitude of Common-Mode Voltage ΔVOC RL = 100Ω or 54Ω, Figure 1 (Note 4) 2 2 VCC/2 _______________________________________________________________________________________ V 0.2 V 3 V 0.2 V RS-485 Transceivers with Low-Voltage Logic Interface (VCC = +3V to +5.5V, VL = +1.8V to VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL Output Leakage Current (Y and Z) IOLK Driver Short-Circuit Output Current (Note 5) IOSD Driver Short-Circuit Output Foldback Current (Note 5) IOSDF CONDITIONS DE = GND, VCC = GND or +5.5V MIN TYP VIN = +12V VIN = -7V MAX 125 -100 0 ≤ VOUT ≤ +12V +250 -7V ≤ VOUT ≤ VCC -250 (VCC - 1V) ≤ VOUT ≤ +12V 15 -7V ≤ VOUT ≤ +1V -15 UNITS µA mA mA Thermal Shutdown Threshold TTS +150 °C Thermal Shutdown Hysteresis TTSH 15 °C RECEIVER Input Current (A and B) IA, B DE = GND, VCC = GND or +5.5V Receiver Differential Threshold Voltage VTH -7V ≤ VCM ≤ +12V Receiver Input Hysteresis ΔVTH VCM = 0 Receiver Input Resistance RIN VCM = +12V VCM = -7V -7V ≤ VCM ≤ +12V 125 -100 -200 -50 15 µA mV mV 96 kΩ 2/3 x VL V LOGIC INTERFACE Input High Logic Level (DI, DE, RE) VIH Input Low Logic Level (DI, DE, RE) VIL Input Current (DI, DE, RE) IIN Input Impedance on First Transition RDE, RE VDI = VDE = VRE = VL = +5.5V 1 Output High Logic Level (RO) VOH IO = -1mA, VA - VB = VTH Output Low Logic Level (RO) VOL IO = 1mA, VA - VB = -VTH Receiver Three-State Output Current (RO) IOZR 0 ≤ VRO ≤ VL -1 Receiver Output Short-Circuit Current (RO) IOSR 0 ≤ VRO ≤ VL -110 1/3 x VL V ±1 µA 10 kΩ VL - 0.4 V 0.01 0.4 V +1 µA +110 mA ESD PROTECTION A, B, Y, Z to GND All Other Pins (Except A, B, Y, and Z) IEC 61000-4-2 Air Gap Discharge ±15 IEC 61000-4-2 Contact Discharge ±10 Human Body Model ±30 Human Body Model ±2 kV kV _______________________________________________________________________________________ 3 MAX13430E–MAX13433E DC ELECTRICAL CHARACTERISTICS (continued) MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface SWITCHING CHARACTERISTICS (MAX13431E/MAX13433E (16 Mbps)) (VCC = +3V to +5.5V, VL = +1.8V to VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DRIVER Driver Propagation Delay (Figures 2 and 3) Driver Differential Output Rise or Fall Time Differential Driver Output Skew |tDPLH - tDPHL| tDPLH tDPHL 50 CL = 50pF, RDIFF = 54Ω 50 ns tR, tF CL = 50pF, RL = 54Ω, Figures 2 and 3 15 ns tDSKEW CL = 50pF, RL = 54Ω, Figures 2 and 3 8 ns Maximum Data Rate 16 Mbps Driver Enable to Output High tDZH CL = 50pF, RL = 500Ω, Figure 4 150 ns Driver Enable to Output Low tDZL CL = 50pF, RL = 500Ω, Figure 5 150 ns Driver Disable Time from Low tDLZ CL = 50pF, RL = 500Ω, Figure 4 100 ns Driver Disable Time from High tDHZ CL = 50pF, RL = 500Ω, Figure 5 120 ns Driver Enable from Shutdown to Output High tDZH(SHDN) CL = 50pF, RL = 500Ω, Figure 4 5 µs Driver Enable from Shutdown to Output Low tDZL(SHDN) CL = 50pF, RL = 500Ω, Figure 5 5 µs RECEIVER Receiver Propagation Delay (Figures 6 and 7) Receiver Output Skew tRPLH tRPHL tRSKEW 80 CL = 15pF 80 CL = 15pF, Figures 6 and 7 Maximum Data Rate 13 16 ns ns Mbps Receiver Enable to Output Low tRZL Figure 8 50 ns Receiver Enable to Output High tRZH Figure 8 50 ns Receiver Disable Time from Low tRLZ Figure 8 50 ns Receiver Disable Time from High tRHZ Figure 8 50 ns Receiver Enable from Shutdown to Output High tRZH(SHDN) Figure 8 5 µs Receiver Enable from Shutdown to Output Low tRZL(SHDN) Figure 8 5 µs 700 ns DRIVER/RECEIVER Time to Shutdown 4 tSHDN 50 340 _______________________________________________________________________________________ RS-485 Transceivers with Low-Voltage Logic Interface (VCC = +3V to +5.5V, VL = +1.8V to VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DRIVER Driver Propagation Delay (Figures 2 and 3) Driver Differential Output Rise or Fall Time Differential Driver Output Skew |tDPLH - tDPHL| tDPLH tDPHL CL = 50pF, RL = 54Ω tR, tF CL = 50pF, RL = 54Ω, Figures 2 and 3 tDSKEW CL = 50pF, RL = 54Ω, Figures 2 and 3 Maximum Data Rate 180 800 180 800 200 800 ns 100 ns 500 ns kbps Driver Enable to Output High tDZH CL = 50pF, RL = 500Ω, Figure 4 2.5 µs Driver Enable to Output Low tDZL CL = 50pF, RL = 500Ω, Figure 5 2.5 µs Driver Disable Time from Low tDLZ CL = 50pF, RL = 500Ω, Figure 4 100 ns Driver Disable Time from High tDHZ CL = 50pF, RL = 500Ω, Figure 5 120 ns Driver Enable from Shutdown to Output High tDZH(SHDN) CL = 50pF, RL = 500Ω, Figure 4 5 µs Driver Enable from Shutdown to Output Low tDZL(SHDN) CL = 50pF, RL = 500Ω, Figure 5 5 µs RECEIVER Receiver Propagation Delay (Figures 6 and 7) Receiver Output Skew tRPLH tRPHL tRSKEW 200 CL = 15pF 200 CL = 15pF, Figures 6 and 7 Maximum Data Rate 30 500 ns ns kbps Receiver Enable to Output Low tRZL Figure 8 50 ns Receiver Enable to Output High tRZH Figure 8 50 ns Receiver Disable Time from Low tRLZ Figure 8 50 ns Receiver Disable Time from High tRHZ Figure 8 50 ns Receiver Enable from Shutdown to Output High tRZH(SHDN) Figure 8 5 µs Receiver Enable from Shutdown to Output Low tRZL(SHDN) Figure 8 5 µs _______________________________________________________________________________________ 5 MAX13430E–MAX13433E DRIVER SWITCHING CHARACTERISTICS (MAX13430E/MAX13432E (500 kbps)) RS-485 Transceivers with Low-Voltage Logic Interface MAX13430E–MAX13433E DRIVER SWITCHING CHARACTERISTICS (MAX13430E/MAX13432E (500 kbps)) (continued) (VCC = +3V to +5.5V, VL = +1.8V to VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL = +1.8V at TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 50 340 700 ns DRIVER/RECEIVER Time to Shutdown tSHDN Note 2: Parameters are 100% production tested at TA = +25°C, unless otherwise noted. Limits over temperature are guaranteed by design. Note 3: All currents into the device are positive. All currents out of the device are negative. All voltages are referenced to device ground, unless otherwise noted. Note 4: ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when the DI input changes state. Note 5: The short-circuit output current is the peak current just prior to current limiting; the short-circuit foldback output current applies during current limiting to allow a recovery from bus contention. Typical Operating Characteriststics (VCC = +5V, VL = +5V, TA = +25°C, unless otherwise noted.) VL = 5V RDIFF = 54Ω DI = RE =LOW DE = LOW, MAX13432E 0 30 3 VL = 1.8V 20 10 1 10 35 60 85 6.0 2.0 IO = 1mA 5.5 1.9 VL = 5V 5.0 1.8 VL = 1.8V 4.5 1.7 4.0 1.6 -40 -15 10 35 TEMPERATURE (°C) 60 85 2 3 4 6 VL = 1.8V VL = 5V 40 2 0 0 5 1 2 3 4 OUTPUT-LOW VOLTAGE, VOL (V) RECEIVER OUTPUT-LOW VOLTAGE vs. TEMPERATURE DIFFERENTIAL OUTPUT CURRENT vs. DIFFERENTIAL OUTPUT VOLTAGE IO = 1mA 0.4 0.3 0.2 VL = 1.8V VL = 5V 4 20 OUTPUT-HIGH VOLTAGE, VOH (V) 0.5 OUTPUT-LOW VOLTAGE, VOL (V) MAX13430E-3E toc04 OUTPUT-LOW VOLTAGE FOR VL = 1.8V, VOH (V) RECEIVER OUTPUT-HIGH VOLTAGE vs. TEMPERATURE 1 60 0 0 0 MAX13430E-3E toc05 -15 TEMPERATURE (°C) OUTPUT-HIGH VOLTAGE FOR VL = 5V, VOH (V) 2 0 -40 6 4 VL = 5V 5 140 VL = 5V 120 100 80 60 40 0.1 20 0 0 -40 -15 10 35 TEMPERATURE (°C) 60 85 8 MAX13430E-3E toc06 1 40 OUTPUT CURRENT FOR VL = 5V (mA) DE = LOW, MAX13433E 5 OUTPUT CURRENT (mA) 10 50 MAX13430E-3E toc03 80 6 OUTPUT CURRENT FOR VL = 1.8V (mA) OUTPUT CURRENT FOR VL = 5V (mA) DE = HIGH, MAX13432E DE = HIGH, MAX13433E MAX13430E-3E toc02 60 MAX13430E-3E toc01 VCC SUPPLY CURRENT (mA) 100 OUTPUT CURRENT vs. RECEIVER OUTPUT-LOW VOLTAGE 0 1 2 3 OUTPUT VOLTAGE (V) _______________________________________________________________________________________ 4 5 OUTPUT CURRENT FOR VL = 1.8V (mA) OUTPUT CURRENT vs. RECEIVER OUTPUT-HIGH VOLTAGE VCC SUPPLY CURRENT vs. TEMPERATURE RS-485 Transceivers with Low-Voltage Logic Interface 2.5 2.0 1.5 VL = 5V 120 1.0 0 -15 10 35 60 85 100 80 60 40 20 0 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 0 2 4 6 8 10 12 OUTPUT-HIGH VOLTAGE (V) OUTPUT-LOW VOLTAGE (V) SHUTDOWN CURRENT vs. TEMPERATURE DRIVER PROPAGATION vs. TEMPERATURE (MAX13432E) DRIVER PROPAGATION vs. TEMPERATURE (MAX13433E) 7 6 5 4 ICC 3 2 500 tRLPH 400 tRLPL 300 200 100 0 0 -40 -15 10 35 60 85 -40 -15 10 35 60 TEMPERATURE (°C) RECEIVER PROPAGATION vs. TEMPERATURE MAX13432E DRIVER PROPAGATION DELAY (500kbps) MAX13430E-3E toc13 VL = 1.8V tRPHL tRPLH 45 60 50 40 30 tRPHL 20 tRPLH 0 TEMPERATURE (°C) 60 VL = 5V 70 10 IL 1 80 MAX13430E-3E toc12 VL = 5V DRIVER PROPAGATION DELAY (ns) 8 600 MAX13430E-3E toc11 VL = 5V DRIVER PROPAGATION DELAY (ns) MAX13430E-3E toc10 SHUTDOWN CURRENT (μA) 40 120 TEMPERATURE (°C) 10 RECEIVER PROPAGATION DELAY (ns) 60 0 -40 9 80 VL = 5V 140 20 RDIFF = 54Ω VL = 5V 0.5 100 160 MAX13430E-3E toc09 3.0 MAX13430E-3E toc08 3.5 OUTPUT CURRENT vs. TRANSMITTER OUTPUT-LOW VOLTAGE 140 OUTPUT CURRENT (mA) MAX13430E-3E toc07 DIFFERENTIAL OUTPUT VOLTAGE, VOD (V) 4.0 OUTPUT CURRENT vs. TRANSMITTER OUTPUT-HIGH VOLTAGE OUTPUT CURRENT (mA) DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs. TEMPERATURE MAX13430E–MAX13433E Typical Operating Characteristics (continued) (VCC = +5V, VL = +5V, TA = +25°C, unless otherwise noted.) 85 -40 -15 10 35 60 85 TEMPERATURE (°C) MAX13433E DRIVER PROPAGATION DELAY (20Mbps) MAX13430E-3E toc14 MAX13430E-3E toc15 VL = 5V RL = 54Ω VL = 5V RL = 54Ω DI 2V/div 30 VZ 2V/div VY 2V/div 15 0 -40 -15 10 35 60 85 10ns/div 10ns/div TEMPERATURE (°C) _______________________________________________________________________________________ 7 MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface Test Circuits and Waveforms VL Y DE RL/2 Y VOD DI VOC RL/2 VOD D Z Z Figure 2. Driver Timing Test Circuit Figure 1. Driver DC Test Load VL DI VL/2 0 tDPHL tDPLH 1/2 VO Z VO Y 1/2 VO VO VDIFF 0 -VO VDIFF = V (Y) - V (Z) 10% 90% 90% 10% tF tR tSKEW = | tDPLH - tDPHL | Figure 3. Driver Propagation Delays 8 _______________________________________________________________________________________ RL CL RS-485 Transceivers with Low-Voltage Logic Interface Y S1 D 0 OR VL OUT Z GENERATOR RL = 500Ω CL 50pF DE 50Ω VL DE VL/2 tDZH, tDZH(SHDN) 0 0.25V OUT VOH VOM = (0 + VOH)/2 0 tDHZ Figure 4. Driver Enable and Disable Times (tDHZ, tDZH, and tDZHZ(SHDN)) VCC Y 0 OR VL D OUT Z DE GENERATOR RL = 500Ω S1 CL 50pF 50Ω VL DE VL/2 tDZL, tDZL(SHDN) 0 tDLZ VCC VOM = (VOL + VCC)/2 OUT VOL 0.25V Figure 5. Driver Enable and Disable Times (tDZL, tDLZ, and tDLZ(SHDN)) _______________________________________________________________________________________ 9 MAX13430E–MAX13433E Test Circuits and Waveforms (continued) MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface Test Circuits and Waveforms (continued) B VID ATE R RECEIVER OUTPUT A +1V B -1V tRPLH VOH A VOL RO tRPHL VL/2 THE RISE TIME AND FALL TIME OF INPUTS A AND B < 4ns Figure 6. Receiver Propagation Delay Test Circuit Figure 7. Receiver Propagation Delays S1 +1.5V S3 -1.5V RO RR VID RE GENERATOR VL 1kΩ CL 15pF S2 50Ω S1 OPEN S2 CLOSED S3 = +1.5V S1 CLOSED S2 OPEN S3 = -1.5V VL VL VL/2 RE RE 0 0 tRZH, tRZH(SHDN) tRZL, tRZL(SHDN) VOH RO VL VOH/2 (VOL + VL)/2 RO 0 S1 OPEN S2 CLOSED S3 = +1.5V VOL S1 CLOSED S2 OPEN S3 = -1.5V VL VL/2 VL/2 RE tRHZ VL 0 RE 0 tRLZ VL VOH 0.25V RO 0 RO 0.25V Figure 8. Receiver Enable and Disable Times 10 ______________________________________________________________________________________ VOL RS-485 Transceivers with Low-Voltage Logic Interface PIN MAX13430E/MAX13431E NAME FUNCTION µMAX TDFN-EP 1 1 VL VL Input Logic-Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as close as possible to the input. 2 2 RO Receiver Output. When RE is low and if (A - B) ≥ -50mV, RO is high; if (A - B) ≤ -200mV, RO is low. 3 3 DE Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high impedance when DE is low. Drive RE high and DE low to enter low-power shutdown mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.) 4 4 RE Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a hot-swap input (see the Hot-Swap Capability section for details.) 5 5 DI Driver Input. With DE high, a low on DI forces noninverting output low and inverting output high. Similarly, a high on DI forces noninverting output high and inverting output low. 6 6 GND 7 7 N.C. 8 8 A 9 9 B 10 10 VCC — EP EP Ground No Connection. Not internally connected. N.C. can be connected to GND. Noninverting Receiver Input and Noninverting Driver Output Inverting Receiver Input and Inverting Driver Output VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close as possible to the input for full ESD protection. If full ESD protection is not required, bypass VCC with a 0.1µF ceramic capacitor. Exposed Pad. Connect EP to GND (TDFN-EP only). ______________________________________________________________________________________ 11 MAX13430E–MAX13433E Pin Description MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface Pin Description (continued) PIN MAX13432E/MAX13433E 12 NAME FUNCTION SO TDFN-EP 1 1 VL VL Input Logic Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as close as possible to the input. 2 2 RO Receiver Output. When RE is low and if (A - B) ≥ -50mV, RO is high; if (A - B) ≤ -200mV, RO is low. 3 3 DE Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high impedance when DE is low. Drive RE high and DE low to enter low-power shutdown mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.) 4 4 RE Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a hot-swap input (see the Hot-Swap Capability section for details.) 5 5 DI Driver Input. With DE high, a low on DI forces noninverting output low and inverting output high. Similarly, a high on DI forces noninverting output high and inverting output low. 6 6 GND 7, 13 7, 13 N.C. Ground No Connection. Not internally connected. N.C. can be connected to GND. 8 8 GND Ground 9 9 Y Noninverting Driver Output 10 10 Z Inverting Driver Output 11 11 B Inverting Receiver Input 12 12 A Noninverting Receiver Input 14 14 VCC — EP EP VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close as possible to the input for full ESD protection. If full ESD protection is not required, bypass VCC with a 0.1µF ceramic capacitor. Exposed Pad. Connect EP to GND (TDFN-EP only). ______________________________________________________________________________________ RS-485 Transceivers with Low-Voltage Logic Interface MAX13432E/MAX13433E (Half Duplex) MAX13430E/MAX13431E (Full Duplex) TRANSMITTING TRANSMITTING INPUTS OUTPUTS INPUTS OUTPUTS RE DE DI Z Y RE DE DI B A X 1 1 0 1 X 1 1 0 1 X 1 0 1 0 X 1 0 1 0 0 0 X HighImpedance HighImpedance 1 0 X HighImpedance HighImpedance 1 0 X 0 0 X Shutdown RECEIVING Shutdown* RECEIVING INPUTS OUTPUT INPUTS OUTPUT RE DE A-B RO RE DE A-B RO 0 X ≥ -50mV 1 0 X ≥ -50mV 1 0 X ≤ -200mV 0 0 X ≤ -200mV 0 0 X Open/ Shorted 1 0 X Open/ Shorted 1 1 1 X High-Impedance 1 1 X High-Impedance 1 0 X Shutdown 1 0 X Shutdown* X = Don’t care. *Shutdown mode, driver and receiver outputs are in high impedance. Functional Diagrams VCC VL VCC VL MAX13430E MAX13431E MAX13432E MAX13433E Z DI DI D DE B RE A RO R GND D Y DE RE RO R B A GND ______________________________________________________________________________________ 13 MAX13430E–MAX13433E Function Tables MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface Detailed Description The MAX13430E–MAX13433E are full- and half-duplex RS-485 transceivers that feature an adjustable lowvoltage logic interface for application in multivoltage systems. This allows direct interfacing to lowvoltage ASIC/FPGAs without extra components. The MAX13430E–MAX13433E RS-485 transceivers operate with a VCC voltage supply from +3V to +5V. The lowvoltage logic interface operates with a voltage supply from +1.62V to VCC. The MAX13430E–MAX13433E are ±30kV ESD-protected RS-485 transceivers with one driver and one receiver. All devices have a 1/8-unit load receiver input impedance, allowing up to 256 transceivers on the bus. These devices include fail-safe circuitry, guaranteeing a logic-high receiver output when receiver inputs are open or shorted. The receivers output a logic-high if all transmitters on a terminated bus are disabled (high impedance). All devices feature hot-swap capability to eliminate false transitions on the bus during power-up or hot insertion. The MAX13430E/MAX13432E feature reduced slewrate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 500kbps. The MAX13431E/MAX13433E driver slew rates are not limited, enabling data transmission up to 16Mbps. The MAX13430E–MAX13433E transceivers draw 2mA of supply current when unloaded or when fully loaded with the drivers disabled. The MAX13430E/ MAX13431E are intended for half-duplex communications, and the MAX13432E/MAX13433E are intended for full-duplex communications. Low-Voltage Logic Interface VL is the voltage supply for the low-voltage logic interface and receiver output. VL operates with voltage supply from +1.62V to VCC. Fail Safe The MAX13430E family guarantees a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all drivers disabled. This is done by setting the receiver input threshold between -50mV and -200mV. If the differential receiver input voltage (A - B) is greater than or equal to -50mV, RO is logic-high. If (A - B) is less than or equal to -200mV, RO is logiclow. In the case of a terminated bus with all transmitters disabled, the receiver’s differential input voltage is pulled to 0V by the termination. With the receiver thresholds of the MAX13430E family, this results in a logic-high with a 50mV minimum noise margin. The -50mV to -200mV threshold complies with the ±200mV EIA/TIA/RS-485 standard. Hot-Swap Capability When circuit boards are inserted into a hot or powered backplane, differential disturbances to the data bus can lead to data errors. Upon initial circuit-board insertion, the data communication processor undergoes its own power-up sequence. During this period, the processor’s logic-output drivers are high impedance and are unable to drive the DE and RE inputs of these devices to a defined logic level. Leakage currents up to ±10µA from the high-impedance state of the processor’s logic drivers could cause standard CMOS enable inputs of a transceiver to drift to an incorrect logic level. Additionally, parasitic circuit-board capacitance could cause coupling of VL or GND to the enable inputs. Without the hot-swap capability, these factors could improperly enable the transceiver’s driver or receiver. When VL rises, an internal pulldown circuit holds DE low and RE high. After the initial power-up sequence, the pulldown circuit becomes transparent, resetting the hot-swap tolerable input. ±30kV ESD Protection ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs of the MAX13430E family of devices have extra protection against static electricity. Maxim’s engineers have developed state-of-theart structures to protect these pins against ESD of ±30kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, the MAX13430E–MAX13433E keep working without latchup or damage. ESD protection can be tested in various ways. The transmitter outputs and receiver inputs of the MAX13430E–MAX13433E are characterized for protection to the following limits: • ±30kV using the Human Body Model • ±10kV using the Contact Discharge method specified in IEC 61000-4-2 • ±15kV using the Air Gap Discharge method specified in IEC 61000-4-2 14 ______________________________________________________________________________________ RS-485 Transceivers with Low-Voltage Logic Interface Human Body Model Figure 10a shows the Human Body Model, and Figure 10b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor. IEC 61000-4-2 The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. However, it does RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 100pF RD 1500Ω IP 100% 90% DISCHARGE RESISTANCE STORAGE CAPACITOR not specifically refer to integrated circuits. The MAX13430E family of devices helps you design equipment to meet IEC 61000-4-2, without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC 61000-4-2 is higher peak current in IEC 61000-4-2 because series resistance is lower in the IEC 61000-4-2 model. Hence, the ESD withstand voltage measured to IEC 61000-4-2 is generally lower than that measured using the Human Body Model. Figure 10c shows the IEC 61000-4-2 model, and Figure 10d shows the current waveform for IEC 610004-2 ESD Contact Discharge test. Ir AMPS DEVICE UNDER TEST 36.8% 10% 0 0 HIGHVOLTAGE DC SOURCE Cs 150pF I 100% 90% RD 330Ω DISCHARGE RESISTANCE STORAGE CAPACITOR tDL CURRENT WAVEFORM IPEAK CHARGE-CURRENTLIMIT RESISTOR TIME tRL Figure 10b. Human Body Current Waveform Figure 10a. Human Body ESD Test Model RC 50MΩ TO 100MΩ PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) DEVICE UNDER TEST 10% tr = 0.7ns TO 1ns t 30ns 60ns Figure 10c. IEC 61000-4-2 ESD Test Model Figure 10d. IEC 61000-4-2 ESD Generator Current Waveform ______________________________________________________________________________________ 15 MAX13430E–MAX13433E ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. MAX13430E–MAX13433E RS-485 Transceivers with Low-Voltage Logic Interface Applications Information 256 Transceivers on the Bus The standard RS-485 receiver input impedance is a one-unit load (12kΩ), and the standard driver can drive up to 32 unit loads. The MAX13430E family of transceivers has a 1/8-unit load receiver input impedance (96kΩ), allowing up to 256 transceivers to be connected in parallel on one communication line. Any combination of these devices, as well as other RS-485 transceivers with a total of 32-unit loads or less, can be connected to the line. Reduced EMI and Reflections The MAX13430E/MAX13432E feature reduced slewrate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 500kbps. 16 Driver Output Protection Two mechanisms prevent excessive output current and power dissipation caused by faults or by bus contention. The first, a foldback current limit on the output stage, provides immediate protection against short circuits over the whole common-mode voltage range (see the Typical Operating Characteristics.) The second, a thermal-shutdown circuit, forces the driver outputs into a high-impedance state if the die temperature exceeds +150°C (typ). Typical Applications The MAX13430E/MAX13433E transceivers are designed for bidirectional data communications on multipoint bus transmission lines. Figures 12 and 13 show typical network applications circuits. To minimize reflections, terminate the line at both ends with its characteristic impedance, and keep stub lengths off the main line as short as possible. The slew-rate-limited MAX13430E/MAX13432E allow the RS-485 network to be more tolerant of imperfect termination. ______________________________________________________________________________________ RS-485 Transceivers with Low-Voltage Logic Interface 120Ω 120Ω DE B B DI D D DI DE A RO B A B A A RO R R RE RE R R D D MAX13430E MAX13431E DE DI DI RO RE DE RO RE Figure 11. Typical Half-Duplex RS-485 Network A R RO RE DE Y 120Ω 120Ω DI Z Z DI D B D B 120Ω R Y DE RE RO A Y Z B A Y Z R D DI B A R D DE RE RO DI MAX13432E MAX13433E DE RE RO Figure 12. Typical Full-Duplex RS-485 Network ______________________________________________________________________________________ 17 MAX13430E–MAX13433E Typical Application Circuits RS-485 Transceivers with Low-Voltage Logic Interface MAX13430E–MAX13433E Pin Configurations TOP VIEW VCC B A N.C. GND VCC N.C. A B Z Y GND 10 9 8 7 6 14 13 12 11 10 9 8 MAX13430E MAX13431E MAX13432E MAX13434E *EP + 1 2 VL RO *EP + 3 4 5 1 2 3 DE RE DI VL RO DE TDFN VL 1 RO 2 DE 3 RE DI MAX13430E MAX13431E 6 7 RE DI GND N.C. * EXPOSED PAD CONNECT TO GND. 10 VCC 9 B 8 A 4 7 N.C. 5 6 GND µMAX 5 TDFN * EXPOSED PAD CONNECT TO GND. + 4 VL 1 RO 2 DE 3 RE + 14 VCC 13 N.C. 12 A 4 11 B DI 5 10 Z GND 6 9 Y N.C. 7 8 GND MAX13432E MAX13433E SO Chip Information PROCESS: BiCMOS 18 ______________________________________________________________________________________ RS-485 Transceivers with Low-Voltage Logic Interface PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 10 µMAX U10-2 21-0061 14 TDFN T1433-2 21-0137 10 TDFN T1033-1 21-0137 14 SO S14-1 21-0041 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX13430E–MAX13433E Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.