19-5035; Rev 1; 4/10 TION KIT EVALUA BLE IL AVA A Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers Features The MAX5391/MAX5393 dual 256-tap, volatile, lowvoltage linear taper digital potentiometers offer three end-to-end resistance values of 10kI, 50kI, and 100kI. Operating from a single +1.7V to +5.5V power supply, these devices provide a low 35ppm/NC end-to-end temperature coefficient. The devices feature an SPIK interface. S Dual 256-Tap Linear Taper Positions The small package size, low supply voltage, low supply current, and automotive temperature range of the MAX5391/MAX5393 make the devices uniquely suitable for the portable consumer market, battery backup industrial applications, and the automotive market. S Wiper Set to Midscale on Power-Up The MAX5391/MAX5393 include two digital potentiometers in a voltage-divider configuration. The MAX5391/ MAX5393 are specified over the -40NC to +125NC automotive temperature range and are available in a 16-pin, 3mm x 3mm TQFN and a 14-pin TSSOP package, respectively. Applications Low-Voltage Battery Applications Portable Electronics Mechanical Potentiometer Replacement Offset and Gain Control S Single +1.7V to +5.5V Supply Operation S Low 12µA Quiescent Supply Current S 10kI, 50kI, and 100kI End-to-End Resistance Values S SPI-Compatible Interface S -40NC to +125NC Operating Temperature Range Ordering Information PART PIN-PACKAGE END-TO-END RESISTANCE (kI) MAX5391LATE+ 16 TQFN-EP* MAX5391MATE+ 16 TQFN-EP* 10 50 MAX5391NATE+ 16 TQFN-EP* 100 10 MAX5393LAUD+ 14 TSSOP MAX5393MAUD+ 14 TSSOP 50 MAX5393NAUD+ 14 TSSOP 100 Note: All devices are specified in the -40NC to +125NC temperature range. +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Adjustable Voltage References/Linear Regulators Automotive Electronics Functional Diagram VDD WA HA BYP LA CHARGE PUMP CS SCLK DIN LATCH 256 DECODER POR MAX5391 MAX5393 LATCH 256 DECODER HB SPI WB LB GND SPI is a trademark of Motorola, Inc. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX5391/MAX5393 General Description MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers ABSOLUTE MAXIMUM RATINGS Continuous Power Dissipation (TA = +70NC) 14-Pin TSSOP (derate 10mW/NC above +70NC).......796.8mW 16-Pin TQFN (derate 14.7mW/NC above +70NC)....1176.5mW Operating Temperature Range . ...................... -40NC to +125NC Junction Temperature .....................................................+150NC Storage Temperature Range............................. -65NC to +150NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC VDD to GND ............................................................-0.3V to +6V H_, W_, L_ to GND.......................................-0.3V to the lower of (VDD + 0.3V) or +6V All Other Pins to GND..............................................-0.3V to +6V Continuous Current into H_, W_, and L_ MAX5391L/MAX5393L.................................................... Q5mA MAX5391M/MAX5393M.................................................. Q2mA MAX5391N/MAX5393N.................................................. Q1mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +1.7V to +5.5V, VH_ = VDD, VL_ = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +1.8V, TA = +25NC.) (Note 1) PARAMETER Resolution SYMBOL CONDITIONS N MIN TYP MAX 256 UNITS Tap DC PERFORMANCE (Voltage-Divider Mode) Integral Nonlinearity INL (Note 2) -0.5 +0.5 LSB Differential Nonlinearity DNL LSB (Note 2) -0.5 +0.5 Dual-Code Matching Register A = Register B -0.5 +0.5 Ratiometric Resistor Tempco (DVW/VW)/DT, no load MAX5391L/MAX5393L Full-Scale Error Code = FFh Zero-Scale Error Code = 00h 5 -3 -2.2 MAX5391M/MAX5393M -1 -0.6 MAX5391N/MAX5393N -0.5 -0.3 LSB ppm/NC LSB MAX5391L/MAX5393L 2.2 3 MAX5391M/MAX5393M 0.6 1 MAX5391N/MAX5393N 0.3 0.5 LSB DC PERFORMANCE (Variable Resistor Mode) Integral Nonlinearity (Note 3) Differential Nonlinearity R-INL R-DNL MAX5391L/MAX5393L -1.5 +1.5 MAX5391M/MAX5393M -0.75 +0.75 MAX5391N/MAX5393N -0.5 +0.5 (Note 3) -0.5 +0.5 LSB LSB DC PERFORMANCE (Resistor Characteristics) Wiper Resistance Terminal Capacitance RWL (Note 4) 200 CH_, CL_ Measured to GND 10 I pF Wiper Capacitance CW_ Measured to GND 50 pF End-to-End Resistor Tempco TCR No load 35 ppm/NC End-to-End Resistor Tolerance DRHL Wiper not connected -25 +25 % AC PERFORMANCE Crosstalk (Note 5) -3dB Bandwidth Code = 80H, 10pF load, VDD = 1.8V Total Harmonic Distortion Plus Noise BW THD+N -90 MAX5391L/MAX5393L 600 MAX5391M/MAX5393M 100 MAX5391N/MAX5393N 50 Measured at W, VH_ = 1VRMS at 1kHz 0.02 2 _______________________________________________________________________________________ dB kHz % Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers (VDD = +1.7V to +5.5V, VH_ = VDD, VL_ = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +1.8V, TA = +25NC.) (Note 1) PARAMETER Wiper Settling Time (Note 6) Charge-Pump Feedthrough at W_ SYMBOL tS VRW CONDITIONS MIN TYP MAX5391L/MAX5393L 400 MAX5391M/MAX5393M 1200 MAX5391N/MAX5393N 2200 fCLK = 600kHz, COUT = 0nF 200 MAX UNITS ns nVP-P POWER SUPPLIES Supply Voltage Range 1.7 VDD Standby Current VDD = 5.5V 27 VDD = 1.7V 12 VDD = 2.6V to 5.5V 70 VDD = 1.7V to 2.6V 75 5.5 V FA DIGITAL INPUTS Minimum Input High Voltage VIH Maximum Input Low Voltage VIL Input Leakage Current % x VDD VDD = 2.6V to 5.5V 30 VDD = 1.7V to 2.6V 25 -1 Input Capacitance +1 5 % x VDD FA pF TIMING CHARACTERISTICS—SPI (Note 7) SCLK Frequency 10 fMAX MHz SCLK Clock Period tCP 100 ns SCLK Pulse-Width High tCH 40 ns SCLK Pulse-Width Low tCL 40 ns CS Fall to SCK Rise Setup Time tCSS 40 ns SCLK Rise to CS Rise Hold Time DIN Setup Time tCSH 0 ns tDS 40 ns DIN Hold Time tDH 0 ns SCLK Rise to CS Fall Delay SCLK Rise to SCLK Rise Hold Time tCS0 10 ns tCS1 40 ns CS Pulse-Width High tCSW 100 ns Note 1: All devices are 100% production tested at TA = +25NC. Specifications over temperature limits are guaranteed by design and characterization. Note 2: DNL and INL are measured with the potentiometer configured as a voltage-divider (Figure 1) with H_ = VDD and L_ = GND. The wiper terminal is unloaded and measured with a high-input-impedance voltmeter. Note 3: R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure 1). DNL and INL are measured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ = GND. For VDD = +5V, the wiper terminal is driven with a source current of 400FA for the 10kI configuration, 80FA for the 50kI configuration, and 40FA for the 100kI configuration. For VDD = +1.7V, the wiper terminal is driven with a source current of 150FA for the 10kI configuration, 30FA for the 50kI configuration, and 15FA for the 100kI configuration. Note 4: The wiper resistance is the value measured by injecting the currents given in Note 3 into W_ with L_ = GND. RW_ = (VW_ - VH_)/IW_. Note 5: Drive HA with a 1kHz GND to VDD amplitude tone. LA = LB = GND. No load. WB is at midscale with a 10pF load. Measure WB. Note 6: The wiper-settling time is the worst-case 0 to 50% rise time, measured between tap 0 and tap 127. H_ = VDD, L_ = GND, and the wiper terminal is loaded with 10pF capacitance to ground. Note 7: Digital timing is guaranteed by design and characterization, not production tested. _______________________________________________________________________________________ 3 MAX5391/MAX5393 ELECTRICAL CHARACTERISTICS (continued) H N.C. W W L L Figure 1. Voltage-Divider and Variable Resistor Configurations Typical Operating Characteristics (VDD = 1.8V, TA = +25NC, unless otherwise noted.) SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE 20 VDD = 2.6V 15 10 VDD = 1.8V MAX5391 toc03 VDD = 5V SUPPLY CURRENT (µA) 30 1000 25 VDD = 2.6V 100 10 20 15 5 VDD = 1.8V 1 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 10 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1.7 2.7 3.2 3.7 4.2 4.7 DIGITAL INPUT VOLTAGE (V) VDD (V) RESISTANCE (W_-TO-L_) vs. TAP POSITION (10kI) RESISTANCE (W_-TO-L_) vs. TAP POSITION (50kI) RESISTANCE (W_-TO-L_) vs. TAP POSITION (100kI) 45 W-TO-L RESISTANCE (kI) 8 7 6 5 4 3 40 90 W-TO-L RESISTANCE (kI) 9 100 MAX5391 toc05 50 MAX5391 toc04 10 35 30 25 20 15 80 60 50 40 30 10 20 1 5 10 0 0 51 102 153 TAP POSITION 204 255 5.2 70 2 0 2.2 TEMPERATURE (°C) MAX5391 toc06 SUPPLY CURRENT (µA) 25 10,000 IDD (µA) VDD = 5V SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX5391 toc02 30 MAX5391 toc01 SUPPLY CURRENT vs. TEMPERATURE W-TO-L RESISTANCE (kI) MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers 0 0 51 102 153 TAP POSITION 204 255 0 51 102 153 TAP POSITION 4 _______________________________________________________________________________________ 204 255 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers WIPER RESISTANCE vs. WIPER VOLTAGE VDD = 5V 80 VDD = 1.8V VDD = 2.6V 60 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.04 0.02 0.01 50kI 0 10kI 0.02 0 -0.02 -0.04 -0.01 -0.06 -0.02 -0.08 -0.03 -0.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 102 153 204 VARIABLE RESISTOR DNL vs. TAP POSITION (100kI) VARIABLE RESISTOR INL vs. TAP POSITION (10kI) 0.08 0.06 0.8 0.6 0.2 0 -0.02 INL (LSB) 0.02 DNL (LSB) 0.4 0.02 0 -0.02 -0.04 -0.04 -0.6 -0.08 IWIPER = 30µA -0.8 IWIPER = 15µA -0.10 -0.10 51 102 153 204 IWIPER = 150µA -1.0 0 255 0 -0.2 -0.4 -0.06 -0.06 51 102 153 204 255 0 51 102 153 204 TAP POSITION TAP POSITION TAP POSITION VARIABLE RESISTOR INL vs. TAP POSITION (50kI) VARIABLE RESISTOR INL vs. TAP POSITION (100kI) VOLTAGE-DIVIDER DNL vs. TAP POSITION (10kI) 0.3 0.4 0.10 0.3 0.08 0.06 0.04 0.1 0.02 0 -0.1 DNL (LSB) 0.2 0.1 INL (LSB) 0.2 0 -0.1 0 -0.02 -0.2 -0.2 -0.04 -0.3 -0.3 -0.06 -0.4 -0.4 IWIPER = 30µA -0.5 -0.08 IWIPER = 15µA -0.5 51 102 153 TAP POSITION 204 255 255 MAX5391 toc15 0.4 MAX5391 toc14 0.5 MAX5391 toc13 0.5 255 MAX5391 toc12 1.0 MAX5391 toc11 MAX5391 toc10 0.10 0.04 0 51 VARIABLE RESISTOR DNL vs. TAP POSITION (50kI) 0.04 0 IWIPER = 150µA TAP POSITION 0.06 -0.08 MAX5391 toc09 0.06 TEMPERATURE (°C) 0.08 DNL (LSB) 0.08 WIPER VOLTAGE (V) 0.10 INL (LSB) 100kI DNL (LSB) 100 0.04 0.03 0.10 MAX5391 toc08 MAX5391 toc07 120 0.05 END-TO-END RESISTANCE % CHANGE WIPER RESISTANCE (I) 140 0 VARIABLE RESISTOR DNL vs. TAP POSITION (10kI) END-TO-END RESISTANCE PERCENTAGE CHANGE vs. TEMPERATURE -0.10 0 51 102 153 TAP POSITION 204 255 0 51 102 153 204 255 TAP POSITION _______________________________________________________________________________________ 5 MAX5391/MAX5393 Typical Operating Characteristics (continued) (VDD = 1.8V, TA = +25NC, unless otherwise noted.) Typical Operating Characteristics (continued) (VDD = 1.8V, TA = +25NC, unless otherwise noted.) VOLTAGE-DIVIDER DNL vs. TAP POSITION (100kI) 0.06 0.5 MAX5391 toc17 0.08 0.08 0.06 0.4 0.3 0.04 0.2 0.02 0.02 0.1 0 -0.02 INL (LSB) 0.04 DNL (LSB) 0 -0.02 0 -0.1 -0.04 -0.04 -0.2 -0.06 -0.06 -0.3 -0.08 -0.08 -0.4 -0.10 -0.10 0 51 102 153 204 255 -0.5 0 51 102 153 204 255 0 51 102 153 204 255 TAP POSITION TAP POSITION TAP POSITION VOLTAGE-DIVIDER INL vs. TAP POSITION (50kI) VOLTAGE-DIVIDER INL vs. TAP POSITION (100kI) TAP-TO-TAP SWITCHING TRANSIENT (CODE 127 TO CODE 128) (10kI) 0.5 MAX5391 toc19 0.5 0.4 0.3 0.4 0.3 0.2 0.1 0.1 INL (LSB) 0.2 0 -0.1 MAX5391 toc21 MAX5391 toc20 DNL (LSB) 0.10 MAX5391 toc16 0.10 VOLTAGE-DIVIDER INL vs. TAP POSITION (10kI) MAX5391 toc18 VOLTAGE-DIVIDER DNL vs. TAP POSITION (50kI) INL (LSB) MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers VW_-L_ 20mV/div 0 -0.1 -0.2 -0.2 -0.3 -0.3 -0.4 -0.4 CS 5V/div -0.5 -0.5 0 51 102 153 204 0 255 51 102 153 204 255 TAP POSITION TAP POSITION TAP-TO-TAP SWITCHING TRANSIENT (CODE 127 TO CODE 128) (50kI) TAP-TO-TAP SWITCHING TRANSIENT (CODE 127 TO CODE 128) (100kI) MAX5391M P0WER-ON TRANSIENT MAX5391 toc24 MAX5391 toc23 MAX5391 toc22 VW_-L_ 20mV/div VW_-L_ 20mV/div CS 5V/div 1µs/div 400ns/div VW_-L_ 1V/div CS 5V/div 1µs/div VDD 5V/div 2µs/div 6 _______________________________________________________________________________________ Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers MIDSCALE FREQUENCY RESPONSE (50kI) GAIN (dB) -10 VDD = 1.8V -10 VDD = 5V 0 -10 VDD = 1.8V VDD = 1.8V -20 -20 -20 VIN = 1VP-P VIN = 1VP-P -30 VIN = 1VP-P -30 1 10k 100 -30 0.01 FREQUENCY (kHz) 1 10k 100 -20 0.20 0.18 0.16 100kI 10k 10kI 0.14 THD+N (%) -40 100 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY MAX5391 toc28 0 CROSSTALK (dB) 1 FREQUENCY (kHz) CROSSTALK vs. FREQUENCY -60 0.01 FREQUENCY (kHz) MAX5391 toc29 0.01 50kI -80 100kI 0.12 0.10 0.08 0.06 -100 0.04 -120 0 -140 0.1 1 10 100 0.01 1000 0.1 1 10 FREQUENCY (kHz) FREQUENCY (kHz) BYP RAMP vs. CBYP CHARGE-PUMP FEEDTHROUGH AT W_ vs. CBYP 700 MAX5391 toc30 120 600 VOLTAGE (nVRMS) 100 80 60 40 100 MAX5391 toc31 0.01 50kI 0.02 10kI RAMP TIME (ms) GAIN (dB) VDD = 5V 0 GAIN (dB) VDD = 5V 0 10 MAX5391 toc26 10 MAX5391 toc25 10 MIDSCALE FREQUENCY RESPONSE (100kI) MAX5391 toc27 MIDSCALE FREQUENCY RESPONSE (10kI) 500 400 300 200 20 100 0 0 0 0.02 0.04 0.05 CAPACITANCE (µF) 0.08 0.10 0 200 400 600 800 CAPACITANCE (pF) _______________________________________________________________________________________ 7 MAX5391/MAX5393 Typical Operating Characteristics (continued) (VDD = 1.8V, TA = +25NC, unless otherwise noted.) Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers MAX5391/MAX5393 Pin Configurations VDD N.C. SCLK DIN TOP VIEW 12 11 10 9 TOP VIEW N.C. 13 8 HA 14 7 BYP 6 N.C. 5 GND MAX5391 WA 15 *EP LA 16 + 2 3 4 WB LB I.C. 14 LA LB 2 13 HA HB 3 12 WA WB 4 MAX5393 11 VDD I.C. 5 10 N.C. BYP 6 9 SCLK CS 7 1 HB + GND 1 CS 8 DIN *EP = EXPOSED PAD Pin Description PIN MAX5391 (TQFN-EP) MAX5393 (TSSOP) NAME 1 3 HB 2 4 WB Resistor B Wiper Terminal LB Resistor B Low Terminal. The voltage at LB can be higher or lower than the voltage at HB. Current can flow into or out of LB. Internally Connected. Connect to GND. 3 2 FUNCTION Resistor B High Terminal. The voltage at HB can be higher or lower than the voltage at LB. Current can flow into or out of HB. 4 5 I.C. 5 1 GND Ground 6, 11, 13 10 N.C. No Connection. Not internally connected. 7 6 BYP Internal Power-Supply Bypass. For additional charge-pump filtering, bypass to GND with a capacitor close to the device. 8 7 9 8 CS DIN 10 9 SCLK 12 11 VDD Power-Supply Input. Bypass VDD to GND with a 0.1FF capacitor close to the device. 14 13 HA Resistor A High Terminal. The voltage at HA can be higher or lower than the voltage at LA. Current can flow into or out of HA. 15 12 WA Resistor A Wiper Terminal 16 14 LA Resistor A Low Terminal. The voltage at LA can be higher or lower than the voltage at HA. Current can flow into or out of LA. — — EP Exposed Pad (MAX5391 Only). Connect to GND. Active-Low Chip-Select Input Serial-Interface Data Input Serial-Interface Clock Input 8 _______________________________________________________________________________________ Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers CBYP does affect the startup time of the charge pump; however, CBYP does not impact the ability to communicate with the device, nor is there a minimum CBYP requirement. The maximum wiper impedance specification is not guaranteed until the charge pump is fully settled. See the BYP Ramp vs. CBYP graph in the Typical Operating Characteristics for CBYP impact on chargepump settling time. The MAX5391/MAX5393 dual 256-tap, volatile, low-voltage linear taper digital potentiometers offer three end-toend resistance values of 10kI, 50kI, and 100kI. Each potentiometer consists of 255 fixed resistors in series between terminals H_ and L_. The potentiometer wiper, W_, is programmable to access any one of the 256 tap points on the resistor string. SPI Digital Interface The potentiometers in each device are programmable independently of each other. The MAX5391/MAX5393 feature an SPI interface. The MAX5391/MAX5393 include a SPI interface that provides a 3-wire write-only serial-data interface to control the wiper tap position through inputs chip select (CS), data in (DIN), and data clock (SCLK). Drive CS low to load data from DIN synchronously into the serial shift register on the rising edge of each SCLK pulse. The MAX5391/MAX5393 load the last 10 bits of clocked data into the appropriate potentiometer control register once CS transitions high. See Figures 2 and 3. Data written to a memory register immediately updates the wiper position. Keep CS low during the entire data stream to prevent the data from being terminated. Charge Pump The MAX5391/MAX5393 contain an internal charge pump that guarantees the maximum wiper resistance, RWL, to be less then 200I for supply voltages down to 1.7V. Pins H_, W_, and L_ are still required to be less than VDD + 0.3V. A bypass input, BYP, is provided to allow additional filtering of the charge-pump output, further reducing clock feed through that may occur on H_, W_, or L_. The nominal clock rate of the charge pump is 600kHz. BYP should remain resistively unloaded as any additional load would produce a ripple of approximately IBYP/(600kHz x CBYP) volts. See the ChargePump Feedthrough at W_ vs. CBYP graph in the Typical Operating Characteristics for CBYP sizing guidelines with respect to clock feedthrough to the wiper. The value of The first two bits A1:A0 (address bits) address one of the two potentiometers. See Table 1. The power-on reset (POR) circuitry sets the wiper to midscale. Table 1. SPI Register Map Bit Number Bit Name Write Wiper Register A 1 2 3 4 5 6 7 8 9 10 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 0 0 D7 D6 D5 D4 D3 D2 D1 D0 Write Wiper Register B 0 1 D7 D6 D5 D4 D3 D2 D1 D0 Write to Both A and B 1 1 D7 D6 D5 D4 D3 D2 D1 D0 COMMAND STARTED 10-BIT WIPER REGISTER LOADED CS SCLK DIN A0 A1 D7 D6 D5 D4 D3 D2 D1 D0 Figure 2. SPI Digital Interface Format _______________________________________________________________________________________ 9 MAX5391/MAX5393 Detailed Description MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers tCSW CS tCS1 tCSO tCH tCSS tCL tCP tCSH tDH SCLK tDS DIN Figure 3. SPI Timing Diagram REG A: The data byte writes to register A, and the wiper of potentiometer A moves to the appropriate position at the rising edge of CS. D[7:0] indicates the position of the wiper. D[7:0] = 00h moves the wiper to the position closest to LA. D[7:0] = FFh moves the wiper closest to HA. D[7:0] is 80h following power-on. REG B: The data byte writes to register B, and the wiper of potentiometer B moves to the appropriate position at the rising edge of CS. D[7:0] indicates the position of the wiper. D[7:0] = 00h moves the wiper to the position closest to LB. D[7:0] = FFh moves the wiper to the position closest to HB. D[7:0] is 80h following power-on. REG A and B: The data byte writes to registers A and B, and the wipers of potentiometers A and B move to the appropriate position. D[7:0] indicates the position of the wiper. D[7:0] = 00h moves the wiper to the position closest to L_. D[7:0] = FFh moves the wiper to the position closest to H_. D[7:0] is 80h following power-on. Applications Information Variable Gain Amplifier Figure 4 shows a potentiometer adjusting the gain of a noninverting amplifier. Figure 5 shows a potentiometer adjusting the gain of an inverting amplifier. Adjustable Dual Regulator Figure 6 shows an adjustable dual linear regulator using a dual potentiometer as two variable resistors. Adjustable Voltage Reference Figure 7 shows an adjustable voltage reference circuit using a potentiometer as a voltage divider. 10 ������������������������������������������������������������������������������������� Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers L_ VOUT W_ VIN VOUT W_ H_ L_ Figure 4. Variable-Gain Noninverting Amplifier VOUT1 OUT1 VOUT2 OUT2 H_ IN W_ L_ VREF OUT H_ W_ SET1 +2.5V IN MAX8866 V+ Figure 5. Variable-Gain Inverting Amplifier MAX6037 H_ W_ L_ GND L_ SET2 Figure 6. Adjustable Dual Linear Regulator Figure 7. Adjustable Voltage Reference ______________________________________________________________________________________ 11 MAX5391/MAX5393 H_ VIN MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers Variable-Gain Current-to-Voltage Converter Figure 8 shows a variable-gain current-to-voltage converter using a potentiometer as a variable resistor. Offset Voltage Adjustment Circuit Figure 11 shows an offset voltage adjustment circuit using a dual potentiometer. LCD Bias Control Figure 9 shows a positive LCD bias control circuit using a potentiometer as a voltage-divider. Process Information PROCESS: BiCMOS Programmable Filter Figure 10 shows a programmable filter using a dual potentiometer. R3 +1.8V H_ W_ H_ R1 W_ R2 VOUT IS L_ L_ VOUT VOUT = IS x ((R3 x (1 + R2/R1)) + R2) Figure 8. Variable Gain I-to-V Converter Figure 9. Positive LCD Bias Control Using a Voltage-Divider +1.8V WA WB VIN LA HA LB HB VOUT R3 VIN VOUT R1 HA HB R2 WA LA WB LB Figure 10. Programmable Filter Figure 11. Offset Voltage Adjustment Circuit 12 ������������������������������������������������������������������������������������� Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE Document No. 14 TSSOP U14+1 21-0066 16 TQFN-EP T1633+5 21-0136 ______________________________________________________________________________________ 13 MAX5391/MAX5393 Package Information MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers Revision History REVISION NUMBER REVISION DATE 0 10/09 Initial release — 1 4/10 Added Soldering Temperature in Absolute Maximum Ratings; corrected code in Conditions of -3dB Bandwidth specification and corrected Integral Nonlinearity specifications in Electrical Characteristics 2 DESCRIPTION PAGES CHANGED Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 © 2010 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.