FAIRCHILD 74LCX244

Revised March 2005
74LCX244
Low Voltage Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
Features
The LCX244 contains eight non-inverting buffers with
3-STATE outputs. The device may be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver. The LCX244 is designed for low voltage (2.5V
or 3.3V) VCC applications with capability of interfacing to a
5V signal environment.
The LCX244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining
CMOS low power dissipation.
■ 5V tolerant inputs and outputs
■ 2.3V to 3.6V VCC specifications provided
■ 6.5 ns tPD max (VCC
3.3V), 10 PA ICC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ r24 mA output drive (VCC
3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human body model ! 2000V
Machine model ! 200V
■ Leadless DQFN Pb-Free package
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
Package
Number
Package Description
74LCX244WM
(Note 2)
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX244WMX_NL
(Note 4)
M20B
Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX244SJ
(Note 2)
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX244BQX
(Note 3)
MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
74LCX244MSA
(Note 2)
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX244MTC
(Note 2)
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LCX244MTC_NL
(Note 4)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LCX244MTCX_NL
(Note 4)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pb-Free package per JEDEC J-STD-020B.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 3: DQFN package available in Tape and Reel only.
Note 4: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated.
© 2005 Fairchild Semiconductor Corporation
DS500107
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74LCX244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
February 1994
74LCX244
Logic Symbol
Pin Descriptions
IEEE/IEC
Pin Names
Description
OE1, OE2
3-STATE Output Enable Inputs
I0 – I7
Inputs
O0 – O7
Outputs
Truth Tables
Inputs
OE1
Connection Diagrams
Pin Assignments for
SOIC, SOP, SSOP, and TSSOP
L
L
L
H
H
H
X
Z
Inputs
(Top Through View)
2
In
Outputs
(Pins 3, 5, 7, 9)
L
L
L
L
H
H
H
X
Z
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
Pad Assignments for DQFN
(Pins 12, 14, 16, 18)
L
OE2
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In
Outputs
Symbol
Parameter
VCC
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
Value
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
ICC
DC Supply Current per Supply Pin
IGND
DC Ground Current per Ground Pin
TSTG
Storage Temperature
Conditions
0.5 to 7.0
0.5 to 7.0
0.5 to 7.0
0.5 to VCC 0.5
50
50
50
r50
r100
r100
65 to 150
Units
V
V
Output in 3-STATE
V
Output in HIGH or LOW State (Note 6)
VI GND
mA
VO GND
mA
VO ! VCC
mA
mA
mA
qC
Recommended Operating Conditions (Note 7)
Symbol
VCC
Parameter
VI
Input Voltage
VO
Output Voltage
IOH/IOL
Min
Max
Operating
2.0
3.6
Data Retention
1.5
3.6
Supply Voltage
0
5.5
HIGH or LOW State
0
VCC
3-STATE
0
5.5
Output Current
TA
Free-Air Operating Temperature
't/'V
Input Edge Rate, VIN
0.8V to 2.0V, VCC
VCC
3.0V to 3.6V
VCC
2.7V to 3.0V
VCC
2.3V to 2.7V
Units
V
V
V
r24
r12
r8
mA
40
85
qC
0
10
ns/V
3.0V
Note 5: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 6: IO Absolute Maximum Rating must be observed.
Note 7: Unused inputs or I/Os must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
40qC to 85qC
Min
2.3 to 2.7
1.7
2.7 to 3.6
2.0
Max
0.7
2.7 to 3.6
0.8
100 PA
8 mA
2.3
1.8
IOH
12 mA
2.7
2.2
IOH
18 mA
3.0
2.4
2.2
2.3 to 3.6
V
IOH
24 mA
3.0
100 PA
2.3 to 3.6
IOL
8 mA
2.3
0.6
IOL
12 mA
2.7
0.4
IOL
16 mA
3.0
0.4
IOL
24 mA
IOZ
3-STATE Output Leakage
0 d VO d 5.5V
VI
VIH or VIL
VI or VO
5.5V
3
V
VCC 0.2
IOL
0 d VI d 5.5V
Units
V
2.3 to 2.7
IOH
Input Leakage Current
Power-Off Leakage Current
TA
(V)
IOH
II
IOFF
VCC
0.2
V
3.0
0.55
2.3 to 3.6
r5.0
PA
2.3 to 3.6
r5.0
PA
0
10
PA
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74LCX244
Absolute Maximum Ratings(Note 5)
74LCX244
DC Electrical Characteristics
Symbol
(Continued)
Parameter
VCC
Conditions
TA
(V)
ICC
Quiescent Supply Current
VI
VCC or GND
3.6V d VI, VO d 5.5V (Note 8)
'ICC
Increase in ICC per Input
VIH
VCC 0.6V
40qC to 85qC
Min
Units
Max
2.3 3.6
10
2.3 3.6
r10
2.3 3.6
500
PA
PA
Note 8: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
TA
Symbol
Parameter
VCC
40qC to 85qC, RL
3.3V r 0.3V
VCC
CL 50 pF
CL
500:
2.7V
VCC
50 pF
CL
2.5V r 0.2
30 pF
Min
Max
Min
Max
Min
Max
tPHL
Propagation Delay
1.5
6.5
1.5
7.5
1.5
7.8
tPLH
Data to Output
1.5
6.5
1.5
7.5
1.5
7.8
tPZL
Output Enable Time
1.5
8.0
1.5
9.0
1.5
10.0
1.5
8.0
1.5
9.0
1.5
10.0
1.5
7.0
1.5
8.0
1.5
8.4
1.5
7.0
1.5
8.0
1.5
8.4
tPZH
tPLZ
Output Disable Time
tPHZ
tOSHL
tOSLH
Output to Output Skew
(Note 9)
1.0
Units
ns
ns
ns
ns
1.0
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol
VOLP
VOLV
Parameter
Quiet Output Dynamic Peak VOL
Quiet Output Dynamic Valley VOL
VCC
Conditions
TA
25qC
(V)
Typical
CL
50 pF, VIH
3.3V, VIL
0V
3.3
0.8
CL
30 pF, VIH
2.5V, VIL
0V
2.5
0.6
CL
50 pF, VIH
3.3V, VIL
0V
3.3
0.8
CL
30 pF, VIH
2.5V, VIL
0V
2.5
0.6
Units
V
V
Capacitance
Symbol
Parameter
Conditions
CIN
Input Capacitance
VCC
Open, VI
COUT
Output Capacitance
VCC
3.3V, VI
0V or VCC
CPD
Power Dissipation Capacitance
VCC
3.3V, VI
0V or VCC, f
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4
0V or VCC
10 MHz
Typical
Units
7.0
pF
8.0
pF
25.0
pF
74LCX244
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC
3.3V r 0.3V
VCC x 2 at VCC
tPZH , tPHZ
2.5V r 0.2V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
Symbol
VCC
3.3V r 0.3V
2.7V
2.5V r 0.2V
Vmi
1.5V
1.5V
VCC/2
Vmo
1.5V
1.5V
VCC/2
Vx
VOL 0.3V
VOL 0.3V
VOL 0.15V
Vy
VOH 0.3V
VOH 0.3V
VOH 0.15V
5
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74LCX244
Schematic Diagram Generic for LCX Family
FIGURE 3.
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6
Tape Format for DQFN
Package
Designator
BQX
Tape
Number
Cavity
Section
Cavities
Status
Cover Tape
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Tape Size
12 mm
A
B
C
D
N
W1
W2
13.0
0.059
0.512
0.795
2.165
0.488
0.724
(330.0)
(1.50)
(13.00)
(20.20)
(55.00)
(12.4)
(18.4)
7
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74LCX244
Tape and Reel Specification
74LCX244
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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8
74LCX244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
9
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74LCX244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm
Package Number MLP020B
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10
74LCX244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
11
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74LCX244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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