MAXIM MAX6316LUK46CY-T

19-0496; Rev 3; 1/99
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
____________________________Features
The MAX6316–MAX6322 family of microprocessor (µP)
supervisory circuits monitors power supplies and
microprocessor activity in digital systems. It offers several combinations of push/pull, open-drain, and bidirectional (such as Motorola 68HC11) reset outputs, along
with watchdog and manual-reset features. The Selector
Guide below lists the specific functions available from
each device. These devices are specifically designed
to ignore fast negative transients on VCC. Resets are
guaranteed valid for VCC down to 1V.
These devices are available in 26 factory-trimmed reset
threshold voltages (from 2.5V to 5V, in 100mV increments), featuring four minimum power-on reset timeout
periods (from 1ms to 1.12sec), and four watchdog timeout periods (from 6.3ms to 25.6sec). Nine standard versions are available with an order increment requirement
of 2500 pieces (see Standard Versions table); contact
the factory for availability of other versions, which have
an order increment requirement of 10,000 pieces.
The MAX6316–MAX6322 are offered in a miniature
5-pin SOT23 package.
♦ Small 5-Pin SOT23 Package
♦ Available in 26 Reset Threshold Voltages
2.5V to 5V, in 100mV Increments
♦ Four Reset Timeout Periods
1ms, 20ms, 140ms, or 1.12sec (min)
♦ Four Watchdog Timeout Periods
6.3ms, 102ms, 1.6sec, or 25.6sec (typ)
♦ Four Reset Output Stages
Active-High, Push/Pull
Active-Low, Push/Pull
Active-Low, Open-Drain
Active-Low, Bidirectional
♦ Guaranteed Reset Valid to VCC = 1V
♦ Immune to Short Negative VCC Transients
♦ Low Cost
♦ No External Components
_______________Ordering Information
PART
MAX6316LUK____-T
________________________Applications
Portable Computers
Computers
Controllers
Intelligent Instruments
Portable/Battery-Powered Equipment
Embedded Control Systems
TEMP. RANGE
PIN-PACKAGE
-40°C to +85°C
5 SOT23-5
MAX6316MUK____-T
-40°C to +85°C
5 SOT23-5
MAX6317HUK____-T
-40°C to +85°C
5 SOT23-5
MAX6318HUK____-T
-40°C to +85°C
5 SOT23-5
MAX6318MHUK____-T
-40°C to +85°C
5 SOT23-5
Ordering Information continued at end of data sheet.
Typical Operating Circuit and Pin Configurations appear at
end of data sheet.
___________________________________________________________________Selector Guide
WATCHDOG
INPUT
MANUAL
RESET
INPUT
MAX6316L
✔
MAX6316M
✔
MAX6317H
MAX6318LH
PART
RESET OUTPUTS*
ACTIVE-LOW
PUSH/PULL
ACTIVE-HIGH
PUSH/PULL
ACTIVE-LOW
BIDIRECTIONAL
ACTIVE-LOW
OPEN-DRAIN
✔
✔
—
—
✔
✔
—
—
✔
—
—
✔
—
✔
—
✔
—
✔
—
MAX6318MH**
✔
—
—
✔
✔
MAX6319LH
—
✔
—
✔
✔
—
✔
MAX6320P
—
✔
—
✔
—
MAX6319MH**
✔
—
—
—
✔
MAX6321HP
✔
—
—
✔
MAX6322HP
—
—
✔
—
✔
—
✔
—
✔
✔
✔
—
—
* The MAX6318/MAX6319/MAX6321/MAX6322 feature two types of reset output on each device.
**Future product—contact factory for availability.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
MAX6316–MAX6322
________________General Description
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND)
VCC......................................................................-0.3V to +6V
RESET (MAX6320/MAX6321/MAX6322 only)...... -0.3V to +6V
All Other Pins.........................................-0.3V to (VCC + 0.3V)
Input/Output Current, All Pins .............................................20mA
Continuous Power Dissipation (TA = +70°C)
SOT23-5 (derate 7.1mW/°C above +70°C)...............571mW
Operating Temperature Range............................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range..............................-65°C to +160°C
Lead Temperature (soldering, 10sec)..............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 2.5V to 5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Operating Voltage Range
Supply Current
Reset Threshold Temperature
Coefficient
Reset Threshold (Note 2)
SYMBOL
CONDITIONS
MIN
1
VCC to RESET Delay
MAX
UNITS
5.5
V
TA = -40°C to +85°C
VCC = 5.5V
10
20
ICC
MAX6316/MAX6317/MAX6318/
MAX6320/MAX6321:
MR and WDI unconnected
VCC = 3.6V
5
12
MAX6319/MAX6322:
MR unconnected
VCC = 5.5V
5
12
VCC = 3.6V
3
8
∆VTH/°C
VRST
40
VTH -1.5% VTH VTH +1.5%
TA = -40°C to +85°C
VTH -2.5% VTH VTH +2.5%
3
tRP
tRD
V
mV
MAX63_ _A_-T
1
1.4
2
MAX63_ _B_-T
20
28
40
MAX63_ _C_-T
140
200
280
MAX63_ _D_-T
1120
1600
2240
VCC falling at 1mV/µs
µA
ppm/°C
TA = +25°C
Reset Threshold Hysteresis
Reset Active Timeout Period
TYP
VCC
40
ms
µs
PUSH/PULL RESET OUTPUT (MAX6316L/MAX6317H/MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP)
VOL
RESET Output Voltage
VOH
VOL
RESET Output Voltage
VOH
VCC ≥ 1.0V, ISINK = 50µA
0.3
VCC ≥ 1.2V, ISINK = 100µA
0.3
VCC ≥ 2.7V, ISINK = 1.2mA
0.3
VCC ≥ 4.5V, ISINK = 3.2mA
0.4
VCC ≥ 2.7V, ISOURCE = 500µA
0.8 x VCC
VCC ≥ 4.5V, ISOURCE = 800µA
VCC - 1.5
VCC ≥ 2.7V, ISINK = 1.2mA
0.3
VCC ≥ 4.5V, ISINK = 3.2mA
0.4
VCC ≥ 1.8V, ISOURCE = 150µA
0.8 x VCC
VCC ≥ 2.7V, ISOURCE = 500µA
0.8 x VCC
VCC ≥ 4.5V, ISOURCE = 800µA
VCC - 1.5
Note 1: Over-temperature limits are guaranteed by design, not production tested.
Note 2: A factory-trimmed voltage divider programs the nominal reset threshold (VTH). Factory-trimmed reset thresholds are
available in 100mV increments from 2.5V to 5V (see Table 1 at end of data sheet).
2
V
_______________________________________________________________________________________
V
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
(VCC = 2.5V to 5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
BIDIRECTIONAL RESET OUTPUT (MAX6316M/MAX6318MH/MAX6319MH)
Transition Flip-Flop Setup Time
tS
(Note 3)
RESET Output Rise Time
(Note 4)
tR
TYP
400
VPTH
333
VCC = 5.0V, CL = 200pF
333
VCC = 3.0V, CL = 250pF
666
RESET Active Pull-Up Current
VCC = 5.0V
4.2
0.65
V
20
mA
kΩ
4.7
OPEN-DRAIN RESET OUTPUT (MAX6320P/MAX6321HP/MAX6322HP)
VCC ≥ 1.0V, ISINK = 50µA
RESET Output Voltage
Open-Drain Reset Output
Leakage Current
VOL
ns
666
0.4
VCC = 5.0V
RESET Pull-Up Resistance
UNITS
ns
VCC = 3.0V, CL = 120pF
VCC = 5.0V, CL = 400pF
Active Pull-Up Enable Threshold
MAX
5.2
0.3
VCC ≥ 1.2V, ISINK = 100µA
0.3
VCC ≥ 2.7V, ISINK = 1.2mA
0.3
VCC ≥ 4.5V, ISINK = 3.2mA
0.4
ILKG
1.0
V
µA
WATCHDOG INPUT (MAX6316/MAX6317H/MAX6318_H/MAX6320P/MAX6321HP)
Watchdog Timeout Period
WDI Pulse Width
tWD
tWDI
WDI Input Threshold
WDI Input Current
(Note 6)
VIL
VIH
IWDI
MAX63_ _ _ W-T
4.3
6.3
9.3
MAX63_ _ _ X-T
71
102
153
MAX63_ _ _ Y-T
1.12
1.6
2.4
MAX63_ _ _ Z-T
17.9
25.6
38.4
VIL = 0.3 x VCC, VIH = 0.7 x VCC
(Note 5)
50
VWDI = 0, time average
0.7 x VCC
120
-20
sec
ns
0.3 x VCC
WDI = VCC, time average
ms
160
-15
V
µA
MANUAL-RESET INPUT (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/MAX6322HP)
VIL
MR Input Threshold
VIH
VIL
VIH
VTH > 4.0V
VTH < 4.0V
MR Input Pulse Width
0.8
2.0
0.3 x VCC
0.7 x VCC
1
MR Glitch Rejection
MR to Reset Delay
Note 3:
Note 4:
Note 5:
Note 6:
µs
100
MR Pull-Up Resistance
35
VCC = 5V
V
52
230
ns
75
kΩ
ns
This is the minimum time RESET must be held low by an external pull-down source to set the active pull-up flip-flop.
Measured from RESET VOL to (0.8 x VCC), RLOAD = ∞.
WDI is internally serviced within the watchdog period if WDI is left unconnected.
The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is
designed for a three-stated-output device with a 10µA maximum leakage current and capable of driving a maximum capacitive load of 200pF. The three-state device must be able to source and sink at least 200µA when active.
_______________________________________________________________________________________
3
MAX6316–MAX6322
ELECTRICAL CHARACTERISTICS (continued)
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
6
VCC = 3V
4
3
2
VCC = 1V
1
80
70
60
50
40
30
-20
0
20
40
60
80
100
-20
0
20
40
60
80
220
200
-40
100
-20
0
20
60
80
MAX6316/17/18/20/21
NORMALIZED WATCHDOG TIMEOUT
PERIOD vs. TEMPERATURE
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
1.05
MAX6316toc06
1.04
NORMALIZED WATCHDOG TIMEOUT PERIOD
MAX6316toc05
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
MAXIMUM VCC TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6316M/6318MH/6319MH
BIDIRECTIONAL
PULL-UP CHARACTERISTICS
100
MAX6316toc09
MAX6316toc08
80
RESET OCCURS ABOVE LINES
70
VRST = 3.3V
60
+5V
74HC05
INPUT
PASSIVE
4.7kΩ
PULL-UP
2V/div
4.7k
100pF
VRST = 4.63V
50
+5V
40
VRST = 2.63V
INPUT
30
74HC05
100pF
20
MR GND
0
10
100
1000
RESET, ACTIVE
PULL-UP
2V/div
VCC
RESET
10
200ns/div
RESET THRESHOLD OVERDRIVE (mV) VRST - VCC
4
40
TEMPERATURE (°C)
TEMPERATURE (°C)
NORMALIZED RESET TIMEOUT
PERIOD vs. TEMPERATURE
NORMALIZED RESET TIMEOUT PERIOD
240
140
-40
TEMPERATURE (°C)
TRANSIENT DURATION (µs)
260
160
0
-40
280
180
20
10
0
VCC = 5V
300
PROPAGATION DELAY (ns)
7
5
VCC FALLING AT 1mV/µs
VRST - VCC = 100mV
90
320
MAX6316toc03
VCC = 5V
RESET PROPAGATION DELAY (µs)
9
8
100
MAX6316toc01
10
MAX6316/17/19/20/22
MANUAL-RESET TO RESET
PROPAGATION DELAY vs. TEMPERATURE
VCC FALLING TO RESET PROPAGATION
DELAY vs. TEMPERATURE
MAX6316toc04
MAX6316/17/18/20/21
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT (µA)
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
_______________________________________________________________________________________
RESET
INPUT
5V/div
100
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
PIN
MAX6316L
MAX6316M
MAX6320P
MAX6317H
MAX6318LH
MAX6318MH
MAX6321HP
MAX6319LH
MAX6319MH
MAX6322HP
NAME
FUNCTION
MAX6316L/MAX6318LH/MAX6319LH:
Active-Low, Reset Output. CMOS push/pull
output (sources and sinks current).
1
—
1
1
RESET
MAX6316M/MAX6318MH/MAX6319MH:
Bidirectional, Active-Low, Reset Output.
Intended to interface directly to microprocessors
with bidirectional resets such as the Motorola
68HC11.
MAX6320P/MAX6321HP/MAX6322HP:
Open-Drain, Active-Low, Reset Output. NMOS output (sinks current only). Connect a pull-up resistor
from RESET to any supply voltage up to 6V.
—
1
3
3
RESET
2
2
2
2
GND
3
4
5
3
4
5
—
4
5
4
—
5
Active-High, Reset Output. CMOS push/pull output
(sources and sinks current). Inverse of RESET.
Ground
MR
Active-Low, Manual Reset Input. Pull low to force a
reset. Reset remains asserted for the duration of
the Reset Timeout Period after MR transitions from
low to high. Leave unconnected or connected to
VCC if not used.
WDI
Watchdog Input. Triggers a reset if it remains
either high or low for the duration of the watchdog
timeout period. The internal watchdog timer clears
whenever a reset asserts or whenever WDI sees a
rising or falling edge. To disable the watchdog feature, leave WDI unconnected or three-state the driver connected to WDI.
VCC
Supply Voltage. Reset is asserted when VCC
drops below the Reset Threshold Voltage (VRST).
Reset remains asserted until VCC rises above
VRST and for the duration of the Reset Timeout
Period (tRP) once VCC rises above VRST.
_______________________________________________________________________________________
5
MAX6316–MAX6322
______________________________________________________________Pin Description
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
VCC
MAX6316–MAX6322
RESET
(ALL EXCEPT MAX6317)
RESET
GENERATOR
RESET
(ALL EXCEPT
MAX6316/MAX6320P)
VCC
1.23V
52k
MR
(ALL EXCEPT
MAX6318/MAX6321)
WATCHDOG
TRANSITION
DETECTOR
WDI
(ALL EXCEPT
MAX6319/MAX6322)
WATCHDOG
TIMER
52k
GND
Figure 1. Functional Diagram
_______________Detailed Description
A microprocessor’s (µP) reset input starts or restarts the
µP in a known state. The reset output of the MAX6316–
MAX6322 µP supervisory circuits interfaces with the
reset input of the µP, preventing code-execution errors
during power-up, power-down, and brownout conditions (see the Typical Operating Circuit). The MAX6316/
MAX6317/MAX6318/MAX6320/MAX6321 are also capable of asserting a reset should the µP become stuck in
an infinite loop.
the watchdog timeout period (tWD). Reset remains asserted for the specified reset active timeout period (tRP) after
VCC rises above the reset threshold, after MR transitions
low to high, or after the watchdog timer asserts the reset
(MAX6316_/MAX6317H/MAX6318_H/MAX6320P/
MAX6321HP). After the reset active timeout period (tRP)
expires, the reset output deasserts, and the watchdog
timer restarts from zero (Figure 2).
VCC
Reset Output
The MAX6316L/MAX6318LH/MAX6319LH feature an
active-low reset output, while the MAX6317H/
MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP
feature an active-high reset output. RESET is guaranteed to be a logic low and RESET is guaranteed to be a
logic high for VCC down to 1V.
The MAX6316–MAX6322 assert reset when VCC is below
the reset threshold (V RST ), when MR is pulled low
(MAX6316_/MAX6317H/MAX6319_H/MAX6320P/
MAX6322HP only), or if the WDI pin is not serviced within
6
1V
VRST
VRST
1V
GND
RESET
tRP
tRD
RESET
tRP
tRD
GND
Figure 2. Reset Timing Diagram
_______________________________________________________________________________________
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
scratch. If, on the other hand, RESET is high after a
delay of two external-clock cycles, the processor
knows that it caused the reset itself and can jump to a
different vector and use stored-state information to
determine what caused the reset.
A problem occurs with faster µPs; two external-clock
cycles are only 500ns at 4MHz. When there are several
devices on the reset line, and only a passive pull-up resistor is used, the input capacitance and stray capacitance
can prevent RESET from reaching the logic high state (0.8
x VCC) in the time allowed. If this happens, all resets will
be interpreted as external. The µP output stage is guaranteed to sink 1.6mA, so the rise time can not be reduced
considerably by decreasing the 4.7kΩ internal pull-up
resistance. See Bidirectional Pull-Up Characteristics in the
Typical Operating Characteristics.
The MAX6316M/MAX6318MH/MAX6319MH overcome
this problem with an active pull-up FET in parallel with the
4.7kΩ resistor (Figures 4 and 5). The pull-up transistor
holds RESET high until the µP reset I/O or the supervisory
circuit itself forces the line low. Once RESET goes below
VPTH, a comparator sets the transition edge flip-flop, indicating that the next transition for RESET will be low to
high. When RESET is released, the 4.7kΩ resistor pulls
RESET up toward VCC. Once RESET rises above VPTH
but is below (0.85 x VCC), the active P-channel pull-up
turns on. Once RESET rises above (0.85 x VCC) or the
2µs one-shot times out, the active pull-up turns off. The
parallel combination of the 4.7kΩ pull-up and the
VCC
VCC
WDI*
MR**
68HC11
4.7k
RESET
CIRCUITRY
RESET
RESET
RESET
CIRCUITRY
RESET***
CIN
MAX6316M
MAX6318MH
MAX6319MH
* MAX6316M/MAX6318MH
** MAX6316M/MAX6319MH
*** ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319MH
CIN
CSTRAY
RESET
CIN
OTHER DEVICES
Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus
_______________________________________________________________________________________
7
MAX6316–MAX6322
Bidirectional RESET Output
The MAX6316M/MAX6318MH/MAX6319MH are designed
to interface with µPs that have bidirectional reset pins,
such as the Motorola 68HC11. Like an open-drain output,
these devices allow the µP or other devices to pull the
bidirectional reset (RESET) low and assert a reset condition. However, unlike a standard open-drain output, it
includes the commonly specified 4.7kΩ pull-up resistor
with a P-channel active pull-up in parallel.
This configuration allows the MAX6316M/MAX6318MH/
MAX6319MH to solve a problem associated with µPs
that have bidirectional reset pins in systems where several devices connect to RESET (Figure 3). These µPs
can often determine if a reset was asserted by an external device (i.e., the supervisor IC) or by the µP itself
(due to a watchdog fault, clock error, or other source),
and then jump to a vector appropriate for the source of
the reset. However, if the µP does assert reset, it does
not retain the information, but must determine the
cause after the reset has occurred.
The following procedure describes how this is done in
the Motorola 68HC11. In all cases of reset, the µP pulls
RESET low for about four external-clock cycles. It then
releases RESET, waits for two external-clock cycles,
then checks RESET’s state. If RESET is still low, the µP
concludes that the source of the reset was external
and, when RESET eventually reaches the high state, it
jumps to the normal reset vector. In this case, storedstate information is erased and processing begins from
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
VCC
MAX6316M
MAX6318MH
MAX6319MH
LASERTRIMMED
RESISTORS
VCC
VREF
52k
MR
RESET
GENERATOR
WATCHDOG ON
2µs ONE
SHOT
CIRCUITRY
WDI
VCC
2µs ONE SHOT
TRANSITION
FLIP-FLOP
R
Q
4.7k
FF
S
RESET
ACTIVE PULL-UP
ENABLE COMPARATOR
0.85VCC
0.65V
GND
Figure 4. MAX6316/MAX6318MH/MAX6319MH Bidirectional Reset Output Functional Diagram
8
_______________________________________________________________________________________
(MAX6316M/
MAX6319MH)
(MAX6316M/
MAX6318MH)
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
Open-Drain RESET Output
The MAX6320P/MAX6321HP/MAX6322HP have an
active-low, open-drain reset output. This output structure will sink current when RESET is asserted. Connect
a pull-up resistor from RESET to any supply voltage up
to 6V (Figure 6). Select a resistor value large enough to
VCC
tRP
OR
µC RESET DELAY
RESET
0.7V
0.8 x VCC
tR
tS
RESET PULLED LOW
BY µC OR
RESET GENERATOR
ACTIVE
PULL-UP
TURNS ON
Figure 5. Bidirectional RESET Timing Diagram
+3.3V
+5.0V
VCC
MR*
10k
WDI**
RESET
5V SYSTEM
RESET***
MAX6320
MAX6321
MAX6322
GND
* MAX6320/MAX6322
** MAX6320/MAX6321
*** MAX6321/MAX6322
Figure 6. MAX6320P/MAX6321HP/MAX6322HP Open-Drain
RESET Output Allows Use with Multiple Supplies
register a logic low (see Electrical Characteristics), and
small enough to register a logic high while supplying all
input current and leakage paths connected to the RESET
line. A 10kΩ pull-up is sufficient in most applications.
Manual-Reset Input
The MAX6316_/MAX6317H/MAX6319_H/MAX6320P/
MAX6322HP feature a manual-reset input. A logic low on
MR asserts a reset. After MR transitions low to high, reset
remains asserted for the duration of the reset timeout period (tRP). The MR input is connected to VCC through an
internal 52kΩ pull-up resistor and therefore can be left
unconnected when not in use. MR can be driven with
TTL-logic levels in 5V systems, with CMOS-logic levels in
3V systems, or with open-drain or open-collector output
devices. A normally-open momentary switch from MR to
ground can also be used; it requires no external
debouncing circuitry. MR is designed to reject fast,
negative-going transients (typically 100ns pulses). A
0.1µF capacitor from MR to ground provides additional
noise immunity.
The MR input pin is equipped with internal ESD-protection
circuitry that may become forward biased. Should MR be
driven by voltages higher than VCC, excessive current
would be drawn, which would damage the part. For
example, assume that MR is driven by a +5V supply other
than VCC. If VCC drops lower than +4.7V, MR’s absolute
maximum rating is violated [-0.3V to (VCC + 0.3V)], and
undesirable current flows through the ESD structure from
MR to VCC. To avoid this, use the same supply for MR as
the supply monitored by VCC. This guarantees that the
voltage at MR will never exceed VCC.
Watchdog Input
The MAX6316_/MAX6317H/MAX6318_H/MAX6320P/
MAX6321HP feature a watchdog circuit that monitors
the µP’s activity. If the µP does not toggle the watchdog
input (WDI) within the watchdog timeout period (tWD),
reset asserts. The internal watchdog timer is cleared by
reset or by a transition at WDI (which can detect pulses
as short as 50ns). The watchdog timer remains cleared
while reset is asserted. Once reset is released, the
timer begins counting again (Figure 7).
The WDI input is designed for a three-stated output
device with a 10µA maximum leakage current and the
capability of driving a maximum capacitive load of 200pF.
The three-state device must be able to source and sink at
least 200µA when active. Disable the watchdog function
by leaving WDI unconnected or by three-stating the driver
connected to WDI. When the watchdog timer is left open
circuited, the timer is cleared internally at intervals equal
to 7/8 of the watchdog period.
_______________________________________________________________________________________
9
MAX6316–MAX6322
P-channel transistor on-resistance quickly charges
stray capacitance on the reset line, allowing RESET to
transition from low to high within the required two electronic-clock cycles, even with several devices on the
reset line. This process occurs regardless of whether
the reset was caused by VCC dipping below the reset
threshold, the watchdog timing out, MR being asserted,
or the µP or other device asserting RESET. The parts do
not require an external pull-up. To minimize supply current consumption, the internal 4.7kΩ pull-up resistor
disconnects from the supply whenever the MAX6316M/
MAX6318MH/MAX6319MH assert reset.
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
VCC
tRST
RESET
tRP
tWD
VCC
MAX6316
MAX6318
MAX6319
tRP
VCC
WDI
GND
RESET
100k
MAX6316/MAX6317
MAX6318/MAX6320
MAX6321
Figure 7. Watchdog Timing Relationship
Figure 8. Ensuring RESET Valid to VCC = 0 on Active-Low
Push/Pull and Bidirectional Outputs
Applications Information
Watchdog Input Current
The WDI input is internally driven through a buffer and
series resistor from the watchdog counter. For minimum
watchdog input current (minimum overall power consumption), leave WDI low for the majority of the watchdog timeout period. When high, WDI can draw as much
as 160µA. Pulsing WDI high at a low duty cycle will
reduce the effect of the large input current. When WDI
is left unconnected, the watchdog timer is serviced
within the watchdog timeout period by a low-high-low
pulse from the counter chain.
Negative-Going VCC Transients
These supervisors are immune to short-duration, negative-going VCC transients (glitches), which usually do
not require the entire system to shut down. Typically,
200ns large-amplitude pulses (from ground to VCC) on
the supply will not cause a reset. Lower amplitude pulses result in greater immunity. Typically, a VCC transient
that goes 100mV under the reset threshold and lasts
less than 4µs will not trigger a reset. An optional 0.1µF
bypass capacitor mounted close to VCC provides additional transient immunity.
Ensuring Valid Reset Outputs
Down to VCC = 0
The MAX6316_/MAX6317H/MAX6318_H/MAX6319_H/
MAX6321HP/MAX6322HP are guaranteed to operate
properly down to VCC = 1V. In applications that require
valid reset levels down to VCC = 0, a pull-down resistor
to active-low outputs (push/pull and bidirectional only,
Figure 8) and a pull-up resistor to active-high outputs
(push/pull only, Figure 9) will ensure that the reset line
is valid while the reset output can no longer sink or
10
MAX6317
MAX6318
MAX6319
MAX6321*
MAX6322* VCC
GND
VCC
100k
RESET
*THIS SCHEMATIC DOES NOT WORK ON THE OPEN-DRAIN
OUTPUTS OF THE MAX6321/MAX6322.
Figure 9. Ensuring RESET Valid to VCC = 0 on Active-High
Push/Pull Outputs
source current. This scheme does not work with the
open-drain outputs of the MAX6320/MAX6321/MAX6322.
The resistor value used is not critical, but it must be
large enough not to load the reset output when VCC is
above the reset threshold. For most applications,
100kΩ is adequate.
Watchdog Software Considerations
(MAX6316/MAX6317/MAX6318/
MAX6320/MAX6321)
One way to help the watchdog timer monitor software
execution more closely is to set and reset the watchdog
input at different points in the program, rather than
pulsing the watchdog input high-low-high or low-highlow. This technique avoids a stuck loop, in which the
watchdog timer would continue to be reset inside the
loop, keeping the watchdog from timing out.
______________________________________________________________________________________
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
MAX6316–MAX6322
Figure 10 shows an example of a flow diagram where
the I/O driving the watchdog input is set high at the
beginning of the program, set low at the end of every
subroutine or loop, then set high again when the program returns to the beginning. If the program should
hang in any subroutine, the problem would be quickly
corrected, since the I/O is continually set low and the
watchdog timer is allowed to time out, causing a reset
or interrupt to be issued. As described in the Watchdog
Input Current section, this scheme results in higher time
average WDI current than does leaving WDI low for the
majority of the timeout period and periodically pulsing it
low-high-low.
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
POSSIBLE
INFINITE LOOP PATH
SET WDI LOW
RETURN
Figure 10. Watchdog Flow Diagram
__________________Pin Configurations
Typical Operating Circuit
TOP VIEW
RESET 1
GND 2
5 VCC
MAX6316
MAX6320
MR 3
RESET 1
GND 2
4 WDI
GND 2
MAX6318
MAX6321
RESET 3
4 WDI
SOT23-5
RESET
RESET
µP
MAX6316
4 WDI
RESET 1
GND 2
VCC
VCC
MANUAL
RESET
SOT23-5
5 VCC
VIN
MAX6317
MR 3
SOT23-5
RESET 1
5 VCC
MR
GND
WDI
I/O
GND
5 VCC
MAX6319
MAX6322
RESET 3
4 MR
SOT23-5
______________________________________________________________________________________
11
MAX6316–MAX6322
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
Table 1. Factory-Trimmed Reset Thresholds
PART
MIN
4.925
7.827
4.728
4.630
4.561
4.433
4.314
4.236
4.137
4.039
3.940
3.842
3.743
3.645
3.546
3.448
3.349
3.251
3.152
3.034
2.955
2.886
2.758
2.660
2.591
2.463
MAX63___50_ _-T
MAX63___49_ _-T
MAX63___48_ _-T
MAX63___47_ _-T
MAX63___46_ _-T
MAX63___45_ _-T
MAX63___44_ _-T
MAX63___43_ _-T
MAX63___42_ _-T
MAX63___41_ _-T
MAX63___40_ _-T
MAX63___39_ _-T
MAX63___38_ _-T
MAX63___37_ _-T
MAX63___36_ _-T
MAX63___35_ _-T
MAX63___34_ _-T
MAX63___33_ _-T
MAX63___32_ _-T
MAX63___31_ _-T
MAX63___30_ _-T
MAX63___29_ _-T
MAX63___28_ _-T
MAX63___27_ _-T
MAX63___26_ _-T
MAX63___25_ _-T
TA = +25°C
TYP
5.000
4.900
4.800
4.700
4.630
4.500
4.390
4.300
4.200
4.100
4.000
3.900
3.800
3.700
3.600
3.500
3.400
3.300
3.200
3.080
3.000
2.930
2.800
2.700
2.630
2.500
MAX
5.075
4.974
4.872
4.771
4.699
4.568
4.446
4.365
4.263
4.162
4.060
3.959
3.857
3.756
3.654
3.553
3.451
3.350
3.248
3.126
3.045
2.974
2.842
2.741
2.669
2.538
TA = -40°C to +85°C
MIN
MAX
4.875
5.125
4.778
5.023
4.680
4.920
4.583
4.818
4.514
4.746
4.388
4.613
4.270
4.490
4.193
4.408
4.095
4.305
3.998
4.203
3.900
4.100
3.803
3.998
3.705
3.895
3.608
3.793
3.510
3.690
3.413
3.588
3.315
3.485
3.218
3.383
3.120
3.280
3.003
3.157
2.925
3.075
2.857
3.000
2.730
2.870
2.633
2.768
2.564
2.696
2.438
2.563
Table 2. Standard Versions
RESET
THRESHOLD
(V)
MINIMUM RESET
TIMEOUT
(ms)
TYPICAL
WATCHDOG
TIMEOUTS (sec)
SOT
TOP MARK
MAX6316LUK46CY-T
4.63
140
1.6
ACDD
MAX6316LUK29CY-T
2.93
140
1.6
ACDE
MAX6316MUK46CY-T
4.63
140
1.6
ACDF
MAX6316MUK29CY-T
2.93
140
1.6
ACDG
MAX6317HUK46CY-T
4.63
140
1.6
ACDQ
MAX6318LHUK46CY-T
4.63
140
1.6
ACDH
MAX6319LHUK46C-T†
4.63
140
—
ACDK
MAX6320PUK46CY-T
4.63
140
1.6
ACDN
MAX6320PUK29CY-T
2.93
140
1.6
ACDO
PART
Note: Nine standard versions are available, with a required order increment of 2500 pieces. Sample stock is generally held on standard
versions only. The required order increment for nonstandard versions is 10,000 pieces. Contact factory for availability.
†Contact factory for availability of these versions.
12
______________________________________________________________________________________
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
RESET TIMEOUT PERIODS
SUFFIX
MIN
TYP
MAX
A
1
1.6
2
B
20
30
40
C
140
200
280
D
1.12
1.60
2.24
UNITS
ms
sec
WATCHDOG TIMEOUT
W
4.3
6.3
9.3
X
71
102
153
Y
1.12
1.6
2.4
Z
17.9
25.6
38.4
ms
sec
__Ordering Information (continued)
PART
TEMP. RANGE
PIN-PACKAGE
MAX6319LHUK____-T
-40°C to +85°C
5 SOT23-5
MAX6319MHUK____-T
-40°C to +85°C
5 SOT23-5
MAX6320PUK____-T
-40°C to +85°C
5 SOT23-5
MAX6321HPUK____-T
-40°C to +85°C
5 SOT23-5
MAX6322HPUK____-T
-40°C to +85°C
5 SOT23-5
Note: These devices are available with factory-set VCC reset
thresholds from 2.5V to 5V, in 0.1V increments. Insert the
desired nominal reset threshold (25 to 50, from Table 1) into the
blanks following the letters UK. All devices offer factory-programmed reset timeout periods. Insert the letter corresponding
to the desired reset timeout period (A, B, C, or D from Table 3)
into the blank following the reset threshold suffix. Parts that offer
a watchdog feature (see Selector Guide) are factory-trimmed to
one of four watchdog timeout periods. Insert the letter corresponding to the desired watchdog timeout period (W, X, Y, or Z
from Table 3) into the blank following the reset timeout suffix.
Chip Information
TRANSISTOR COUNT: 191
SUBSTRATE IS INTERNALLY CONNECTED TO V+
______________________________________________________________________________________
13
MAX6316–MAX6322
Table 3. Reset/Watchdog Timeout Periods
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
SOT5L.EPS
MAX6316–MAX6322
Package Information
14
______________________________________________________________________________________
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
______________________________________________________________________________________
MAX6316–MAX6322
NOTES
15
5-Pin µP Supervisory Circuits with
Watchdog and Manual Reset
MAX6316–MAX6322
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.