MAXIM MAX6818

19-4770; Rev 1; 1/99
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
The MAX6816/MAX6817/MAX6818 are single, dual, and
octal switch debouncers that provide clean interfacing
of mechanical switches to digital systems. They accept
one or more bouncing inputs from a mechanical switch
and produce a clean digital output after a short, preset
qualification delay. Both the switch opening bounce
and the switch closing bounce are removed. Robust
switch inputs handle ±25V levels and are ±15kV ESDprotected for use in harsh industrial environments. They
feature single-supply operation from +2.7V to +5.5V.
Undervoltage lockout circuitry ensures the output is in
the correct state upon power-up.
The single MAX6816 and dual MAX6817 are offered in
SOT packages and require no external components.
Their low supply current makes them ideal for use in
portable equipment.
The MAX6818 octal switch debouncer is designed for
data-bus interfacing. The MAX6818 monitors switches
and provides a switch change-of-state output (CH),
simplifying microprocessor (µP) polling and interrupts.
Additionally, the MAX6818 has three-state outputs controlled by an enable (EN) pin, and is pin-compatible
with the ‘LS573 octal latch (except for the CH pin),
allowing easy interfacing to a digital data bus.
Applications
µP Switch Interfacing
Industrial Instruments
Features
♦ Robust Inputs can Exceed Power Supplies
up to ±25V
♦ ESD Protection for Input Pins
±15kV—Human Body Model
±8kV—IEC 1000-4-2, Contact Discharge
±15kV—IEC 1000-4-2, Air-Gap Discharge
♦ Small SOT Packages (4 and 6 pins)
♦ Single-Supply Operation from +2.7V to +5.5V
♦ Single (MAX6816), Dual (MAX6817), and Octal
(MAX6818) Versions Available
♦ No External Components Required
♦ 6µA Supply Current
♦ Three-State Outputs for Directly Interfacing
Switches to µP Data Bus (MAX6818)
♦ Switch Change-of-State Output Simplifies
Polling and Interrupts (MAX6818)
♦ Pin-Compatible with ’LS573 (MAX6818)
Ordering Information
PART
TEMP. RANGE
PINSOT
PACKAGE TOP MARK
MAX6816EUS-T
-40°C to +85°C
4 SOT143
KABA
MAX6817EUT-T -40°C to +85°C 6 SOT23-6
AAAU
MAX6818EAP
-40°C to +85°C 20 SSOP
—
Note: There is a minimum order increment of 2500 pieces for
SOT packages.
PC-Based Instruments
Portable Instruments
Automotive Applications
Membrane Keypads
Pin Configurations
Typical Operating Circuit
TOP VIEW
VCC
GND
4
VCC
3
OUT
MAX6816
MAX6816
MECHANICAL
SWITCH
1
µP
0.1µF
IN
OUT
GND
DEBOUNCED
OUTPUT
RESET
IN
2
SOT143
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
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For small orders, phone 1-800-835-8769.
MAX6816/MAX6817/MAX6818
General Description
MAX6816/MAX6817/MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
ABSOLUTE MAXIMUM RATINGS
Continuous Power Dissipation (TA = +70°C)
4-Pin SOT143 (derate 4.0mW/°C above +70°C)..........320mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C)............691mW
20-Pin SSOP (derate 8.0mW/°C above +70°C) ...........640mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Voltage (with respect to GND)
VCC .......................................................................-0.3V to +6V
IN_ (Switch Inputs) ..............................................-30V to +30V
EN.........................................................................-0.3V to +6V
OUT_, CH ...............................................-0.3V to (VCC + 0.3V)
OUT Short-Circuit Duration
(One or Two Outputs to GND)....................................Continuous
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Operating Voltage Range
VCC
Supply Current
ICC
Debounce Duration
tDP
CONDITIONS
MIN
TYP
2.7
VCC = 5V, IOUT = 0, IN_ = VCC
VIH
5.5
V
20
µA
MAX6818
20
40
60
MAX6816/MAX6817
20
50
80
VCC = 5V
2.4
VCC = 2.7V
2.0
0.8
Input Hysteresis
32
IN Input Current
IIN
Input Voltage Range
VIN
EN Pulse Width
-25
1.9
VOL
ISINK = 1.6mA
VOH
ISOURCE = 0.4mA
tEN
EN Threshold
EN Input Current
IIL
EN Low to Out Active
Propagation Delay
tPE
EN High to Out Three-State
Propagation Delay
EN Low to CH Out High
Propagation Delay
OUT_ Three-State Leakage Current
63
VIN = ±15V
Undervoltage-Lockout Threshold
ms
V
V
300
Input Pull-Up Resistance
OUT_, CH Output Voltage
UNITS
6
VIL
Input Threshold
MAX
mV
100
kΩ
±1
mA
25
V
2.6
V
0.4
VCC - 1.0
200
V
ns
VCC = 5V
0.8
1.7
2.4
VCC = 2.7V
0.8
1.1
2.0
V
±1
µA
RL = 10kΩ, CL = 100pF
100
ns
tPD
RL = 1kΩ, CL = 15pF
100
ns
tPC
RL = 10kΩ, CL = 50pF
100
ns
VOUT = 0 or VCC
±10
µA
ESD CHARACTERISTICS
ESD Protection
IN_
IEC1000-4-2 Air Discharge
±15
IEC1000-4-2 Contact Discharge
±8
Human Body Model
±15
Note 1: MAX6816 and MAX6817 production testing is done at TA = +25°C; over-temperature limits are guaranteed by design.
2
_______________________________________________________________________________________
kV
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
DEBOUNCE OF CLOSING SWITCH
MAX6816 TOC03
MAX6816 TOC01
VCC = 5V
6
VCC = 3V
2
1
5V
-5V
-5V
4V
4V
OUT (2V/div)
3
0
OUT (2V/div)
IN (5V/div)
4
IN (5V/div)
5V
5
VCC = 5V
0
VCC = 5V
0
-25
0
25
50
75
10ms/div
100
10ms/div
TEMPERATURE (°C)
MAX6818 EN INPUT LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
OUTPUT LOGIC LEVEL
vs. SUPPLY VOLTAGE
VOH, ISOURCE = 0.4mA
4
LOGIC THRESHOLD (V)
5
4
3
2
MAX6816 toc05
5
MAX6816 toc04
6
OUTPUT LOGIC LEVEL (V)
3
2
1
1
VOL, ISINK = 1.6mA
0
0
2
3
4
5
2
6
3
4
5
6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
DEBOUNCE DELAY PERIOD
vs. TEMPERATURE
VCC UNDERVOLTAGE LOCKOUT
vs. TEMPERATURE
45
VCC = 3V
40
VCC = 5V
35
MAX6816 toc07
5
VCC UNDERVOLTAGE LOCKOUT (V)
50
MAX6816 toc06
-50
DEBOUNCE DELAY PERIOD (ms)
SUPPLY CURRENT (µA)
DEBOUNCE OF OPENING SWITCH
MAX6816 TOC02
SUPPLY CURRENT vs. TEMPERATURE
7
4
3
2
1
0
30
-50
-25
0
25
50
TEMPERATURE (°C)
75
100
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
_______________________________________________________________________________________
3
MAX6816/MAX6817/MAX6818
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
MAX6816/MAX6817/MAX6818
Pin Description
PIN
NAME
FUNCTION
MAX6816
MAX6817
MAX6818
1
2
10
GND
2
—
—
IN
Switch Input
—
1, 3
—
IN1, IN2
Switch Inputs
—
—
2–9
IN1–IN8
Switch Inputs
3
—
—
OUT
CMOS Debounced Output
—
4, 6
—
OUT2, OUT1
CMOS Debounced Outputs
—
—
12–19
OUT8–OUT1
CMOS Debounced Outputs
4
5
20
VCC
+2.7V to +5.5V Supply Voltage
—
—
1
EN
Active-Low, Three-State Enable Input for outputs. Resets CH.
Tie to GND to “always enable” outputs.
—
—
11
CH
Change-of-State Output. Goes low on switch input change of
state. Resets on EN. Leave unconnected if not used.
Ground
D
VCC
VCC
D
VCC
OSC.
COUNTER
Q
Q
OUT
LOAD
R
RPU
UNDERVOLTAGE
LOCKOUT
IN
ESD
PROTECTION
MAX6816
MAX6817
MAX6818
Figure 1. Block Diagram
_______________Detailed Description
Theory of Operation
The MAX6816/MAX6817/MAX6818 are designed to
eliminate the extraneous level changes that result from
interfacing with mechanical switches (switch bounce).
Virtually all mechanical switches bounce upon opening
or closing. These switch debouncers remove bounce
when a switch opens or closes by requiring that
sequentially clocked inputs remain in the same state for
a number of sampling periods. The output does not
change until the input is stable for a duration of 40ms.
The circuit block diagram (Figure 1) shows the functional blocks consisting of an on-chip oscillator,
counter, exclusive-NOR gate, and D flip-flop. When the
4
input does not equal the output, the XNOR gate issues
a counter reset. When the switch input state is stable
for the full qualification period, the counter clocks the
flip-flop, updating the output. Figure 2 shows the typical
opening and closing switch debounce operation. On
the MAX6818, the change output (CH) is updated
simultaneously with the switch outputs.
Undervoltage Lockout
The undervoltage lockout circuitry ensures that the outputs are at the correct state on power-up. While the supply voltage is below the undervoltage threshold
(typically 1.9V), the debounce circuitry remains transparent. Switch states are present at the logic outputs
without delay.
_______________________________________________________________________________________
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
EN
tEN
IN1
1/2 VCC
1/2 VCC
tPE
OUT1–OUT8
OUT1
1/2 VCC
tPE
OUT1–OUT8
IN2
tPD
OUT NORMALLY
LOW
VOL + 0.5V
1/2 VCC OUT NORMALLY
VOH - 0.5V
HIGH
tPC
CH
OUT2
MAX6816/MAX6817/MAX6818
tDP
tPD
1/2 VCC
Figure 4. MAX6818 µP-Interface Timing Diagram
CH
+VCC
MAX6818 ONLY
+VCC
0.1µF
Figure 2. Input Characteristics
SW1
IN1
20V
IN
(20V/div)
EN
I/O
CH
IRQ
OUT1
D0
OUT8
D7
µP
MAX6818
0
-20V
IN8
SW8
4V
OUT
(2V/div)
Figure 5. MAX6818 Typical µP Interfacing Circuit
0
20ms/div
Figure 3. Switch Input ±25V Fault Tolerance
Robust Switch Inputs
The switch inputs on the MAX6816/MAX6817/MAX6818
have overvoltage clamping diodes to protect against
damaging fault conditions. Switch input voltages
can safely swing ±25V to ground (Figure 3). Proprietary
ESD-protection structures protect against high
ESD encountered in harsh industrial environments,
membrane keypads, and portable applications.
They are designed to withstand ±15kV per the
IEC1000-4-2 Air Gap Discharge Test and ±8kV per the
IEC1000-4-2 Contact Discharge Test.
Since there are 63kΩ (typical) pull-up resistors connected to each input, driving an input to -25V will draw
approximately 0.5mA (up to 4mA for eight inputs) from
the VCC supply. Driving an input to +25V will cause
approximately 0.32mA of current (up to 2.6mA for eight
inputs) to flow back into the VCC supply. If the total system VCC supply current is less than the current flowing
back into the VCC supply, VCC will rise above normal
levels. In some low-current systems, a zener diode on
VCC may be required.
±15kV ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electrostatic discharges encountered during handling and
assembly. The MAX6816/MAX6817/MAX6818 have
extra protection against static electricity. Maxim's engineers have developed state-of-the-art structures to protect against ESD of ±15kV at the switch inputs without
_______________________________________________________________________________________
5
RC 1M
CHARGE-CURRENT
LIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
RD 1500Ω
RC 50M to 100M
DISCHARGE
RESISTANCE
CHARGE CURRENT
LIMIT RESISTOR
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
Figure 6a. Human Body ESD Test Model
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
RD 330Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
Figure 7a. IEC1000-4-2 ESD Test Model
I
IP 100%
90%
Ir
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
100%
90%
AMPERES
36.8%
I PEAK
MAX6816/MAX6817/MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
10%
0
0
tRL
TIME
tDL
CURRENT WAVEFORM
10%
Figure 6b. Human Body Current Waveform
t r = 0.7ns to 1ns
damage. The ESD structures withstand high ESD in all
states: normal operation, shutdown, and powered
down. After an ESD event, the MAX6816/MAX6817/
MAX6818 keep working without latchup, whereas other
solutions can latch and must be powered down to
remove latchup.
ESD protection can be tested in various ways; these
products are characterized for protection to the following limits:
1) ±15kV using the Human Body Model
2) ±8kV using the Contact-Discharge method specified
in IEC1000-4-2
3) ±15kV using IEC1000-4-2’s Air-Gap method.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
6
t
30ns
60ns
Figure 7b. IEC1000-4-2 ESD Generator Current Waveform
Human Body Model
Figure 6a shows the Human Body Model and Figure 6b
shows the current waveform it generates when discharged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device
through a 1.5kΩ resistor.
IEC1000-4-2
The IEC1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically
refer to integrated circuits. The MAX6816/
MAX6817/MAX6818 help you design equipment that
_______________________________________________________________________________________
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
The major difference between tests done using the
Human Body Model and IEC1000-4-2 is higher peak
current in IEC1000-4-2, because series resistance is
lower in the IEC1000-4-2 model. Hence, the ESD withstand voltage measured to IEC1000-4-2 is generally
lower than that measured using the Human Body
Model. Figure 7a shows the IEC1000-4-2 model and
Figure 7b shows the current waveform for the 8kV,
IEC1000-4-2, Level 4, ESD Contact-Discharge test.
The Air-Gap test involves approaching the device with
a charged probe. The Contact-Discharge method
connects the probe to the device before the probe is
energized.
Machine Model
The Machine Model for ESD tests all pins using a
200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing.
MAX6818 µP Interfacing
The MAX6818 has an output enable (EN) input that
allows switch outputs to be three-stated on the µP data
bus until polled by the µP. Also, state changes at the
switch inputs are detected, and an output (CH) goes low
after the debounce period to signal the µP. Figure 4
shows the timing diagram for enabling outputs and reading data. If the output enable is not used, tie EN to GND
to “always enable’’ the switch outputs. If EN is low, CH is
always high. If a change of state is not required, leave
CH unconnected.
Pin Configurations (continued)
TOP VIEW
IN1 1
GND 2
6
MAX6817
IN2 3
SOT23-6
OUT1
EN 1
20 VCC
IN1 2
19 OUT1
IN2 3
18 OUT2
IN3 4
IN4 5
5
VCC
4
OUT2
17 OUT3
MAX6818
16 OUT4
IN5 6
15 OUT5
IN6 7
14 OUT6
IN7 8
13 OUT7
IN8 9
12 OUT8
GND 10
11 CH
SSOP
___________________Chip Information
MAX6816 TRANSISTOR COUNT: 284
MAX6817 TRANSISTOR COUNT: 497
MAX6818 TRANSISTOR COUNT: 2130
SUBSTRATE CONNECTED TO GND
_______________________________________________________________________________________
7
MAX6816/MAX6817/MAX6818
meets Level 4 (the highest level) of IEC1000-4-2, without the need for additional ESD-protection components.
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
SOT1434.EPS
MAX6816/MAX6817/MAX6818
Package Information
8
_______________________________________________________________________________________
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
6LSOT.EPS
_______________________________________________________________________________________
9
MAX6816/MAX6817/MAX6818
Package Information (continued)
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
SSOP.EPS
MAX6816/MAX6817/MAX6818
Package Information (continued)
10
______________________________________________________________________________________
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
MAX6816/MAX6817/MAX6818
NOTES
______________________________________________________________________________________
11
MAX6816/MAX6817/MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.