74V1T80 SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1T80 is an advanced high-speed CMOS SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP WITH INVERTED OUTPUT fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. it is designed to operate from 4.5V to 5.5V, making this device ideal for portable applications. This D-Type flip-flop is controlled by a clock input (CK). On the positive transition of the clock, the Q output will be set to the logic inverted state that was setup at the D input. SOT23-5L SOT323-5L ORDER CODES PACKAGE T&R SOT23-5L SOT323-5L 74V1T80STR 74V1T80CTR Following the hold time interval, data at the D input can be changed without affecting the level at the output. Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V. It’s available in the commercial temperature range. All inputs and output are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/9 74V1T80 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 D 2 CK 4 3 Q GND VCC Data Input Clock Input (Positive Edge) Inverted Flip-Flop Output Ground (0V) 5 Positive Supply Voltage TRUTH TABLE D CK Q L H H L L Qn H Qn ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 V DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time (note 1) (VCC = 5.0 ± 0.5V) 1) VIN from 0.8V to 2V 2/9 Value Unit 4.5 to 5.5 V 0 to 5.5 V 0 to VCC V -55 to 125 °C 0 to 20 ns/V 74V1T80 DC SPECIFICATIONS Test Condition Symbol VIH Parameter TA = 25°C VCC (V) Min. High Level Input Voltage Low Level Input Voltage High Level Output Voltage 4.5 to 5.5 4.5 to 5.5 VOL Low Level Output Voltage 4.5 IO=8 mA II Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current 0 to 5.5 VI = 5.5V or GND 5.5 5.5 VIL VOH ICC ICC Value Typ. Max. 2 -40 to 85°C -55 to 125°C Min. Min. 2 0.8 4.5 IO=-50 µA 4.4 4.5 IO=-8 mA 3.94 4.5 IO=50 µA Max. 4.5 4.4 0.1 V 0.8 4.4 3.8 0.0 Max. 2 0.8 Unit V V 3.7 0.1 0.1 V 0.36 0.44 0.55 ± 0.1 ± 1.0 ± 1.0 µA VI = VCC or GND 1 10 20 µA One Input at 3.4V, other input at VCC or GND 1.35 1.5 1.5 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time CK to Q tW ts th fMAX CK Pulse Width, HIGH or LOW Setup Time D to CK, HIGH or LOW Hold Time D to CK, HIGH or LOW Maximum Clock Frequency VCC (V) CL (pF) 5.0 (*) 5.0 (*) 5.0 (*) 15 50 50 5.0 (*) Value TA = 25°C Min. -40 to 85°C -55 to 125°C Unit Typ. Max. Min. Max. Min. Max. 4.9 5.9 8.4 12.0 9.8 14.0 1.0 1.0 4.0 10.8 15.0 4.0 1.0 1.0 4.0 50 4.0 4.0 4.0 ns 5.0 (*) 50 1.0 1.0 1.0 ns 5.0 (*) 50 150 150 165 180 ns ns MHz (*) Voltage range is 5.0V ± 0.5V CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Typ. Max. CIN Input Capacitance Min. 4 10 CPD Power Dissipation Capacitance (note 1) 8 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 3/9 74V1T80 TEST CIRCUIT CL = 15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM: PROPAGATION DELAY, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 4/9 74V1T80 SOT23-5L MECHANICAL DATA mm. mils DIM. MIN. TYP MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 2.60 3.00 102.3 118.1 E1 1.50 1.75 59.0 68.8 e 0.95 37.4 e1 1.9 74.8 L 0.35 0.55 13.7 21.6 5/9 74V1T80 SOT323-5L MECHANICAL DATA mm. mils DIM. MIN. MAX. MIN. TYP. MAX. A 0.80 1.10 31.5 43.3 A1 0.00 0.10 0.0 3.9 A2 0.80 1.00 31.5 39.4 b 0.15 0.30 5.9 11.8 C 0.10 0.18 3.9 7.1 D 1.80 2.20 70.9 86.6 E 1.80 2.40 70.9 94.5 E1 1.15 1.35 45.3 53.1 e 0.65 25.6 e1 1.3 51.2 L 6/9 TYP 0.10 0.30 3.9 11.8 74V1T80 Tape & Reel SOT23-xL MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. 180 13.0 7.086 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 MAX. 0.504 0.512 14.4 0.519 0.567 Ao 3.13 3.23 3.33 0.123 0.127 0.131 Bo 3.07 3.17 3.27 0.120 0.124 0.128 Ko 1.27 1.37 1.47 0.050 0.054 0.0.58 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 3.9 4.0 4.1 0.153 0.157 0.161 7/9 74V1T80 Tape & Reel SOT323-xL MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 175 180 185 6.889 7.086 7.283 C 12.8 13 13.2 0.504 0.512 0.519 D 20.2 N 59.5 0.795 60 T 8/9 60.5 2.362 14.4 0.567 Ao 2.25 0.088 Bo 2.7 0.106 Ko 1.2 0.047 Po 3.98 4 4.2 0.156 0.157 0.165 P 3.98 4 4.2 0.156 0.157 0.165 74V1T80 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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