19-3037; Rev 1; 11/04 High-Bandwidth, Quad DPDT Switches The MAX4760/MAX4761 (DPDT) analog switches operate from a single +1.8V to +5.5V supply. These switches feature a low 25pF capacitance for high-speed data switching applications. The MAX4760 is a quad double-pole/double-throw (DPDT) switch and the MAX4761 is an octal singlepole/double-throw (SPDT) switch. They have eight 3.5Ω on-resistance, low-capacitance switches to route audio and data signals. The MAX4760 has 4 logic inputs to control the switches in pairs. The MAX4761 has one logic control input and an enable input (EN) to disable the switches. The MAX4760/MAX4761 are available in a small 36-pin (6mm x 6mm) thin QFN and 36-bump (3mm x 3mm) chip-scale package (UCSP™). Features ♦ USB 1.1 and USB 2.0 (Full Speed) SignalSwitching Compliant ♦ Data and Audio Signal Routing ♦ Low-Capacitance (25pF) Data Switches ♦ Less than 0.2ns Skew ♦ -3dB Bandwidth: 325MHz ♦ 0.2Ω Channel-to-Channel Matching ♦ 0.8Ω On-Resistance Flatness ♦ Rail-to-Rail Signal Handling ♦ 0.03% THD ♦ +1.8V to +5.5V Supply Range ♦ Tiny 36-Bump UCSP (3mm x 3mm) ♦ 36-Pin Thin QFN (6mm x 6mm) Ordering Information Applications USB Signal Switching Audio-Signal Routing Cellular Phones PDAs/Hand-Held Devices Notebook Computers PART TEMP RANGE PIN-PACKAGE MAX4760EBX-T -40°C to +85°C 36 UCSP-36 MAX4760ETX -40°C to +85°C 36 Thin QFN (6mm x 6mm) MAX4761EBX-T -40°C to +85°C 36 UCSP-36 MAX4761ETX -40°C to +85°C 36 Thin QFN (6mm x 6mm) Functional Diagrams INA NO1 INA NO1 DATA 1 DATA 1 COM1 NC1 NO2 COM1 NC1 NO2 DATA 2 DATA 2 COM2 NC2 INB NO3 COM2 NC2 NO3 DATA 3 DATA 3 COM3 NC3 NO4 COM3 NC3 NO4 DATA 4 DATA 4 COM4 NC4 INC NO5 COM4 NC4 NO5 DATA 5 DATA 5 COM5 NC5 NO6 COM5 NC5 NO6 DATA 6 DATA 6 COM6 NC6 IND NO7 COM6 NC6 NO7 DATA 7 DATA 7 COM7 COM7 NC7 NO8 NC7 NO8 DATA 8 DATA 8 COM8 COM8 NC8 NC8 MAX4760 EN MAX4761 Pin Configurations/Functional Diagrams/Truth Table continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX4760/MAX4761 General Description MAX4760/MAX4761 High-Bandwidth, Quad DPDT Switches ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) V+, IN_, EN...............................................................-0.3V to +6V COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V) Continuous Current NO_, NC_, COM_ .......................................................±100mA Peak Current (pulsed at 1ms, 10% duty cycle)................................±200mA (pulsed at 1ms, 50% duty cycle)............................... ±300mA Continuous Power Dissipation (TA = +70°C) 36-Bump UCSP (derate 15.3mW/°C above +70°C).... 1221mW 36-Pin Thin QFN (derate 26.3mW/°C above +70°C)... 2105mW ESD per Method 3015.7.......................................................±2kV Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) ................................ +300°C Bump Temperature (soldering) Infrared (15s) ...............................................................+220°C Vapor Phase (60s) .......................................................+215°C Note 1: Signals on NO_, NC_, COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = +2.7V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at V+ = 3V, TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS TA MIN TMIN to TMAX 0 TYP MAX UNITS V+ V ANALOG SWITCH Analog Signal Range VCOM_, VNO_, VNC_ +25°C RON V+ = 2.7V, ICOM_ = 10mA, VNC_ or VNO_ = 0V or V+ ∆RON V+ = 2.7V, ICOM_ = 10mA, VNO_ or VNC_ = 1.5V TMIN to TMAX On-Resistance Flatness (Note 6) RFLAT(ON) V+ = 2.7V, ICOM_=10mA, VNC_ or VNO_ = 0V or V+ TMIN to TMAX NO_, NC_ Off-Leakage Current INO_(OFF), INC_(OFF) V+ = 3.6V; VCOM_ = 3.3V, 0.3V; VNO_ or VNC_ = 0.3V, 3.3V On-Resistance (Note 4) On-Resistance Match Between Channels (Notes 4, 5) COM_ Off-Leakage Current COM_ On-Leakage Current ICOM_(ON) 2.0 TMIN to TMAX 3.5 4 +25°C 0.2 0.4 0.55 +25°C 0.8 1.5 1.8 +25°C -5 +5 TMIN to TMAX -25 +25 Ω Ω Ω nA V+ = 3.6V (MAX4761); VCOM_ = 3.3V, 0.3V; VNO_ or VNC_ = 0.3V, 3.3V +25°C -5 0.01 +5 TMIN to TMAX -25 V+ = 3.6V; VCOM_ = 3.3V, 0.3V; VNO_ or VNC_ = 3.3V, 0.3V or floating +25°C -5 +5 TMIN to TMAX -25 +25 +25 nA nA DYNAMIC +25°C Turn-On Time tON VNO_ or VNC_ = 1.5V; RL = 50Ω; CL = 35pF, Figure 2 TMIN to TMAX Turn-Off Time tOFF V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50Ω; CL = 35pF, Figure 2 TMIN to TMAX 2 +25°C 45 140 150 25 _______________________________________________________________________________________ 50 60 ns ns High-Bandwidth, Quad DPDT Switches (V+ = +2.7V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at V+ = 3V, TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL Break-Before-Make (Note 7) tBBM Skew (Note 7) tSKEW CONDITIONS V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50Ω, CL = 35pF, Figure 3 TA MIN +25°C TMIN to TMAX TYP MAX 15 UNITS ns 2 RS = 39Ω, CL = 50pF, Figure 4 +25°C 0.2 VGEN = 0V, RGEN = 0, CL = 1.0nF, Figure 5 +25°C 15 pC BW Signal = 0dBm, CL = 5pF, RL = 50Ω +25°C 320 MHz Off-Isolation (Note 8) VISO CL = 5pF, RL = 50Ω, VCOM_ = 1VP-P, f = 100kHz, Figure 6 +25°C 100 dB Crosstalk (Note 9) VCT CL = 5pF, RL = 50Ω, VCOM_ = 1VP-P, f = 100kHz, Figure 6 +25°C 95 dB Total Harmonic Distortion THD f = 20Hz to 20kHz, 1VP-P, RL = 600Ω +25°C 0.03 % Charge Injection Q On-Channel -3dB Bandwidth 0.5 ns NO_, NC_ Off-Capacitance CNO_(OFF), CNC_(OFF) VNO_, VNC_ = GND, f = 1MHz, Figure 7 +25°C 25 pF COM_ On-Capacitance CCOM(ON) VNO_, VNC_ = GND, f = 1MHz, Figure 7 +25°C 54 pF COM_ Off-Capacitance CCOM(OFF) VCOM_ = GND, f = 1MHz (MAX4761), Figure 7 +25°C 25 pF DIGITAL I/O (IN_, EN) Input Logic High VIH Input Logic Low VIL Input Leakage Current IIN V+ = 2.7V to 3.6V TMIN to TMAX 1.4 V+ = 3.6V to 5.5V TMIN to TMAX 2.0 V+ = 2.7V to 3.6V TMIN to TMAX 0.5 V+ = 3.6V to 5.5V TMIN to TMAX 0.6 VIN = 0 or V+ TMIN to TMAX 1 µA 5.5 V V V POWER SUPPLY Power-Supply Range V+ Positive Supply Current I+ TMIN to TMAX V+ = 5.5V, VIN_ = 0V or V+ +25°C TMIN to TMAX 1.8 0.01 1.0 µA Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. Note 3: UCSP packages are 100% tested at +25°C and limits across the full temperature range are guaranteed by correlation and design. Thin QFN packages are 100% tested at +85°C and limits across the full temperature range are guaranteed by correlation and design. Note 4: RON and ∆RON matching specifications are guaranteed by design. Note 5: ∆RON = RON(MAX) - RON(MIN). Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 7: Guaranteed by design, not production tested. Note 8: Off-isolation = 20log10 [VCOM_ / (VNO_ or VNC_)], VCOM_ = output, VNO_ or VNC_ = input to off switch. Note 9: Between any two switches. _______________________________________________________________________________________ 3 MAX4760/MAX4761 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (V+ = 3V, TA = +25°C, unless otherwise noted.) V+ = 1.8V V+ = 3V 4 V+ = 2V 5 TA = +85°C 3 TA = +25°C 2 V+ = 2.3V V+ = 5V 4 RON (Ω) RON (Ω) RON (Ω) 7 6 5 MAX4760 toc02 9 8 5 MAX4760 toc01 10 ON-RESISTANCE vs. VCOM AND TEMPERATURE MAX4760 toc03 ON-RESISTANCE vs. VCOM AND TEMPERATURE ON-RESISTANCE vs. VCOM 3 TA = +85°C TA = +25°C 2 4 V+ = 2.7V 3 V+ = 5V TA = -40°C 1 1 2 TA = -40°C V+ = 3V 1 0 1.0 1.5 2.0 2.5 3.0 0 VCOM (V) NO/NC OFF-LEAKAGE CURRENT vs. TEMPERATURE COM ON-LEAKAGE CURRENT vs. TEMPERATURE COM OFF-LEAKAGE CURRENT vs. TEMPERATURE V+ = 3V 0.01 0.001 1 V+ = 5V 0.1 V+ = 3V 0.01 10 V+ = 3V/5V 60 85 -40 0.1 V+ = 3V 10 35 60 -40 85 -15 SUPPLY CURRENT vs. SUPPLY VOLTAGE CHARGE INJECTION vs. VCOM MAX4760 toc07 4.0 CL = 1nF 3.5 SUPPLY CURRENT (nA) 50 40 V+ = 5V V+ = 3V 20 10 35 60 85 TEMPERATURE (°C) TEMPERATURE (°C) 60 30 V+ = 5V SUPPLY CURRENT vs. TEMPERATURE 1000 3.0 2.5 2.0 1.5 MAX4760 toc09 TEMPERATURE (°C) -15 SUPPLY CURRENT (nA) 35 MAX4760 toc08 10 1 0.01 0.001 -15 MAX4760 toc06 MAX4760 toc05 V+ = 3V/5V COM OFF-LEAKAGE CURRENT (nA) V+ = 5V 0.1 10 COM ON-LEAKAGE CURRENT (nA) MAX4760 toc04 1 -40 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCOM (V) V+ = 3V/5V NO/NC OFF-LEAKAGE CURRENT (nA) 0.5 VCOM (V) 10 V+ = 5V 10 V+ = 3V 0.1 1.0 10 0.5 0 0 0 1 2 3 VCOM (V) 4 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 CHARGE INJECTION (pC) MAX4760/MAX4761 High-Bandwidth, Quad DPDT Switches 4 5 0.001 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) -40 -15 10 35 TEMPERATURE (°C) _______________________________________________________________________________________ 60 85 High-Bandwidth, Quad DPDT Switches 70 tON 60 tON, V+ = 3V 1.2 VIH VIL 0.8 50 50 tON/tOFF (ns) tON/tOFF (ns) 60 40 30 tOFF 20 0.4 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 tOFF, V+ = 3V 10 10 0 0 5.5 tOFF, V+ = 5V 1.5 2.0 2.5 SUPPLY CURRENT (V) 3.5 4.0 4.5 5.0 5.5 -40 SKEW vs. TEMPERATURE INPUT RISE/FALL TIME = 15ns CL = 50pF, FIGURE 3 V+ = 4.2V 500 85 0 ON-LOSS (dB) SKEW (ps) 60 ON-LOSS -40 CROSSTALK -60 -80 OFF-ISOLATION -100 100 100 -120 0 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -40 5.5 -15 10 35 60 85 TEMPERATURE (°C) SUPPLY VOLTAGE (V) -140 0.0001 0.01 1 100 FREQUENCY (MHz) TOTAL HARMONIC DISTORTION vs. FREQUENCY 1 MAX4760 toc16 1.5 THD (%) SKEW (ps) 300 200 200 35 20 -20 300 10 FREQUENCY RESPONSE 400 400 -15 TEMPERATURE (°C) 600 MAX4760 toc13 INPUT RISE/FALL TIME = 15ns CL = 50pF, FIGURE 3 500 3.0 SUPPLY VOLTAGE (V) SKEW vs. SUPPLY VOLTAGE 600 tON, V+ = 5V 30 20 MAX4760 toc14 1.5 40 MAX4760 toc15 1.6 70 MAX4760 toc11 80 MAX4760 toc10 2.0 LOGIC THRESHOLD (V) TURN-ON/OFF TIMES vs. TEMPERATURE TURN-ON/OFF TIME vs. SUPPLY VOLTAGE MAX4760 toc12 LOGIC THRESHOLD vs. SUPPLY VOLTAGE RL = 600Ω 0.1 0.01 10 100 1k 10k 100k FREQUENCY (Hz) _______________________________________________________________________________________ 5 MAX4760/MAX4761 Typical Operating Characteristics (continued) (V+ = 3V, TA = +25°C, unless otherwise noted.) High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761 Pin Description PIN MAX4760 6 THIN QFN MAX4761 NAME FUNCTION UCSP THIN QFN UCSP 1 A1 1 A1 NC1 2 B2 2 B2 COM2 3 A2 3 A2 NC2 Analog Switch 2, Normally Closed Terminal 2 4 A3 4 A3 INA Logic Control Digital Input for the MAX4760 Switch 1 and Switch 2. Digital control input for all MAX4761 switches. 5 C3, D4 5 C3, D4 V+ Positive Supply Voltage 6 A4 — — INB Logic Control Digital Input for Switches 3 and 4 7 A5 7 A5 NC3 Analog Switch 3, Normally Closed Terminal 3 8 B5 8 B5 COM3 Analog Switch 1, Normally Closed Terminal 1 Analog Switch 2, Common Terminal 2 Analog Switch 3, Common Terminal 2 9 A6 9 A6 NC4 10 B6 10 B6 COM4 Analog Switch 4, Normally Closed Terminal 4 11, 14, 17, 29, 32, 35 — 6, 11, 14, 17, 24, 29, 32, 35 A4, F3 N.C. No Connection. Not internally connected. 12 C5 12 C5 NO3 Analog Switch 3, Normally Open Terminal 3 13 C6 13 C6 NO4 Analog Switch 4, Normally Open Terminal 4 15 D6 15 D6 NO8 Analog Switch 8, Normally Open Terminal 8 16 D5 16 D5 NO7 Analog Switch 7, Normally Open Terminal 7 18 E6 18 E6 COM8 19 F6 19 F6 NC8 20 E5 20 E5 COM7 21 F5 21 F5 NC7 Analog Switch 7, Normally Closed Terminal 7 22 F4 — — IND Logic Control Digital Input for Switches 7 and 8 23 C4, D3 23 C4, D3 GND Ground 24 F3 — — INC Logic Control Digital Input for Switches 5 and 6 25 F2 25 F2 NC6 Analog Switch 6, Normally Closed Terminal 2 26 E2 26 E2 COM6 27 F1 27 F1 NC5 28 E1 28 E1 COM5 30 D2 30 D2 NO6 Analog Switch 6, Normally Open Terminal 6 31 D1 31 D1 NO5 Analog Switch 5, Normally Open Terminal 5 33 C1 33 C1 NO1 Analog Switch 1, Normally Open Terminal 1 34 C2 34 C2 NO2 Analog Switch 2, Normally Open Terminal 1 36 B1 36 B1 COM1 Analog Switch 4, Common Terminal 4 Analog Switch 8, Common Terminal 8 Analog Switch 8, Normally Closed Terminal 8 Analog Switch 7, Common Terminal 7 Analog Switch 6, Common Terminal 6 Analog Switch 5, Normally Closed Terminal 5 Analog Switch 5, Common Terminal 5 Analog Switch 1, Common Terminal 1 — — 22 F4 EN Output Enable, Active Low EP — EP — EP Exposed Pad, Connect to GND. _______________________________________________________________________________________ High-Bandwidth, Quad DPDT Switches The MAX4760 quad double-pole/double-throw (DPDT) and the MAX4761 octal single-pole/double-throw (SPDT) analog switches operate from a single +1.8V to +5.5V supply. These devices are fully specified for +3V applications. The MAX4760/MAX4761 have a guaranteed 3.5Ω (max) on-resistance to switch data or audio signals. The low 25pF capacitance and 0.2ns change in skew makes them ideal for data switching applications. The MAX4760 has 4 logic inputs to control two switches in pairs and the MAX4761 has one logic control input and an enable input (EN) to disable the switches. Applications Information Digital Control Inputs The MAX4760/MAX4761 logic inputs accept up to +5.5V regardless of the supply voltage. For example, with a +3.3V supply, IN_ can be driven low to GND and high to +5.5V, which allows mixed logic levels in a system. Driving the control logic inputs rail-to-rail also minimizes power consumption. For a +3V supply voltage, the logic thresholds are 0.5V (low) and 1.4V (high). For the MAX4761, drive EN low to enable. When EN is high, COM_ is high impedance. Analog Signal Levels Analog signal inputs over the full voltage range (0V to V+) are passed through the switch with minimal change in onresistance (see the Typical Operating Characteristics). The switches are bidirectional so NO_, NC_, and COM_ can be either inputs or outputs. Power-Supply Bypassing Power-supply bypassing improves noise margin and prevents switching noise from propagating from the V+ supply to other components. A 0.1µF capacitor connected from V+ to GND is adequate for most applications. POSITIVE SUPPLY V+ D1 MAX4760 MAX4761 NO COM GND Figure 1. Overvoltage Protection Using an External Blocking Diode Power-Supply Sequencing CMOS devices require proper power-supply sequencing. Always apply V+ before the analog signals, especially if the input signal is not current limited. If sequencing is not possible, and the input signal is not current limited to less than 20mA, add a small-signal diode (Figure 1). Adding the diode reduces the analog range to a diode drop (0.7V) below V+ and increases the on-resistance slightly. The maximum supply voltage must not exceed +6V at any time. UCSP Applications Information For the latest application details on UCSP construction, dimensions, tape carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, go to the Maxim website at www.maxim-ic.com/ucsp for the Application Note, “UCSP—A Wafer-Level Chip-Scale Package.” _______________________________________________________________________________________ 7 MAX4760/MAX4761 Detailed Description High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761 Timing Circuits/Timing Diagrams MAX4760 MAX4761 V+ VN_ LOGIC INPUT V+ COM_ NO_ OR NC_ 50% 0V VOUT RL t OFF CL IN_ VOUT GND LOGIC INPUT SWITCH OUTPUT ( 0.9 x V0UT 0.9 x VOUT 0V t ON CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL RL + RON VOUT = VN_ t r < 5ns t f < 5ns 50% V+ IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH. ) Figure 2. Switching Time V+ MAX4760 MAX4761 LOGIC INPUT V+ VN_ 50% 0V NC_ VOUT COM_ NO_ RL IN_ LOGIC INPUT V+ CL GND 0.9 x VOUT VOUT tBBM CL INCLUDES FIXTURE AND STRAY CAPACITANCE. Figure 3. Break-Before-Make Interval 8 _______________________________________________________________________________________ High-Bandwidth, Quad DPDT Switches tri 90% 50% A TxD+ B 10% INPUT A tskew_i CL Rs INPUT A- 90% 50% 10% tfi tro A- TxD- B- 10% OUTPUT B 90% 50% tskew_o CL Rs OUTPUT B- Rs = 39Ω CL = 50pF 90% 50% 10% tfo |tro - tri| DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS. |tfo - tfi| DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS. |tskew_o| CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS. |tskew_i| CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS. Figure 4. Input/Output Skew Timing Diagram V+ MAX4760 MAX4761 ∆VOUT V+ RGEN VOUT COM_ NC_ OR NO_ VOUT IN OFF CL V GEN GND ON OFF IN_ VIL TO VIH IN OFF ON OFF Q = (∆V OUT )(C L ) LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure 5. Charge Injection _______________________________________________________________________________________ 9 MAX4760/MAX4761 Timing Circuits/Timing Diagrams (continued) High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761 Timing Circuits/Timing Diagrams (continued) +5V 10nF OFF-ISOLATION = 20log ✕ VOUT VIN ON-LOSS = 20log ✕ VOUT VIN NETWORK ANALYZER 0V OR V+ IN_ NC1 V+ 50Ω CROSSTALK = 20log ✕ MAX4760 MAX4761 MEAS VOUT NO1* 50Ω 50Ω VIN COM1 GND REF 50Ω VOUT VIN 50Ω *FOR CROSSTALK THIS PIN IS NO2. NC2 AND COM2 ARE OPEN. MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND ON NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 6. On-Loss, Off-Isolation, and Crosstalk Typical Operating Circuit 10nF COM_ V+ INA NO1 V+ NC1 NO2 MAX4760 MAX4761 NC2 IN CAPACITANCE METER f = 1MHz NC_ or NO_ GND COM1 HEADPHONES RIGHT COM2 HEADPHONES LEFT VIL OR VIH INO NO7 COM7 SWITCHING DATA SIGNALS NC7 NO8 COM8 Figure 7. Channel On-/Off-Capacitance NC8 MAX4760 10 ______________________________________________________________________________________ High-Bandwidth, Quad DPDT Switches TOP VIEW MAX4760 NO2 NO3 NO4 COM5 NO1 28 COM4 N.C. COM3 29 COM2 NO6 COM1 30 NC4 NO5 NC3 31 INB N.C. INA 32 NC2 NO1 NC1 33 6 NO2 5 34 4 N.C. 3 35 2 COM1 1 36 (BUMP SIDE DOWN) A B V+ GND C NO5 NO6 GND V+ NO7 NO8 D COM5 COM6 COM7 COM8 E NC5 NC6 INC IND NC7 NC8 NC1 1 27 NC5 COM2 2 26 COM6 NC2 3 25 NC6 INA 4 24 INC V+ 5 23 GND INB 6 22 IND NC3 7 21 NC7 COM3 8 20 COM7 NC4 9 19 NC8 MAX4760 MAX4760 INA NO1/NO2 OFF LOW ON HIGH INB NO3/NO4 OFF LOW ON HIGH INC NO5/NO6 LOW OFF HIGH ON IND NO7/NO8 LOW OFF HIGH ON NC1/NC2 ON OFF NC3/NC4 ON OFF NC5/NC6 ON OFF NC7/NC8 ON OFF 10 11 12 13 14 15 16 17 18 N.C. NO3 NO4 N.C. NO8 NO7 N.C. COM8 UCSP COM4 F THIN QFN NOTE: EXPOSED PADDLE CONNECTED TO GND OR FLOATING. MAX4761 EN INA NO_ NC_ LOW LOW HIGH HIGH LOW HIGH X X OFF ON OFF OFF ON OFF OFF OFF ______________________________________________________________________________________ 11 MAX4760/MAX4761 Pin Configurations/Truth Tables High-Bandwidth, Quad DPDT Switches MAX4760/MAX4761 Pin Configurations/Truth Tables (continued) TOP VIEW MAX4761 COM5 28 COM4 N.C. COM3 29 COM2 NO6 COM1 30 NC4 NO5 NC3 31 N.C. N.C. INA 32 NC2 NO1 NC1 33 6 NO2 5 34 4 N.C. 3 35 2 COM1 1 36 (BUMP SIDE DOWN) A B NO1 NO2 V+ GND NO3 NO6 GND V+ NO7 NO8 D COM5 COM6 COM7 COM8 E NC5 NC6 N.C. EN NC7 1 27 NC5 COM2 2 26 COM6 NC2 3 25 NC6 INA 4 24 N.C. V+ 5 23 GND N.C. 6 22 EN NC3 7 21 NC7 COM3 8 20 COM7 NC4 9 19 NC8 NO4 C NO5 NC1 NC8 MAX4761 10 11 12 13 14 15 16 17 18 N.C. NO3 NO4 N.C. NO8 NO7 N.C. COM8 UCSP COM4 F THIN QFN NOTE: EXPOSED PADDLE CONNECTED TO GND. Chip Information TRANSISTOR COUNT: 1432 PROCESS: CMOS 12 ______________________________________________________________________________________ High-Bandwidth, Quad DPDT Switches QFN THIN 6x6x0.8.EPS D2 D CL D/2 b D2/2 k E/2 E2/2 (NE-1) X e E CL E2 k e L (ND-1) X e e L CL CL L1 L L e A1 A2 e A PACKAGE OUTLINE 36, 40, 48L THIN QFN, 6x6x0.8mm 21-0141 E 1 2 NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT FOR 0.4mm LEAD PITCH PACKAGE T4866-1. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. PACKAGE OUTLINE 36, 40, 48L THIN QFN, 6x6x0.8mm 21-0141 E 2 2 ______________________________________________________________________________________ 13 MAX4760/MAX4761 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 36L,UCSP.EPS MAX4760/MAX4761 High-Bandwidth, Quad DPDT Switches PACKAGE OUTLINE, 6x6 UCSP 21-0082 J 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.