Trimless Voltage Controlled Amplifier SSM2018 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM 117 dB dynamic range 0.006% typical THD+N (@ 1 kHz, unity gain) 140 dB gain range No external trimming required Differential inputs Complementary gain outputs Buffered control port I–V converter on-chip Low external parts count Low cost SSM2018 VC G +IN GAIN CORE VG –IG –IN V1–G –I1–G 00345-001 1–G Figure 1. GENERAL DESCRIPTION The SSM2018 represents the continuing evolution of the Frey Operational Voltage Controlled Element (OVCE) topology that permits flexibility in the design of high performance volume control systems. The SSM2018 is laser trimmed for gain core symmetry and offset. As a result, the SSM2018 is the first professional audio quality VCA to offer trimless operation. Due to careful gain core layout, the SSM2018 combines the low noise of Class AB topologies with the low distortion of Class A circuits to offer an unprecedented level of sonic transparency. Rev. C Additional features include differential inputs, a 140 dB (−100 dB to +40 dB) gain range, and a high impedance control port. The SSM2018 provides an internal current-to-voltage converter. Thus, no external active components are required. This device is offered in 16-lead, plastic DIP package and guaranteed for operation over the extended industrial temperature range of −40°C to +85°C. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2002–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com SSM2018 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Control Section ........................................................................... 11 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 12 General Description ......................................................................... 1 Basic VCA Configuration ......................................................... 12 Revision History ............................................................................... 2 Proper Operating Mode for the SSM2018 .............................. 12 Specifications..................................................................................... 3 Output Drive ............................................................................... 13 Electrical Specifications ............................................................... 3 Upgrading SSM2018 Sockets .................................................... 13 Absolute Maximum Ratings ............................................................ 4 Temperature Compensation of the Gain Constant ............... 13 Transistor Count ........................................................................... 4 Digital Control of the Gain ....................................................... 14 Thermal Resistance ...................................................................... 4 Supply Considerations and Single-Supply Operation ........... 14 ESD Caution .................................................................................. 4 Operational Voltage Controlled Element................................ 14 Pin Configuration and Function Descriptions ............................. 5 Voltage Controlled Panner ........................................................ 15 Typical Performance Characteristics ............................................. 6 Outline Dimensions ....................................................................... 16 Theory of Operation ...................................................................... 10 Ordering Guide .......................................................................... 16 Compensating the SSM2018 ..................................................... 10 REVISION HISTORY 2/13—Rev. B to Rev. C 7/02—Rev. A to Rev. B Updated Format .................................................................. Universal Reorganized Layout ............................................................ Universal Changed SSM2018T to SSM2018 ................................ Throughout Changes to Table 2 and Transistor Count Section ........................ 4 Added Table 4..................................................................................... 5 Changed Theory of Operation of the SSM2018T Section to Theory of Operation Section; Changes to Figure 28 ..................10 Changes to Control Section ...........................................................11 Changed Applications Section to Applications Information Section, Changes to Basic VCA Configuration Section .............12 Changes to Output Drive Section, Upgrading SSM2018 Sockets Section, Temperature Compensation of the Gain Constant Section, Figure 30, and Figure 31 ..................................................13 Changes to Digital Control of the Gain Section ..........................14 Updated Outline Dimensions ........................................................16 Changes to Ordering Guide ...........................................................16 Deleted references to SSM2118T........................................... Global Edits to Features ................................................................................1 Edits to General Description ...........................................................1 Deleted SSM2118T Functional Block Diagram ............................1 Deleted 16-Lewad Plastic DIP and SOL from Pin Configurations ............................................................................3 Edits to Ordering Guide ...................................................................3 Deleted SSM2118T Typical Application Circuit ...........................3 Deleted TPCs ................................................................................ 7–8 Edits to Applications ...................................................................... 10 Deleted section Basic VCA Configuration For The SSM21218T ............................................................................. 11 Rev. C | Page 2 of 16 Data Sheet SSM2018 SPECIFICATIONS ELECTRICAL SPECIFICATIONS VS = ±15 V, AV = 0 dB, RL = 100 kΩ, f = 1 kHz, 0 dBu = 0.775 V rms, simple VCA application circuit with 18 kΩ resistors, −VIN floating, and Class AB gain core bias (RB = 150 kΩ), −40°C < TA < +85°C, unless otherwise noted. Typical specifications apply at TA = 25°C. Table 1. Parameter AUDIO PERFORMANCE Noise Headroom Total Harmonic Distortion plus Noise INPUT AMPLIFIER Bias Current Offset Voltage Offset Current Input Impedance Common-Mode Range Gain Bandwidth Slew Rate OUTPUT AMPLIFIER Offset Voltage Output Voltage Swing Minimum Load Resistance CONTROL PORT Bias Current Input Impedance Gain Constant Gain Constant Temperature Coefficient Control Feedthrough Maximum Gain Maximum Attenuation POWER SUPPLIES Supply Voltage Range Supply Current Power Supply Rejection Ratio Conditions Min VIN = GND, 20 kHz Bandwidth Clip Point = 1% THD + N 2nd and 3rd Harmonics Only (25°C to 85°C) AV = 0 dB, VIN = +10 dBu AV = +20 dB, VIN = −10 dBu AV = −20 dB, VIN = +10 dBu VCM = 0 V VCM = 0 V VCM = 0 V VCA Configuration VCP Configuration VIN = 0 V, VC = 4 V IOUT = 1.5 mA Positive Negative For Full Output Swing 10 −10 Typ Max –95 22 –93 0.006 0.013 0.013 0.020 0.03 0.03 0.25 1 10 4 ±13 0.7 14 5 1 15 100 µA mV nA MΩ V MHz MHz V/µs 1.0 15 mV 0 dB to –40 dB Gain Range VC = −1.3 V VC = 4 V ±5 11 80 Rev. C | Page 3 of 16 Unit dBu dBu 0.01 0.02 0.02 13 −14 9 0.36 1 −30 −3500 ±1 40 100 Device Powered in Socket > 60 sec Max (E Grade) % % % V V kΩ 1 ±4 ±18 15 ±3 µA MΩ mV/dB ppm/°C mV mV dB V mA dB SSM2018 Data Sheet ABSOLUTE MAXIMUM RATINGS TRANSISTOR COUNT Table 2. Number of Transistors Rating SSM2018 .........................................................................................125 ±18 V ±VS −40°C to +85°C −65°C to +150°C 150°C 300°C THERMAL RESISTANCE θJA is specified for worst-case conditions, that is, θJA is specified for device in socket for P-DIP. Table 3. Thermal Resistance Package Type 16-Lead ,Plastic DIP 500 V 100 V θJA 76 θJC 33 Unit °C/W 50pF 18kΩ Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. V+ 1 16 2 15 3 14 4 1µF VIN+ VIN– 18kΩ 1µF 18kΩ VOUT SSM2018T 13 5 12 6 11 7 10 8 9 V– 150kΩ V+ 1µF 47pF Figure 2. Typical Application Circuit ESD CAUTION Rev. C | Page 4 of 16 3kΩ 1kΩ VCONTROL 00345-003 Parameter Supply Voltage Dual Supply Input Voltage Operating Temperature Range Storage Temperature Junction Temperature (TJ) Lead Temperature (Soldering, 60 sec) ESD Ratings 883 (Human Body) Model EIAJ Model Data Sheet SSM2018 +I1–G 1 16 V1–G V+ 2 15 BAL –IG 3 14 VG 13 GND 12 MODE +IN 6 11 VC –IN 7 10 V– COMP 2 8 9 COMP 3 –I1–G 4 COMP 1 5 SSM2018 TOP VIEW (Not to Scale) 00345-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 Name +I1−G V+ −IG −I1−G COMP1 6 7 8 +IN −IN COMP2 9 COMP3 10 11 12 V− VC MODE 13 14 15 16 GND VG BAL V1−G Description Positive Current Feedback Input for V1-G. Positive Power Supply. Connect this pin directly to the positive power rail. Negative Current Feedback Input for VG. Negative Current Feedback Input for V1-G. Compensation Pin. Apply a capacitor to the COMPx pins according to the Compensating the SSM2018 section. Non-Inverting Current Input. Inverting Current Input. Compensation Pin. Apply a capacitor to the COMPx pins according to the Compensating the SSM2018 section. Compensation Pin. Apply a capacitor to the COMPx pins according to the Compensating the SSM2018section. Negative Power Supply. Connect this pin directly to negative power rail. Control Voltage Input Port. Apply voltage to control VCA according to the Control Section. Operating Mode Pin. Selects Class A or Class AB operation as described in the Proper Operating Mode for the SSM2018 section. Ground. Output Voltage at Gain of G. Symmetry Trim Input for Older Version. Do not connect for SSM2108T operation. Output Voltage at Gain of 1-G. Rev. C | Page 5 of 16 SSM2018 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1 0.1 TA = +25°C VS = ±15V RF = 18kΩ TA = +25°C VS = ±15V RF = 18kΩ 0.1 THD + N (%) 0.01 AV = –20dB 0.01 AV = 0dB 100 1k FREQUENCY (Hz) 10k 20k 0.001 10m 00345-004 0.001 20 Figure 4. THD + N Frequency (80 kHz Low-Pass Filter, for AV = 0 dB, VIN = 3 V rms; for AV = +20 dB, VIN = 0.3 V rms; for AV = −20 dB, VIN = 3 V rms) 1 2 Figure 7. THD + N vs. Amplitude (Gain = +20 dB, fIN =1 kHz, 80 kHz Low-Pass Filter) 1 100 TA = +25°C VS = ±15V RF = 18kΩ TA = +25°C AV = 0dB 300 UNITS VIN = 10dBu VS = ±15V 90 80 70 THD + N (%) 0.1 60 UNITS 0.1 AMPLITUDE (VRMS) 00345-007 THD + N (%) AV = +20dB 50 40 0.01 30 20 0 0.005 0.010 0.015 DISTORTION (%) 0.020 0.025 0.001 –60 00345-005 0 Figure 5. Distortion Distribution –40 –20 0 GAIN (dB) 20 40 00345-008 10 Figure 8. THD + N vs. Gain (fIN = 1 kHz; for –60 dB ≤ AV ≤ –20 dB, VIN = 10 V rms; for 0 dB ≤ AV ≤ +20 dB, VIN = 1 V rms) 1 0.1 TA = +25°C RF = 18kΩ TA = +25°C VS = ±15V RF = 18kΩ THD + N (%) THD + N (%) 0.1 0.01 1 AMPLITUDE (VRMS) 10 20 0.001 00345-006 0.001 0.1 Figure 6. THD + N vs. Amplitude (Gain = 0 dB, fIN = 1 kHz, 80 kHz Low-Pass Filter) 5 6 9 12 SUPPLY VOLTAGE (±V) 15 18 00345-009 0.01 Figure 9. THD + N vs. Supply Voltage (AV = 0 dB, VIN = 1 V rms, fIN = 1 kHz, 80 kHz Low-Pass Filter) Rev. C | Page 6 of 16 Data Sheet SSM2018 500 15 NOISE DENSITY (nV/ Hz) 400 300 200 0 10 100 1k FREQUENCY (Hz) 10k 100k 12 9 6 3 0 100 00345-010 100 TA = +25°C VS = ±15V RF = 18kΩ 100k Figure 10. Noise Density vs. Frequency (Unity Gain, Referred to Input) Figure 13. Maximum Output Swing vs. Load Resistance (THD = 1 % Max) 25 100 TA = +25°C RF = Ω TA = +25°C VS = ±15V 90 20 80 OUTPUT OFFSET (mV) OUTPUT VOLTAGE SWING (±VPEAK ) 1k 10k LOAD RESISTANCE (Ω) 00345-013 MAXIMUM OUTPUT SWING (±VPEAK ) TA = +25°C VS = ±15V 15 RL = 10 RL = 10kΩ 70 60 50 40 30 5 20 10 15 SUPPLY VOLTAGE (±V) 20 0 –80 Figure 11. Maximum Output Swing vs. Supply Voltage (THD = 1% Max) –20 GAIN (dB) 0 20 10 40 90 TA = +25°C VS = ±15V TA = +25°C VS = ±15V RF = ∞Ω RL = 5 45 0 0 12 GAIN (dB) RL = 10kΩ 9 GAIN –5 –45 6 PHASE –10 –90 0 1k 10k FREQUENCY (Hz) 100k –15 100 Figure 12. Maximum Output Swing vs. Frequency (THD = 1 % Max) 1k 10k FREQUENCY (Hz) 100k Figure 15. Gain and Phase vs. Frequency Rev. C | Page 7 of 16 –135 1M 00345-015 3 00345-012 MAXIMUM OUTPUT SWING (±VPEAK ) –40 Figure 14. Typical Output Offset vs. Gain 18 15 –60 PHASE (Degrees) 5 00345-011 0 00345-014 10 SSM2018 Data Sheet 60 100 TA = +25°C VS = ±15V 40 TA = +25°C 0V < VC < 1.2V FREQ = 0Hz 300 UNITS 90 80 70 60 0 UNITS GAIN (dB) 20 –20 50 40 –40 30 20 –60 10k 100k FREQUENCY (Hz) 1M 10M 0 –3 –1 0 CONTROL FEEDTHROUGH (mV) 0 0.06 TA = +25°C VS = ±15V VC = 100mV rms TA = +25°C VS = ±15V CONTROL FEEDTHROUGH (dB) 0.05 0.04 VIN = +10dBu AV = –20dB AND VIN = –10dBu AV = +20dB 0.03 0.02 –20 –40 –60 –80 –20 0 20 40 TEMPERATURE (°C) 60 80 100 –100 100 00345-017 0 –40 1k 10k 100k FREQUENCY (Hz) 00345-020 VIN = 10dBu AV = 0dB 0.01 Figure 20. Control Feedthrough vs. Frequency Figure 17. Distortion vs. Temperature 3 –60 –70 –80 –90 –110 –60 –40 –20 0 GAIN (dB) 20 40 00345-018 –100 VS = ±15V 0V < VC < 1.2V FREQ = 0Hz 2 1 0 –1 –2 –3 –40 –20 0 20 40 TEMPERATURE (°C) 60 80 Figure 21. Control Feedthrough vs. Temperature Figure 18. Output Noise vs. Gain (VIN = GND, 20 kHz Bandwidth) Rev. C | Page 8 of 16 100 00345-021 CONTROL FEEDTHROUGH (mV) TA = +25°C VS = ±15V OUTPUT NOISE (dBu) 2 1 Figure 19. Control Feedthrough Distribution Figure 16. Gain vs. Frequency DISTORTION (%) –2 00345-019 1k 00345-016 10 –80 100 Data Sheet SSM2018 –20 0 VS = ±15V TA = +25°C VS = ±15V CMRR (dB) –30 –35 –40 –60 –40 –40 –20 0 20 40 TEMPERATURE (°C) 60 80 100 –100 10 100 10k 100k Figure 25. CMRR vs. Frequency Figure 22. Gain Constant vs. Temperature 15.0 –28 TA = +25°C TA = +25°C VS = ±15V 12.5 SLEW RATE (V/µs) –29 –30 –31 10.0 +SLEW RATE 7.5 5.0 –SLEW RATE –32 –60 –20 0 GAIN (dB) –40 20 40 60 0 00345-023 –33 –80 2.5 0 5 10 SUPPLY VOLTAGE (±V) 15 00345-026 GAIN CONSTANT (mV/dB) 1k FREQUENCY (Hz) 00345-025 –80 00345-022 GAIN CONSTANT (mV/dB) –20 –25 Figure 26. Slew Rate vs. Supply Voltage Figure 23. Gain Constant Linearity vs. Gain 0 0.1 TA = +25°C VS = ±15V AV = 0dB VIN = 100V rms 0 TA = +25°C VS = ±15V –20 PSRR (dB) –0.1 –0.2 –40 –60 –PSRR –0.3 1k 10k FREQUENCY (Hz) 100k –100 10 Figure 24. Gain Flatness vs. Frequency 100 1k FREQUENCY (Hz) Figure 27. PSRR vs. Frequency Rev. C | Page 9 of 16 10k 100k 00345-027 –0.4 100 –80 00345-024 GAIN (dB) +PSRR SSM2018 Data Sheet THEORY OF OPERATION The collector currents of Q2 and Q3 produce the output voltage. The output of Q3 is mirrored by amplifier A1 to add to the overall output voltage. On the other hand, the collector currents of Q1 and Q4 are used for feedback to the differential inputs. Because Pins 6 and 4 are shorted together, any input voltage produces an input current which flows into Pin 4. The same is true for the inverting input, which is connected to Pin 1. The overall feedback ensures that the current flowing through the input resistors is balanced by the collector currents in Q1 and Q4. The SSM2018 has the same internal circuitry as the original SSM2018. The detailed diagram in Figure 28 shows the main components of the VCA. The essence of the SSM2018 is the gain core, which comprises two differential pairs (Q1–Q4). When the control voltage, VC, is adjusted, current through the gain core is steered to one side or the other of the two differential pairs. The tail current for these differential pairs is set by the mode bias of the VCA (Class A or AB), which is labeled as IM in the diagram. IM is then modulated by a current proportional to the input voltage, labeled IS. For a positive input voltage, more current is steered (by the splitter) to the left differential pair; the opposite is true for a negative input. COMPENSATING THE SSM2018 The SSM2018 has a network that uses an adaptive compensation scheme that adjusts the optimum compensation level for a given gain. The control voltage not only adjusts the gain core steering, it also adjusts the compensation. The SSM2018 has three compensation pins: COMP1, COMP2, and COMP3. COMP3 is normally left open. Grounding this pin actually defeats the adaptive compensation circuitry, giving the VCA a fixed compensation point. The only time this is desirable is when the VCA has fixed feedback, such as the voltage controlled panner (VCP) circuit shown later in the data sheet. Thus, for the Basic VCA circuit or the OVCE circuit, COMP3 should be left open. To understand how the gain control works, a simple example is best. Take the case of a positive control voltage on Pin 11. Note that the bases of Q2 and Q3 are connected to ground via a 200 Ω resistor. A positive control voltage produces a positive voltage on the bases of Q1 and Q4. Concentrating on the left-most differential pair, this raises the base voltage of Q1 above that of Q2. Thus, more of the tail current is steered through Q1 than through Q2. The current from the collector of Q2 flows through the external 18 kΩ feedback resistor around amplifier A3. When this current is reduced, the output voltage is also reduced. Thus, a positive control voltage results in an attenuation of the input signal, which explains why the gain constant is negative. V+ 2 COMP 2 COMP 1 V G 8 5 14 –IG +I1–G 3 1 15 BAL 4 A1 COMPENSATION NETWORK A3 A2 A4 –I1–G 16 V1–G –IN 7 1–G G Q1 Q2 G 1–G GAIN CORE 1.8kΩ Q3 Q4 11 VC 200Ω +IN 6 Im + ( Is ) 2 200Ω Im – ( SPLITTER 13 GND Is ) 2 VREF SSM2018 12 MODE Im 00345-029 V– 10 9 COMP 3 Figure 28. Detailed Functional Diagram Rev. C | Page 10 of 16 Data Sheet SSM2018 A compensation capacitor must be added between COMP1 and COMP2. Because the VCA operates over such a wide gain range, the compensation should ideally be optimized for each gain. When the VCA is in high attenuation, there is very high loop gain, and the part needs to have high compensation. On the other hand, at high gain, the same compensation capacitor would overcompensate the part and roll off the high frequency performance. Thus, the SSM2018 employs a patented adaptive compensation circuit. The compensation capacitor is Miller connected between the base and collector of an internal transistor. By changing the gain of this transistor via the control voltage, the compensation is changed. Increasing the compensation capacitor causes the frequency response and slew rate to decrease, which tends to cause high frequency distortion to increase. For the basic VCA circuit, 47 pF was chosen as the optimal value. The OVCE circuit described later uses a 220 pF capacitor. The reason for the increase is to compensate for the extra phase shift from the additional output amplifier used in the OVCE configuration. The compensation capacitor can be adjusted over a practical range from 47 pF to 220 pF if desired. Below 47 pF, the parts may oscillate; above 220 pF the frequency response is significantly degraded. CONTROL SECTION As noted above, the control voltage on Pin 11 steers the current through the gain core transistors to set the gain. The unity gain (0 dB) condition occurs at VC = 0. Attenuation occurs in the VCA for positive voltages (0 V to 3 V, typ), and gain occurs for negative voltage (0 V to −1.3 V, typ). From –1.3 V to +3.0 V, 140 dB of gain range is obtainable. The output gain formula is as follows: VOUT = VIN × e(−aVC) (1) The exponential term arises from the standard Ebers-Moll equation describing the relationship of a transistor’s collector current as a function of the base-emitter voltage: IC = IS × e(VBE /VT) (2) The factor a is a function not only of VT but also the scaling due to the resistor divider of the 200 Ω and 1.8 kΩ resistors shown in Figure 2. The resulting expression for a is as follows: a = 1/(10 × VT), which is approximately equal to 4 at room temperature. Substituting a = 4 in the above equation results in a −28.8 mV/dB control law at room temperature. The −28.8 mV/dB number is slightly different from the data sheet specification of −30 mV/dB. The difference arises from the temperature dependency of the control law. The term VT is known as the thermal voltage, and it has a direct dependency on temperature: VT = kT/q where k = Boltzmann’s constant = 1.38 E − 23 q = electron charge = 1.6 E − 19 T = absolute temperature in Kelvin) This temperature dependency leads to the −3500 ppm/°C drift of the control law. It also means that the control law changes as the part warms up. Thus, our specification for the control law states that the part has been powered up for 60 seconds. When the part is initially turned on, the temperature of the die is still at the ambient temperature (25°C for example), but the power dissipation causes the die to warm up. With ±15 V supplies and a supply current of 11 mA, 330 mW is dissipated. This number is multiplied by θJA to determine the rise in the die’s temperature. In this case, the die increases from 25°C to approximately 50°C. A 25°C temperature change causes a 8.25% increase in the gain constant, resulting in a gain constant of 30 mV/dB. The graph in Figure 22 shows how the gain constant varies over the full temperature range. Rev. C | Page 11 of 16 SSM2018 Data Sheet APPLICATIONS INFORMATION The SSM2018 is a trimless voltage controlled amplifier (VCA) for volume control in audio systems. The SSM2018 is identical to the original SSM2018 in functionality and pinout; however, it is the first professional quality audio VCA in the marketplace that does not require an external trimming potentiometer to minimize distortion. Instead, the SSM2018 is laser trimmed before it is packaged to ensure the specified THD and control feedthrough performance. This has a significant savings in not only the cost of external trimming potentiometers, but also the manufacturing cost of performing the trimming optimization during production. BASIC VCA CONFIGURATION The primary application circuit for the SSM2018 is the basic VCA configuration, which is shown in Figure 29. This configuration uses differential current feedback to realize the VCA. A complete description of the internal circuitry of the VCA, and this configuration, is given in the Theory of Operation section. The SSM2018 is trimmed at the factory for operation in the basic VCA configuration with class AB biasing. Thus, for optimal distortion and control feedthrough performance, use the same configuration and biasing. All of the graphs for the SSM2018 in the data sheet have been measured using the circuit of Figure 29. 50pF 18kΩ 1 16 15 3 14 4 1µF VIN+ VIN– 5 18kΩ 1µF 18kΩ VOUT 2 SSM2018T 13 12 6 11 7 10 8 9 V– RB 150kΩ 1µF V+ 3kΩ 1kΩ 47pF The control port follows a −30 mV/dB control law. The application circuit shows a 3 kΩ and 1 kΩ resistor divider from a control voltage. The choice of these resistors is arbitrary and could be any values to properly scale the control voltage. In fact, these resistors can be omitted if the control voltage has been properly scaled. The 1 μF capacitor is in place to provide some filtering of the control signal. Although the control feedthrough is trimmed at the factory, the feedthrough increases with frequency (Figure 20). Thus, high frequency noise can feed through and add to the noise of the VCA. Filtering the control signal helps minimize this noise source. PROPER OPERATING MODE FOR THE SSM2018 The SSM2018 has the flexibility of operating in either Class A or Class AB. This is accomplished by adjusting the amount of current flowing in the gain core (IM in Figure 28). The traditional trade-off between the two classes is that Class A tends to have lower THD but higher noise than Class AB. However, by using well matched gain core transistors, distortion compensation circuitry and laser trimming, the SSM2018 has excellent THD performance in Class AB. Thus, it offers the best of both worlds in having the low noise of Class AB with low THD. VCONTROL 00345-028 V+ The output of the basic VCA is taken from Pin 14, which is the output of an internal amplifier. Note that the second voltage output (Pin 16) is connected to the negative supply. This is normal and actually disables that output amplifier, ensuring that it does not oscillate and cause interference problems. Shorting the output to the negative supply does not cause the supply current to increase. This amplifier is only used in the OVCE application explained in the Operational Voltage Controlled Element section. Figure 29. Basic VCA Application Circuit In the simple VCA configuration, the SSM2018 inputs are at a virtual ground. Thus, 18 kΩ resistors are required to convert the input voltages to input currents. The schematic also shows ac coupling capacitors. These are inserted to minimize dc offsets generated by bias current through the resistors. Without the capacitors, the dc offset due to the input bias current is typically 5 mV. The input stage has the flexibility to run either inverting, noninverting, or balanced. The most common configuration is to run it in the noninverting single-ended mode. If either input is unused, the associated 18 kΩ resistor and coupling capacitor should be removed to prevent any additional noise. The common-mode rejection in balanced mode is typically 55 dB up to 1 kHz, decreasing at higher frequencies as shown in Figure 25. To ensure good CMRR in the balanced configuration, the input resistors must be balanced. For example, a 1% mismatch results in a CMRR of 40 dB. To achieve 55 dB, these resistors should have an absolute tolerance match of 0.1%. Because the SSM2018 operates optimally in Class AB, the distortion trim is performed for this class. To guarantee conformance to the data sheet THD specifications, the SSM2018 must be operated in class AB. This does not mean that it can not be operated in Class A, but the optimal THD trim point is different for the two classes. Using Class A operation results to 0.05% without trim. An external potentiometer could be added to change the trim back to its optimal point as shown in the OVCE application circuit, but this adds the expense and time in adjusting a potentiometer. The class of operation is set by selecting the proper value for RB shown in Figure 29. RB determines the current flowing into the MODE input (Pin 12). For class AB operation with ±15 V supplies, RB should be 150 kΩ. This results in a current of 95 μA. For other supply voltages, adjust the value of RB such that current remains at 95 μA. This current follows the formula: I MODE ( V CC 0.7 V) (3) RB The factor of 0.7 V arises from the fact that the dc bias on Pin 12 is a diode drop above ground. Rev. C | Page 12 of 16 Data Sheet SSM2018 OUTPUT DRIVE TEMPERATURE COMPENSATION OF THE GAIN CONSTANT The SSM2018 is buffered by an internal op amp to provide a low impedance output. This output is capable of driving to within 1.2 V of either rail at 1% distortion for a 100 kΩ load. Note that this 100 kΩ load is in parallel with the feedback resistor of 18 kΩ, so the effective load is 15.3 kΩ. For better than 0.01% distortion, the output should remain about 3.5 V away from either rail as shown in Figure 6. As the graph of output swing versus load resistance shows (Figure 13), to maintain less than 1% distortion the output current should be limited to approximately ±1.3 mA. If higher current drive is required, the output should be buffered with a high quality op amp such as the ADA4897-1 or the AD797. The gain constant has a −3500 ppm/°C temperature drift due to the inherent nature of the control port. Over the full temperature range of −40°C to +85°C, the drift causes the gain to change by 7 dB if the part is in a gain of ±20 dB. If the application requires the gain constant to be the same over a wide temperature range, external temperature compensation should be employed. The simplest form of compensation is a temperature compensating resistor (TCR) such as the PT146 from Precision Resistor Co. These elements are different than a standard thermistor in that they are linear over temperature to better match the linear drift of the gain constant. The internal amplifiers are compensated for unity gain stability and are capable of driving a capacitive load up to 4700 pF. Larger capacitive loads should be isolated from the output of the SSM2018 by the use of a 50 Ω series resistor. OP27 OFFSET TRIM 10MΩ –15V *PT146 AVAILABLE FROM PRECISION RESISTOR CO. 10601 75TH STREET NORTH LARGO, FL. 34647 (727) 541-5771 SYMMETRY TRIM 470kΩ V– 500kΩ 18kΩ 1µF 16 2 15 3 14 VIN+ VIN– 5 18kΩ 1µF 18kΩ VOUT 1 4 SSM2018 13 RB 12 6 11 7 10 8 9 1µF V+ 3kΩ VCONTROL 1kΩ NC 47pF V– 00345-030 NOTES 1. RB: 150kΩ FOR CLASS AB. 2. NC = NO CONNECT. PIN 11 SSM2108/ SSM2108T Figure 31. Two TCRs Compensate for Temperature Drift of Gain Constant 50pF V+ 1kΩ* +15V REMOVE FOR SSM2018T 100kΩ 2kΩ 00345-031 V+ CONTROL VOLTAGE Figure 30. Upgrading SSM2018 Sockets The gain constant has a −3500 ppm/°C temperature drift that is due to the reciprocal dependence of the design on absolute temperature. This causes the gain to vary by 7 dB over the temperature range from −40°C to +85°C when the nominal gain at room temperature is set to 20 dB. The gain change is quite small if the temperature range of operation is restricted. Nevertheless, the TC of the gain constant is easily compensated by buffering the control voltage to the VCA with a circuit having a 3500 ppm/°C temperature coefficient. Figure 31 shows a simple solution to the problem using an op amp with a PT146 temperature compensating resistor from the Precision Resistor Company. Note that this circuit is inverting, which changes the gain constant to a positive quantity. Any other circuit that provides the necessary positive TC works. UPGRADING SSM2018 SOCKETS The SSM2018 easily replaces the SSM2018 in the basic VCA configuration. The parts are pin for pin compatible allowing direct replacement. At the same time, the trimming potentiometers for symmetry and offset should be removed, as shown in Figure 30. Upgrading immediately to the SSM2018 saves the expense of the potentiometers and the time in production of trimming for minimum distortion and control feedthrough. If the SSM2018 is used in the OVCE or VCP configuration, the SSM2018 can still directly replace it; however, the potentiometers cannot necessarily be removed, as explained in the Operational Voltage Controlled Element and Voltage Controlled Panner sections. Rev. C | Page 13 of 16 SSM2018 Data Sheet DIGITAL CONTROL OF THE GAIN A common method of controlling the gain of a VCA is to use a digital-to-analog converter to set the control voltage. Figure 32 shows a 12-bit DAC, the DAC8512, controlling the SSM2018. The DAC8512 is a complete 12-bit converter in an 8-pin package. It includes an on-board reference and an output amplifier to produce an output voltage from 0 V to 4.095 V, which is 1 mV/bit. Since the voltage is always positive, this circuit only provides attenuation. The resistor divider on the output of the DAC8512 is set to scale the output voltage so that full scale produces 80 dB of attenuation. The resistor divider can be adjusted to provide other attenuation ranges. If a parallel interface is needed, then the DAC8562 may be used or, for a dual DAC, the AD8582. The SSM2018 can be operated in single-supply mode as long as the circuit is properly biased. Figure 33 shows the proper configuration, which includes an amplifier to create a false ground node midway between the supplies. A high quality, wide bandwidth audio amplifier, such as the ADA4897-1 or the AD797, should be used to ensure a very low impedance ground over the full audio frequency range. The minimum operating supply for the SSM2018 is ±5 V, which gives a minimum singlesupply of +10 V and ground. The performance of the circuit with +10 V is identical to graphs that show operation of the SSM2018 with ±5 V supplies. 50pF 18kΩ VOUT 50pF V+ VOUT NC 1 16 2 15 3 14 VIN+ 13 VIN– +15V 0.1µF 4 5 18kΩ SSM2018T 6 11 10 8 9 NC 1µF 150kΩ 15 3 14 SSM2018T 6 1µF 18kΩ 13 RB 12 11 7 10 8 9 1µF V+ 3kΩ V+ V+ –15V 100kΩ 0.1µF 100kΩ OP176 10µF 1 2 CLR 6 LD 5 SCLK 3 SDI 4 R6 825Ω Figure 33. Single-Supply Operation of SSM2018 0V ≤ VC ≤ +2.24V OPERATIONAL VOLTAGE CONTROLLED ELEMENT 8 DAC8512 R7 1kΩ 7 NC = NO CONNECT CCON 1µF 00345-032 CS VCONTROL 1kΩ 47pF 0.1µF NC 5 18kΩ +15V 47pF +5V 16 2 4 12 NC 7 VIN 1 00345-033 18kΩ Figure 32. 12-Bit DAC Controls the VCA Gain SUPPLY CONSIDERATIONS AND SINGLE-SUPPLY OPERATION The SSM2018 has a wide operating supply range. Many of the graphs in this data sheet show the performance of the part from ±5 V to ±18 V. These graphs offer typical performance specifications and are a good indication of the parts’ capabilities. The minimum operating supply voltage is ±4.5 V. Below this voltage, the parts are inoperable. Thus, to account for supply variations, the recommended minimum supply is ±5 V. For simplicity, the circuits in the data sheet do not show supply decoupling; however, to ensure best performance, each supply pin should be decoupled with a 0.1 µF ceramic (or other low resistance and inductance type) capacitor as close to the package as possible. This minimizes the chance of supply noise feeding through the part causing excessive noise in the audio frequency range. The SSM2018 has considerable flexibility beyond the basic VCA circuit utilized throughout this data sheet. The name operational voltage controlled element (OVCE) comes from the fact that the part behaves much like an operational amplifier with a second voltage controlled output. The symbol for the OVCE connected as a unity gain follower/VCA is shown in Figure 34. The voltage output labeled V1–G is fed back to the inverting input as it is for an op amp’s feedback. The VG output is amplified or attenuated depending upon the control voltage. Because the OVCE works similarly to an op amp, the feedback could as easily have included resistors to add gain, or a filter network to add frequency shaping. The full application circuit for the OVCE is shown in Figure 35. Note that the amplifier whose output (Pin 16) was originally connected to VMINUS is now the output for feedback. As mentioned before, because the SSM2018 is trimmed for the basic VCA configuration, potentiometers are needed for the OVCE configuration to ensure the best THD and control feedthrough performance. Rev. C | Page 14 of 16 Data Sheet SSM2018 VOLTAGE CONTROLLED PANNER If a symmetry trim is to be performed, it should precede the control feedthrough trim and be done as follows: 2. An interesting circuit that is built with the OVCE building block is a voltage controlled panner. Figure 36 shows the feedback connection for the circuit. Note that the average of both outputs is fed back to the input. Thus, the average must be equal to the input voltage. When the control voltage is set for gain at VG, this causes V1–G to attenuate (to keep the average the same). On the other hand, when VG is attenuated, V1–G is amplified. The result is that the control voltage causes the input to pan from one output to the other. The following expressions show how this circuit works mathematically: Apply a 1 kHz sine wave of 10 dBu to the input with the control voltage set for unity gain. Adjust the symmetry trim potentiometer to minimize distortion of the output signal. Next, the control feedthrough trim is done as follows: 1. 2. Ground the input signal port and apply a 60 Hz sine wave to the control port. The sine wave should have its high and low peaks correspond to the highest gain to be used in the application and 30 dB of attenuation, respectively. For example, a range of 20 dB gain to 30 dB attenuation requires that the sine wave amplitude ranges between −560 mV and +840 mV on Pin 11. Adjust the control feedthrough potentiometer to null the signal seen at the output. VG = 2 K × VIN and VI−G = 2(1 − K) × VIN where K varies between 0 and 1 as the control voltage is changed from full attenuation to full gain, respectively. When VC = 0, then K = 0.5 and VG = V1–G = VIN. Again, trimming is required for best performance. Pin 9 must be grounded. This is possible because the feedback is constant and the adaptive network is not needed. The VCP is the only application shown in this data sheet where Pin 9 is grounded. VC VG VC 00345-034 VIN V1–G 18kΩ 18kΩ + INPUTS – VG 1 16 2 15 3 14 4 13 SSM2018 Figure 36. Basic VCP Connection V1–G 18kΩ V+ 5 12 6 11 7 10 8 9 VG VIN Figure 34. OVCE Follower/VCA Connection V+ 50pF CONTROL FEEDTHROUGH TRIM 18kΩ 100kΩ 10MΩ SYMMETRY 470kΩ TRIM 500kΩ 50pF V– RB V– V+ 1µF 3kΩ VCONTROL 1kΩ NC 00345-035 220pF NOTES 1. RB = 30kΩ FOR CLASS A. 150kΩ FOR CLASS B. 2. NC = NO CONNECT. (4) Figure 35. OVCE Application Circuit Rev. C | Page 15 of 16 V1–G 00345-036 1. SSM2018 Data Sheet OUTLINE DIMENSIONS 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) 16 9 1 8 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.430 (10.92) MAX COMPLIANT TO JEDEC STANDARDS MS-001-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. 073106-B 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) Figure 37. 16-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-16) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model 1 SSM2018PZ SSM2018TPZ 1 Temperature Range –40°C to +85°C –40°C to +85°C Package Description 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] Z = RoHS Compliant Part. ©2002–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00345-0-2/13(C) Rev. C | Page 16 of 16 Package Option N-16 N-16