19-4030; Rev 1; 8/08 DisplayPort/PCIe Passive Switches The MAX4928A/MAX4928B high-speed passive switches route PCI Express® (PCIe) data and/or DisplayPort™ signals between two possible destinations in desktop or laptop PCs. The MAX4928A is intended to be used with the ATX form factor desktop PCs, while the MAX4928B is expected to be used in the BTX form factor. The MAX4928A/MAX4928B are hex double-pole/double-throw (6 x DPDT) switches. The MAX4928A/ MAX4928B feature a single digital control input (SEL) to switch signal paths and a latch input (LE) that holds the switches in a given state. The MAX4928A/MAX4928B are fully specified to operate from a single +3.3V (typ) power supply. The MAX4928A/MAX4928B are available in an industry standard 5mm x 11mm, 56-pin TQFN package. Both devices operate over the -40°C to +85°C extended temperature range. Applications Desktop PCs Features ♦ Single +3.3V Power Supply Voltage ♦ Supports PCIe Gen I, Gen II, and DisplayPort Data Rates > 5Gbps ♦ Excellent Return Loss > 12dB at 2.5GHz ♦ Six Bidirectional Pairs of Switches All Switching in One Device ♦ Low 850µA (max) Supply Current ♦ Small 5mm x 11mm, 56-Pin TQFN Package ♦ Industry-Standard Pinouts Ordering Information PART TEMP RANGE PIN-PACKAGE MAX4928AETN+ -40°C to +85°F 56 TQFN-EP MAX4928BETN+ -40°C to +85°F 56 TQFN-EP +Denotes a lead-free package/RoHS-Compliant package. EP = Exposed paddle. Notebook PCs PCI Express is a registered trademark of PCI-SIG. DisplayPort is a trademark of Video Electronics Standards Association (VESA). Typical Operating Circuit appears at end of data sheet. 56 55 54 53 52 51 50 49 GND 1 IN0+ GND D1- VDD D1+ D0- VDD D0+ GND GND TX1- VDD TX1+ TX0- VDD TOP VIEW TX0+ GND Pin Configurations 56 55 54 53 52 51 50 49 GND 1 2 47 TX2+ SEL 2 47 D2+ IN0- 3 46 TX2- LE 3 46 D2- IN1+ 4 45 TX3+ IN0+ 4 45 D3+ IN1- 5 44 TX3- IN0- 5 44 D3- VDD 6 43 D0+ VDD 6 43 TX0+ IN2+ 7 42 D0- IN1+ 7 42 TX0- IN2- 8 41 D1+ IN1- 8 41 TX1+ IN3+ 9 40 D1- IN2+ 9 40 TX1- IN3- 10 39 D2+ IN2- 10 38 D2- GND 11 OUT+ 12 37 D3+ IN3+ 12 37 TX3+ OUT- 13 36 D3- IN3- 13 36 TX3- X+ 14 35 GND OUT+ 14 35 GND X- 15 34 VDD OUT- 15 34 VDD GND 16 33 RX0+ GND 16 33 AUX+ VDD 17 32 RX0- VDD 17 32 AUX- SEL 18 31 RX1+ X+ 18 31 HPD1 30 RX1- X- 19 29 GND GND 20 *CONNECT EXPOSED PADDLE TO GND. TQFN 30 HPD2 29 GND GND VDD RX0+ 21 22 23 24 25 26 27 28 RX0- GND VDD AUX+ AUX- HPD1 HPD2 VDD GND 21 22 23 24 25 26 27 28 38 TX2- *EP RX1+ GND 20 RX1- *EP VDD LE 19 39 TX2+ MAX4928B GND MAX4928A GND 11 48 GND + + 48 GND TQFN ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX4928A/MAX4928B General Description MAX4928A/MAX4928B DisplayPort/PCIe Passive Switches ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) VDD ...........................................................................-0.3V to +4V LE, SEL, IN_, X_, OUT_, D_, TX_, HPD_, RX_, AUX_ (Note 1) ...............................................-0.3V to + (VDD + 0.3V) |VIN_ - VTX_|, |VIN_ - VD_|, |VX_ - VHPD_|, |VX_ - VRX1_|, |VOUT_ - VAUX_|, |VOUT_ - VRX0_| (Note 1) ...................0 to +2V Continuous Current (IN_ to D_/TX_, X_ to HPD_/RX1_, OUT_ to AUX_/RX0_ .....................................................±70mA Peak Current (IN_ to D_/TX_, X_ to HPD_/RX1_, OUT_ to AUX_/RX0_) (pulsed at 1ms, 10% duty cycle) .............±70mA Continuous Current (LE, SEL)...........................................±30mA Peak Current (LE, SEL) (pulsed at 1ms, 10% duty cycle)..................................±70mA Continuous Power Dissipation (TA = +70°C) for Multilayer Board 56-Pin TQFN (derate 41.0mW/°C above +70°C) .......3279mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Package Junction-to-Ambient Thermal Resistance (θJA) (Note 2) .....................................................................24.4°C/W Package Junction-to-Case Thermal Resistance (θJC) (Note 2) .......................................................................1.5°C/W Lead Temperature (soldering) .........................................+300°C Note 1: Signals on IN_, X_, OUT_, D_, TX_, HPD_, RX_, or AUX_, LE, SEL exceeding VDD or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer board. For detailed information on package thermal considerations, see www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +3.3V ±10%, TA =TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C, unless otherwise noted.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG SWITCH Analog Signal Range IN_, X_, OUT_, D_, TX_, HPD_, RX_, AUX_ -0.1 (VDD 1.8) V Voltage Between IN and D/TX, X and HPD/RX1, and OUT and AUX/RX0 |VIN_ - VTX_|, |VIN_ - VD_|, |VX_ - VHPD_|, |VX_ - VRX1_|, |VOUT_ VAUX_|, |VOUT_ - VRX0_| 0 1.8 V On-Resistance On-Resistance Match Between Pairs of Same Channel On-Resistance Match Between Channels On-Resistance Flatness 2 RON IIN_ = IX_ = IOUT_ = 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V, +1.2V 8 ΔRON VDD = +3.0V, IIN_ = IX_ = IOUT_= 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V (Notes 4, 5) 0.1 ΔRON VDD = +3.0V, IIN_ = IX_ = IOUT_= 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V (Notes 4, 5) 1.5 4 RFLAT(ON) VDD = +3.0V, IIN_ = IX_ = IOUT_= 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V, +1.2V (Notes 5, 6) 0.3 1.5 Ω 2 Ω _______________________________________________________________________________________ Ω DisplayPort/PCIe Passive Switches (VDD = +3.3V ±10%, TA =TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C, unless otherwise noted.) (Note 3) PARAMETER D_ or TX_/ HPD_ or RX1_/ AUX_ or RX0_ Off-Leakage Current IN_/X_/OUT_ On-Leakage Current SYMBOL ID_ (OFF) ITX_ (OFF) IHPD_ (OFF) IRX1_ (OFF) IAUX_ (OFF) IRX0_ (OFF) IIN_ (ON) IX_ (ON) IOUT_ (ON) CONDITIONS MIN VDD = +3.6V , VIN_ = VX_ = VOUT_ = 0V, +1.2V; VD_ or VTX_, VHPD_ or VRX1_, VAUX_ or VRX0_ = +1.2V, 0V -1 TYP MAX UNITS +1 µA VDD = +3.6V , VIN_ = VX_ = VOUT_ = 0V, +1.2V; VD_ or VTX_ = VIN_ or unconnected, VHPD_ or VRX1_ = VX_ or unconnected, VAUX_ or VRX0_ = VOUT_ or unconnected -1 +1 DIGITAL SIGNALS SEL to Switch Turn-On Time SEL to Switch Turn-Off Time LE Setup Time SEL to LE LE Hold Time SEL to LE LE Minimum Pulse-Width Low Differential Insertion Loss (Figure 2) Differential Crosstalk (Figure 2) Differential Off-Isolation Differential Return Loss (Figure 2) tON_SEL VD_ or VTX_ = +1.0V, RL = 50Ω, VHPD_ or VRX1_ = +1.0V, RL = 50Ω, VAUX_ or VRX0_ = +1.0V, RL = 50Ω, LE = VDD, CL = 100pf (Figure 1) 55 120 ns tOFF_SEL VD_ or VTX_ = +1.0V, RL = 50Ω, VHPD_ or VRX1_ = +1.0V, RL = 50Ω, VAUX_ or VRX0_ = +1.0V, RL = 50Ω, LE = VDD, CL = 100pf (Figure 1) 8 50 ns tSU VD_ or VTX_ = +1.0V, RL = 50Ω, VHPD_ or VRX1_ = +1.0V, RL = 50Ω, VAUX_ or VRX0_ = +1.0V, RL = 50Ω (Figure 1) 2 ns tHOLD VD_ or VTX_ = +1.0V, RL = 50Ω, VHPD_ or VRX1_ = +1.0V, RL = 50Ω, VAUX_ or VRX0_ = +1.0V, RL = 50Ω, (Figure 1) 2 ns tW VD_ or VTX_ = +1.0V, RL = 50Ω, VHPD_ or VRX1_ = +1.0V, RL = 50Ω, VAUX_ or VRX0_ = +1.0V, RL = 50Ω (Figure 1) SDD21 SDDCTK SDD21_OFF SDD11 40 ns f = 2.5GHz -1.5 f = 5.0GHz -3.3 f = 7.5GHz -4.9 f = 2.5GHz -40 f = 5.0GHz -23 f = 7.5GHz -28 f = 3.0GHz -22 f = 2.8GHz -21 f = 5.0GHz -8 f = 7.5GHz -7 dB dB dB dB _______________________________________________________________________________________ 3 MAX4928A/MAX4928B ELECTRICAL CHARACTERISTICS (continued) MAX4928A/MAX4928B DisplayPort/PCIe Passive Switches ELECTRICAL CHARACTERISTICS (continued) (VDD = +3.3V ±10%, TA =TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C, unless otherwise noted.) (Note 3) PARAMETER Signal Data Rate Differential -3dB Bandwidth SYMBOL CONDITIONS MIN TYP MAX UNITS BR RS = RL = 100Ω balanced 10 Gbps DBW RS = RL = 100Ω balanced 5 GHz LOGIC INPUT (LE, SEL) Input Logic-High Input Logic-Low VIH 1.4 V VIL Input Logic Hysteresis VHYST Input Leakage Current IIN 0.5 100 VIN = 0 or VDD -1 V mV +1 µA POWER SUPPLY Power Supply Range VDD VDD Supply Current IDD 3.0 VIN = 0 or VDD 3.6 V 850 µA Note 3: All units are 100% production tested at TA = +85°C. Limits over the operating temperature range are guaranteed by design and characterization and are not production tested. Note 4: ΔRON = RON (MAX) - RON (MIN). Note 5: Guaranteed by design. Not production tested. Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. 4 _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches 8.5 8.0 7.5 7.0 6.5 8.5 8.0 7.0 6.5 6.0 5.5 5.5 5.0 5.0 0.9 1.1 1.3 TA = -40°C 0.3 LOGIC THRESHOLD vs. SUPPLY VOLTAGE 0.7 0.9 1.1 1.3 1.5 -40 1.1 0.9 VIL 60 tON_SEL 40 tOFF_SEL 20 0.5 3.5 3.6 3.1 3.2 3.3 3.4 3.5 1,000 FREQUENCY (MHz) -8 10 -20 10,000 100 1,000 10,000 FREQUENCY (MHz) DIFFERENTIAL RETURN LOSS -40 -600 -80 -100 -80 100 -6 3.6 MAX4928A/B toc08 0 DIFFERENTIAL CROSSTALK (dB) MAX4928A/B toc07 -60 85 -4 DIFFERENTIAL CROSSTALK -40 10 -2 SUPPLY VOLTAGE (V) DIFFERENTIAL OFF-ISOLATION -20 60 -10 3.0 SUPPLY VOLTAGE (V) 0 35 DIFFERENTIAL INSERTION LOSS 0 DIFFERENTIAL RETURN LOSS (dB) 3.4 10 0 0 3.3 -15 TEMPERATURE (°C) 80 0. 7 DIFFERENTIAL OFF-ISOLATION (dB) 0 0.5 MAX4928A/B toc05 VIH 3.2 300 TURN-ON/OFF TIME vs. SUPPLY VOLTAGE TURN-ON/OFF TIME (ns) LOGIC THRESHOLD (V) 1.3 3.1 400 100 100 MAX4928A/B toc04 VDD = 3.3V 3.0 500 VIN_, VX_, VOUT_ (V) VIN_, VX_, VOUT_ (V) 1.5 600 200 VDD = 3.3V -0.1 0.1 1.5 700 MAX4928A/B toc06 0.7 800 MAX4928A/B toc09 0.5 VDD = 3.3V 900 DIFFERENTIAL INSERTION LOSS (dB) 0.3 TA = +25°C 7.5 6.0 -0.1 0.1 TA = +85°C 9.0 ON-RESISTANCE (Ω) ON-RESISTANCE (Ω) 9.0 9.5 SUPPLY CURRENT (μA) VDD = 3.3V SUPPLY CURRENT vs. TEMPERATURE 1000 MAX4928A/B toc02 MAX4928A/B toc01 9.5 ON-RESISTANCE vs. VIN_, VX_, VOUT_ 10.0 MAX4928A/B toc03 ON-RESISTANCE vs. VIN_, VX_, VOUT_ 10.0 -10 -20 -30 -40 10 100 1,000 FREQUENCY (MHz) 10,000 10 100 1,000 10,000 FREQUENCY (MHz) _______________________________________________________________________________________ 5 MAX4928A/MAX4928B Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B Test Circuits/Timing Diagrams LOGIC INPUT LE MAX4928A/MAX4928B +3.3V VDD VN_ D_ OR TX_, HPD_ OR RX1_, AUX_ OR RX0_ IN_, X_, OR OUT_ VOUT RL LOGIC INPUT SEL 50% VIL t OFF_SEL CL SEL LOGIC INPUT SEL GND SWITCH OUTPUT TX_, RX1_, OR RX0_ LE LOGIC INPUT LE VOUT 0.9 x VOUT 0.9 x VOUT 0V t ON_SEL t OFF_SEL SWITCH OUTPUT D_, HPD_, OR AUX CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL VOUT = VN_ RL + RON ( t r < 5ns t f < 5ns VIH ) 0.9 x VOUT t ON_SEL VN_ = VD_ OR VTX_, VHPD_ OR VRX1_, VAUX_, OR VRX0_ LOGIC INPUT LE VIH LOGIC INPUT SEL VIH tW 50% 50% VIL t SU 50% t HOLD 50% VIL Figure 1. Switching Time 6 0.9 x VOUT 0V _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches +3.3V +3.3V 0.1μF 0.1μF VDD VDD 0V IN_+ X_+ OUT_+ SEL LE 50Ω D_+ MAX4928A MAX4928B 50Ω D_- IN_X_OUT_- NETWORK ANALYZER PORT 1 VIN+ 50Ω PORT 2 VIN- 50Ω VDD VDD 0V IN_+ X_+ OUT_+ SEL LE 50Ω D_+ MAX4928A MAX4928B 50Ω D_- 50Ω IN_X_OUT_- NETWORK ANALYZER PORT 1 VIN+ 50Ω PORT 2 VIN- 50Ω PORT 3 VOUT+ 50Ω PORT 4 VOUT- 50Ω 50Ω HPD_+ 50Ω TX_+ RX1_+ RX0_+ HPD_50Ω AUX_GND 50Ω PORT 4 VOUT- 50Ω 50Ω TX_+ RX1_+ RX0_+ HPD_50Ω AUX_+ 50Ω HPD_+ PORT 3 VOUT+ TX_RX1_RX0_- AUX_+ 50Ω AUX_GND DIFFERENTIAL OFF-ISOLATION DIFFERENTIAL INSERTION-LOSS/DIFFERENTIAL RETURN LOSS DIFFERENTIAL INSERTION-LOSS = 20log ( TX_RX1_RX0_- ) VOUT+ - VOUTVIN+ - VIN- DIFFERENTIAL OFF-ISOLATION = 20log ( ) VOUT+ - VOUTVIN+ - VIN- +3.3V 0.1μF VDD 0V OR VDD 0V SEL LE IN_+ X_+ OUT_+ D_+/D_- MAX4928A MAX4928B HPD_+/HPD_- IN_X_OUT_- 50Ω 50Ω NETWORK ANALYZER PORT 1 VIN+ 50Ω PORT 2 VIN- 50Ω PORT 3 VOUT+ 50Ω PORT 4 VOUT- 50Ω ( ) 50Ω AUX_+/AUX_50Ω IN_+ X_+ OUT_+ TX_+/TX_50Ω RX1_+/RX1_- 50Ω HP0_+/HP0_GND IN_X_OUT_- DIFFERENTIAL CROSSTALK DIFFERENTIAL CROSSTALK = 20log VOUT+ - VOUTVIN+ - VIN- MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. DIFFERENTIAL OFF-ISOLATION IS MEASURED BETWEEN IN_ AND “OFF” D_ OR TX_, X_ AND “OFF” HPD_ OR RX1_, OUT_ AND “OFF” AUX_ OR RX0_ TERMINAL ON EACH SWITCH. DIFFERENTIAL ON-LOSS IS MEASURED BETWEEN IN_ AND “ON” D_ OR TX_, X_ AND “ON” HPD_ OR RX1_, OUT_ AND “ON” AUX_ OR RX0_ TERMINAL ON EACH SWITCH. DIFFERENTIAL CROSSTALK IS MEASURED BETWEEN ANY TWO PAIRS. Figure 2. Differential On-Loss, Differential Off-Isolation, and Differential Crosstalk _______________________________________________________________________________________ 7 MAX4928A/MAX4928B Test Circuits/Timing Diagrams (continued) MAX4928A/MAX4928B DisplayPort/PCIe Passive Switches Pin Description PIN MAX4928A NAME 1, 11, 16, 20, 21, 1, 11, 16, 20, 21, 28, 29, 35, 48, 28, 29, 35, 48, 49, 56 49, 56 GND Ground IN0+ Analog Switch 1—Common Positive Terminal Analog Switch 1—Common Negative Terminal 2 4 3 5 IN0- 4 7 IN1+ Analog Switch 2—Common Positive Terminal 5 8 IN1- Analog Switch 2—Common Negative Terminal VDD Positive Supply Voltage Input. Connect VDD to a +3.0V to +3.6V supply voltage. Bypass VDD to GND with a 0.1µF ceramic capacitor placed as close as possible to the device. See the Board Layout section. 6, 17, 22, 27, 34, 6, 17, 22, 27, 34, 50, 55 50, 55 8 FUNCTION MAX4928B 7 9 IN2+ Analog Switch 3—Common Positive Terminal 8 10 IN2- Analog Switch 3—Common Negative Terminal 9 12 IN3+ Analog Switch 4—Common Positive Terminal 10 13 IN3- Analog Switch 4—Common Negative Terminal 12 14 OUT+ Analog Switch 5—Common Positive Terminal 13 15 OUT- Analog Switch 5—Common Negative Terminal 14 18 X+ Analog Switch 6—Common Positive Terminal 15 19 X- Analog Switch 6—Common Negative Terminal 18 2 SEL Control Signal Input 19 3 LE Latch Enable Input 23 30 HPD2 24 31 HPD1 Analog Switch 6—Normally Open Positive Terminal 25 32 AUX- Analog Switch 5—Normally Open Negative Terminal 26 33 AUX+ Analog Switch 5—Normally Open Positive Terminal 30 23 RX1- Analog Switch 6—Normally Closed Negative Terminal 31 24 RX1+ Analog Switch 6—Normally Closed Positive Terminal 32 25 RX0- Analog Switch 5—Normally Closed Negative Terminal 33 26 RX0+ Analog Switch 5—Normally Closed Positive Terminal 36 44 D3- Analog Switch 4—Normally Open Negative Terminal 37 45 D3+ Analog Switch 4—Normally Open Positive Terminal 38 46 D2- Analog Switch 3—Normally Open Negative Terminal 39 47 D2+ Analog Switch 3—Normally Open Positive Terminal 40 51 D1- Analog Switch 2—Normally Open Negative Terminal 41 52 D1+ Analog Switch 2—Normally Open Positive Terminal 42 53 D0- Analog Switch 1—Normally Open Negative Terminal 43 54 D0+ Analog Switch 1—Normally Open Positive Terminal 44 36 TX3- Analog Switch 4—Normally Closed Negative Terminal 45 37 TX3+ Analog Switch 4—Normally Closed Positive Terminal 46 38 TX2- Analog Switch 3—Normally Closed Negative Terminal Analog Switch 6—Normally Open Negative Terminal _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches PIN MAX4928A MAX4928B 47 39 51 52 NAME FUNCTION TX2+ Analog Switch 3—Normally Closed Positive Terminal 40 TX1- Analog Switch 2—Normally Closed Negative Terminal 41 TX1+ Analog Switch 2—Normally Closed Positive Terminal 53 42 TX0- Analog Switch 1—Normally Closed Negative Terminal 54 43 TX0+ — — EP Analog Switch 1—Normally Closed Positive Terminal Exposed Pad. Connect EP to GND. Exposed pad internally connected to GND. Detailed Description The MAX4928A/MAX4928B high-speed passive switches route PCI Express (PCIe) data and/or DisplayPort signals between two possible destinations. The MAX4928A/ MAX4928B are ideal for routing signals between a graphics memory controller hub (GMCH) and either a DisplayPort or PCIe connector. The MAX4928A/MAX4928B feature a single digital control input (SEL) to switch signal paths and a latch input (LE) that holds the switches in a given state. Digital Control Input (SEL) The MAX4928A/MAX4928B provide a single digital control input (SEL) to select the signal path between the IN_ and D_/TX_, X_ and HPD_/RX1_, and OUT_ and AUX_/RX0_ channels. The truth tables for the MAX4928A/MAX4928B are depicted in the Functional Diagrams/Truth Table. Drive SEL rail-to-rail to minimize power consumption. Latch Control Input (LE) The MAX4928A/MAX4928B provide a single digital control input (LE) to latch the signal paths between the IN_ and D_/TX_, X_ and HPD_/RX1_, and OUT_ and AUX_/RX0_ channels. When LE is driven high, the switches are held in their previous state, regardless of the input signal to SEL. Drive LE rail-to-rail to minimize power consumption. Analog Signal Levels The MAX4928A/MAX4928B accept standard PCIe signals to a maximum of (VDD - 1.8V). Signals on the IN_+ channels are routed to either the D_+ or TX_+ channels, signals on the X+ channel are routed to either HPD1 or RX1+ channels, and signals on the OUT+ channel are routed to either AUX+ or RX0+ channels. Signals on the IN_- channels are routed to either the D_- or TX_- channels, signals on the X- channel are routed to either HPD2 or RX1- channels, and signals on the OUT- channel are routed to either AUX- or RX0- channels. The MAX4928A/MAX4928B are bidirectional switches, allowing IN_, X_, OUT_, D_, TX_, HPD_, RX_, and AUX_ to be used as either inputs or outputs. Applications Information DisplayPort/PCIe Switching The MAX4928A/MAX4928B primary applications are aimed to switch between a GMCH and either a DisplayPort or PCIe connector. The MAX4928A/ MAX4928B contain n-channel switches to permit differential signals to be selected between a PCIe Gen II socket or to a DisplayPort connector. Each device handles up to six pairs of signals. The DisplayPort signal is an AC-coupled 8b/10b encoded differential signal ranging up to 2.7 Gbps. The PCIe Gen I and Gen II signals are AC-coupled, 8b/10b encoded differential signals ranging up to 5.0Gbps. Board Layout High-speed switches require proper layout and design procedures for optimum performance. Keep designcontrolled impedance PCB traces as short as possible or follow impedance layouts per the PCIe specification. Ensure that power-supply bypass capacitors are placed as close as possible to the device. Multiple bypass capacitors are recommended. Connect all grounds and the exposed pad to large ground planes. Chip Information PROCESS: CMOS _______________________________________________________________________________________ 9 MAX4928A/MAX4928B Pin Description (continued) DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B Functional Diagram/Truth Table VDD MAX4928A MAX4928B IN0+ TX0+ IN0- TX0D0+ D0- IN1+ TX1+ IN1- TX1D1+ D1- IN2+ TX2+ IN2- TX2D2+ LE SEL 1 0 0 X 0 1 IN_ TO TX_, IN_ TO DO_, X_ TO RX1_, X_ TO HPD_, OUT_ TO RX0_ OUT_ TO AUX_ NO CHANGE ON OFF NO CHANGE OFF ON D2IN3+ TX3+ IN3- TX3D3+ D3- X = DON'T CARE. X+ RX1+ X- RX1HPD1 HPD2 OUT+ RX0+ OUT- RX0AUX+ AUX- CONTROL LATCH SEL LE GND 10 ______________________________________________________________________________________ DisplayPort/PCIe Passive Switches DP CONNECTOR VDD VCC = 1V PCIe BUFF 1 PCIe BUFF 2 PCIe BUFF 3 PCIe BUFF 4 PCIe IN AUX CHANNEL SELECT IN0+ IN0IN1+ IN1IN2+ IN2IN3+ IN3X+ XOUT+ OUT- MAX4928A MAX4928B D0+ D0D1+ D1D2+ D2D3+ D3HPD1 HPD2 AUX+ AUX- VCC N GRAPHICS AND MEMORY CONTROLLER HUB D0 D1 D2 D3 D4 D5 D6 D7 HPD AUX AUX 1.5kΩ 100kΩ TX0+ TX0TX1+ TX1TX2+ TX2TX3+ TX3RX1+ RX1RX0+ RX0- SEL LE GND PCIe GRAPHICS CONNECTOR SUPPLY VOLTAGE VCC = 1V ______________________________________________________________________________________ 11 MAX4928A/MAX4928B Typical Operating Circuit MAX4928A/MAX4928B DisplayPort/PCIe Passive Switches Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. 12 PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 56 TQFN-EP T56511-1 21-0187 ______________________________________________________________________________________ DisplayPort/PCIe Passive Switches REVISION NUMBER REVISION DATE 0 2/08 Initial release 1 8/08 Changed functional diagram and limits DESCRIPTION PAGES CHANGED — 1, 2, 11 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX4928A/MAX4928B Revision History