Raising the bar in price/performance for the competitive LCD monitor market,
the SiI 859 brings rich enhancements to the low-cost, pure digital monitor.
By providing competitive advantages over analog and dual-mode LCD monitors,
pure digital monitors using the SiI 859 are a superior value proposition for
the end user. Among these differentiating advantages include: lower cost by
eliminating unnecessary analog conversion components, ease of use with
no adjustments ever required, and the best possible image quality.
As with earlier generations of PanelLink controllers, the SiI 859 provides an
integrated PanelLink Digital receiver, programmable On-Screen Display (OSD),
power management and image processing, including: scaling, dithering and
independent input & output gamma tuning. The SiI 859 adds higher bandwidth
up to a 112 MHz pixel clock rate and improved scaling with programmable
weight tables. A low-jitter 5x clock multiplier provides more cost-effective and
lower EMI clocking options. These improvements are delivered in a 100-pin TQFP
package that is pin-compatible with the popular SiI 851 controller for an easy
upgrade path.
The SiI 859 provides a single-chip solution with the highest image quality and a
rich feature set. Fully DVI compliant, the SiI 859 has been tested for compatibility
with all LCD panels. Its flexibility for fully customizable OSD, gamma tuning and
even programmable scaling weights define the SiI 859 as the price performance
leader.
SiI 859 Features
PanelLink ® Controller
• Provides consistent, high-quality puredigital visual experience
• Enables easy development of DVIcompliant, pure-digital LCD monitors
• Eliminates analog image processing
artifacts (" Pixel Dust" )
• A cost-effective, single-chip solution
that lowers costs, increases reliability
and saves board space, making product
design easier
Input
• PanelLink Digital receiver for guaranteed
compatibility with DVI specification
• Supports input resolutions from 25MHz
to 112MHz pixel clock rate
Output
• Frequency range: 25MHz to 112MHz
• Output data timing may be staggered to
reduce ground bounce
• 24-bit one-pixel/clock or 48-bit twopixel/clock output for true color (16.7
million) support
PixelPrecision Scaling A lgorithm
• Automatically upscales and downscales
any image to output panel resolution
• Auto-detect functionality ensures
rapid scaling of incoming images
On-Screen-Display (OSD)
• Fully programmable OSD support allows
for localized messaging for specific
regions and market segments
• Built-in loss-of-sync and out-of-range
functions
• Micro-controller optional for lower cost
• Finite Impulse Response (FIR) filter provides Pow er M anagement
high image quality for both text and
• Supports DVI and VESA ® DPMS™ power
graphics using programmable weight tables.
management functionality
Algorithm allows for sharpening filter to be • Pulse Width Modulation (PWM) output
applied for enhanced text scaling
can be used to control backlight
• Dithering allows 24-bit true color (16.7
brightness
million) to be shown on 18-bit TFT
panels
• Independently programmable input and
output gamma look up tables
• Frame rate preservation locks outgoing
frame rate with incoming frame rate to
prevent temporal artifacts such as
judder1 and tearing2
Part Number - SiI859CT100
1
2
Judder - Objects moving in abrupt steps across the screen.
Tearing - The screen splits from one image to the next along a
horizontal line.
© 2000 Silicon Image, Inc. All rights reserved. Silicon Image, the Silicon Image logo, PanelLink, the PanelLink logo and PixelPrecision are
trademarks or registered trademarks of Silicon Image, Inc. in the United States and other countries. Other trademarks are the property of
their respective holders. Product specifications are subject to change without notice. Printed in the U.S.A. 12/00 SiI PB-0009
Silicon Image's
SiI 859 Starter K it
The CP859DVI starter kit includes all of the
hardware, software and documentation
necessary to set up a high-performance,
DVI-compliant monitor using Silicon
Image’s SiI 859. The SiI 859’s registers and
configuration EEPROM on the development
board can be programmed and read in real
time though a serial port. A programmable
EDID EEPROM enables easy system-level
Plug & Play testing. The printed circuit board
schematics, sample firmware, configuration
files and application notes are provided as
references so that new designs can quickly
launch to market with the SiI 859.
Contents include:
Hardw are
• SiI 859 development board
• Power supply and cables
Softw are
• Digital Visual Editor
• 8051 firmware
• Evaluation C compiler
• Sample OSDs
Documentation
• SiI 859 starter kit user’s guide
• SiI 859 datasheet
• Reference schematics
Silicon Image, Inc.
1060 E. A rques, Sunnyvale, CA
94085
T 408.616.4000
F 408.830.9530
w w w .siimage.com