SP7661
Wide Input Voltage Range
3A, 600kHz, Buck Regulator
PowerBlox
SP7661
FEATURES
DFN PACKAGE
7mm x 4mm (Option 2)
■ 4.75V to 22V Input Voltage Range using Single Supply
■ 3V to 22V Input Voltage Range using Dual Supply
LX 26
■ ±1% 0.8V Reference
BOTTOM VIEW
LX 25
■ 3A Output Capability
Heatsink Pad 1
Connect to Lx
LX 24
■ Current Limiting using Inductor DCR
LX 23
■ Built in Low RDS(ON) Power Switches
VCC
■ 600kHz Fixed Frequency Operation
22
Pin 27
1
PGND
2
PGND
3
PGND
4
PGND
5
GND
UVIN 21
6
VFB
■ Short Circuit Protection with Auto-Restart
GND 20
7
COMP
■ Wide BW Amp Allows Type II or III Compensation
GND 19
8
SS
9
GND
■ Over Temperature Protection
■ Programmable Soft Start
VIN 18
■ Fast Transient Response
BST 17
■ High Efficiency: Greater than 93% Possible
LX 16
■ Nonsynchronous Start-Up into a Pre-Charged Output
LX 15
■ Available in RoHS Compliant, Lead Free Packaging:
TM
Heatsink Pad 2
Connect to GND
Pin 28
10 ISN
Heatsink Pad 3
Connect to VINP
Pin 29
LX 14
Small 7mm x 4mm DFN
11 ISP
12 SWN
13 VINP
■ U.S. Patent #6,922,041
DESCRIPTION
The SP7661 is a synchronous step-down switching regulator optimized for high efficiency. The part is designed
for use with a single 4.75V to 22V single supply or 3V to 22V input if an external Vcc is provided. The SP7661
provides a fully integrated buck regulator solution using a fixed 600kHz frequency, PWM voltage mode architecture.
Protection features include UVLO, thermal shutdown, output current limit and short circuit protection. The SP7661
is available in the space saving DFN package.
TYPICAL APPLICATION CIRCUIT
VIN
12V (9.6V-22V)
VOUT
3.30V, 0-3A
C
22uF
LX
GND
LX
26
LX
25
LX
24
LX
23
PGND
RZ2
3
PGND
4.02k
4
PGND
5
GND
VCC
22
6
VFB
UVIN
2
7
COMP
GND
20
8
SS
GND
19
9
GND
VIN
18
0
ISN
BST
7
ISP
LX
6
2
SWN
LX
15
3
VIN
LX
14
CSS 47nF
ISN
ISP
LX
SP7661
29
C9 6.8nF
U1
VINPAD
CP 56pF
CF1
100pF
R3
5.11k
2
VFB
6800pF
PGND
SWNPAD
2
GNDPAD
28
CZ2
L1,Wurth-744311220
2.2uH,14mOhm,7x7mm,9A
27
C2
22uF
LX
C5
100uF
C4 47nF
R9
ISP
61.9k
RZ3
400
ISN
CVCC
4.7uF
R
0k
CZ3
1500pF
NC
VFB
4
GND
R2
3.16k
SD101AWS
DBST
22nF
CBST
Rs2
1Ohm
Mar 1-07 Rev N
3
R4
5.11k
Cs2
2.2nF
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections
of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
Storage Temperature.................................................... -65°C to 150°C
Power Dissipation.........................................Internally Limited via OTP
Lead Temperature (Soldering, 10 sec)........................................300°C
ESD Rating............................................................................ 2kV HBM
Thermal Resistance θJC............................................................ 5°C/W
VCC ...................................................................................................7V
VIN .................................................................................................25V
BST................................................................................................. 30V
LX-BST................................................................................-0.3V to 7V
LX.........................................................................................-1V to 30V
All other pins........................................................... -0.3V to VCC + 0.3V
ELECTRICAL SPECIFICATIONS
Specifications are for TAMB = TJ = 25°C, and those denoted by ♦ apply over the full operating range, -40°C< Tj< 125°C. Unless
otherwise specified: 4.5V < Vcc < 5.5V, 3V < Vin < 22V, BST = LX + 5V, UVIN = 3V, CVCC = 1µF, CCOMP = 0.1µF, Css = 50nF.
PARAMETER
MIN
TYP
MAX UNITS ♦
CONDITIONS
QUIESCENT CURRENT
Vin Supply Current (No switching)
Vin Supply Current
(switching)
BST Supply Current (No switching)
BST Supply Current
(switching)
♦
Vfb= 0.9V
♦
Vfb= 0.9V
1.5
3.0
mA
8
14
mA
0.2
0.4
mA
3
6
mA
Vcc UVLO Start Threshold 4.00
4.25
4.50
V
♦
Vcc UVLO Hysteresis
100
200
300
mV
UVIN Start Threshold
2.30
2.50
2.65
V
UVIN Hysteresis
200
300
400
mV
µA
♦
♦
♦
♦
PROTECTION: UVLO
UVIN Input Current
1.0
UVIN=3.0V
ERROR AMPLIFIER REFERENCE
2X Gain Config., Measure
Vfb; Vcc=5V
Error Amplifier Reference
0.792 0.800 0.808
V
Error Amplifier
Reference Over Line
0.784 0.800 0.816
V
♦
µA
♦
Vfb=0.9V, COMP=0.9V
COMP Sink Current
COMP Source Current
70
150
230
-230
-150
-70
µA
♦
Vfb=0.9V, COMP=0.9V
50
200
nA
♦
Vfb=0.8V
3.5
3.8
V
Vfb Input Bias Current
COMP Clamp
3.2
COMP Clamp Temp. Coefficient
Vfb=0.7V, TA=25°C
mV/°C
-2.0
VCC Linear Regulator
VCC Output Voltage
Dropout Voltage
Mar 1-07 Rev N
4.7
5.0
4.51
4.73
250
500
5.3
750
V
mV
VIN = 6 to 23V,
ILOAD = 0mA to 30mA
♦ VIN = 5V, 20mA
Vin-Vout = Dropout voltage when
♦ Vcc regulated drops by 2%. IVCC = 30 mA. ♦
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
ELECTRICAL SPECIFICATIONS
Specifications are for TAMB = TJ = 25°C, and those denoted by ♦ apply over the full operating range, -40°C< Tj< 125°C. Unless
otherwise specified: 4.5V < Vcc < 5.5V, 3V < Vin < 22V, BST = LX + 5V, UVIN = 3V, CVCC = 1µF, CCOMP = 0.1µF, Css = 50nF.
PARAMETER
MIN TYP MAX UNITS ♦
CONDITIONS
CONTROL LOOP: PWM COMPARATOR, RAMP & LOOP DELAY PATH
Ramp Amplitude
RAMP Offset
0.80
1.00
1.20
V
1.7
2.0
2.3
V
Ramp offset Temperature
Coefficient
-2
GH Minimum Pulse Width
150
Maximum Controllable
Duty Ratio
92
♦
♦
mV/°C
180
97
ns
♦
%
♦
%
♦
Maximum Duty Ratio
100
Internal Oscillator Ratio
510
600
690
kHZ
♦
SS Charge Current:
-16
-10
-4.0
µA
♦
SS Discharge Current:
1.0
2.0
3.0
mA
♦
Valid for 20 cycles
TIMERS: SOFTSTART
Fault Present,
SS=0.2V
PROTECTION: SHORT CIRCUIT, OVERCURRENT & THERMAL
Short Circuit Threshold
Voltage
0.2
0.25
0.3
V
♦
90
Hiccup Timeout
Overcurrent Threshold
54
Voltage
ISP, ISN Common Mode
0
Range
Thermal Shutdown
135
Temperature
Thermal Recovery
Temperature
Thermal Hysteresis
110
130
ms
♦
60
66
mV
3.6
V
155
°C
145
135
°C
10
°C
Vfb=0.5V
Measured ISP - ISN
Guaranteed by design
OUTPUT: POWER STAGE
High Side Switch RDSON
35
75
mΩ
Synchronous Low Side
Switch RDSON
35
75
mΩ
Maximum Output
Current
Mar 1-07 Rev N
3
A
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
VGS=4.5V;
Idrain=4.1A; TAMB=25°C
VGS=4.5V;
Idrain=4.1A; TAMB=25°C
♦
© 2007 Sipex Corporation
CONTROLLER BLOCK DIAGRAM
C OMP
VC C
A S Y NC . S TAR TUP
C OMP A R A TOR
SS
GL HOLD OFF
V FB INT
1.6 V
BS T
P W M LO O P
V FB
VC C
Gm ER R OR A MP LIFIE R
RE S E T
DOMINA NT
VCC
10 uA
FA ULT
Gm
VPOS
S OFTS TA R T INP UT
R
Q
0.1V
P OS R E F
SS
GH
S Y NC HR O NO US
DR I V E R
QP W M
S WN
S
FAULT
GL
FA ULT
600 kHZ
P GN D
R AMP =1V
C LK
C LOC K P ULS E GEN E R A TOR
FAULT
1.3 V
2.8 V
R E FE R E NC E
C OR E
V CC
0.8V
R E F OK
PO W E R
FA ULT
4.25 V ON
4.05 V OFF
THE R MA L
S HUTDOW N
SET
DOMINA NT
145ºC O N
135ºC O FF
S
VC C UV LO
HIC C UP FAULT
Q
0.25V
VP OS
5V
R
S HOR TC IR C UIT
DE TE C TION
GND
V FB INT
LINE A R
R E GULA TOR
200ms D elay
OV E R C UR R E NT
DE TE C TION
R E F OK
60 mV
140K
IS P
2.50 V ON
2.20 V O FF
VIN UV LO
C LK
C LR
V IN
UV IN
C OU NTE R
IS N
T HE R MA L A ND O V E R C UR R E NT P R O T E C T IO N
50K
UV LO C O MP A R AT O R S
Note: Note:
The The
SP7663
usesuses
the Sipex
PWM
controller
SP6136.
SP7661
the Sipex
PWM
controller
SP6136
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
PIN DESCRIPTION
SP7661
DFN PACKAGE
7mm x 4mm (Option 2)
LX 26
LX 25
LX 24
BOTTOM VIEW
Heatsink Pad 1
Connect to Lx
LX 23
VCC 2 2
Pin 27
1
PGND
2
PGND
3
PGND
4
PGND
5
GND
UVIN 21
6
VFB
GND 20
7
COMP
8
SS
9
GND
GND 19
Heatsink Pad 2
Connect to GND
VIN 18
Pin 28
10 ISN
BST 17
LX 16
LX 15
Heatsink Pad 3
Connect to VINP
Pin 29
LX 14
11 ISP
12 SWN
13 VINP
Pin
Pin # Name
Description
1-4
PGND Ground connection for the synchronous rectifier.
Ground Pin. The control circuitry of the IC and lower power driver are referenced to this
5, 9,
GND
19, 20
pin. Return separately from other ground traces to the (-) terminal of Cout.
6
7
8
10
VFB
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of the
Error Amplifier and serves as the output voltage feedback point for the Buck
Converter. The output voltage is sensed and can be adjusted through an external
resistor divider. Whenever VFB drops 0.25V below the positive reference, a short
circuit fault is detected and the IC enters hiccup mode.
Output of the Error Amplifier. It is internally connected to the inverting input of the
COMP PWM comparator. An optimal filter combination is chosen and connected to this
pin and either ground or VFB to stabilize the voltage mode loop.
Soft Start. Connect an external capacitor between SS and GND to set the soft start
SS
rate based on the 10µA source current. The SS pin is held low via a 1mA (min)
current during all fault conditions.
ISN Current sense negative input. Rail-to-rail input for overcurrent detection.
11
ISP
12
SWN
Lower supply rail for the GH high-side gate driver. Connect this pin to the switching
node as close as possible to pins 23- 27. Do not connect this pin to pins 14 – 16.
Input connection to the high side N-channel MOSFET.
13
VINP
14-16,
23-26
LX
17
BST
18
VIN
21
UVIN
22
VCC
Mar 1-07 Rev N
Current sense positive input. Rail-to-rail input for overcurrent detection.
Connect an inductor between this pin and VOUT.
High side driver supply pin. Connect BST to the external boost diode and capacitor
as shown in the Typical Application Circuit on page 1. The high side driver is
connected between BST pin and SWN pin.
Vin connection for internal LDO and PWM Controller.
UVLO input for Vin voltage. Connect a resistor divider between Vin and UVIN
to set minimum operating voltage. Use resistor values below 20kΩ to override
internal resistor divider. Output of internal regulator. May be exterinally biased if Vin < 5V.
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
THEORY OF OPERATION
General Overview
Soft Start
The SP7661 is a fixed frequency, voltage mode, synchronous PWM regulator
optimized for high efficiency. The part has
been specifically designed for single supply
operation from a 5V to 22V input.
“Soft Start” is achieved when a power converter ramps up the output voltage while
controlling the magnitude of the input supply source current. In a modern step down
converter, ramping up the positive terminal
of the error amplifier controls soft start. As a
result, excess source current can be defined
as the current required to charge the output
capacitor.
The heart of the SP7661 is a wide bandwidth
transconductance amplifier designed to accommodate Type II and Type III compensation schemes. A precision 0.8V reference,
present on the positive terminal of the error
amplifier, permits the programming of the
output voltage down to 0.8V via the VFB
pin. The output of the error amplifier, COMP,
is compared to a 1.1V peak-to-peak ramp,
which is responsible for trailing edge PWM
control. This voltage ramp and PWM control
logic are governed by the internal oscillator
that accurately sets the PWM frequency to
600kHz.
IVIN = Cout • (∆Vout / ∆Tsoft-start)
The SP7661 provides the user with the option to program the soft start rate by tying
a capacitor from the SS pin to GND. The
selection of this capacitor is based on the
10µA pull up current present at the SS pin
and the 0.8V reference voltage. Therefore,
the excess source can be redefined as:
IVIN = Cout • [∆Vout •10µA / (Css • 0.8V)]
Under Voltage Lock Out (UVLO)
The SP7661 contains two unique control
features that are very powerful in distributed
applications. First, nonsynchronous driver
control is enabled during startup, to prohibit
the low side switch from pulling down the
output until the high side switch has attempted to turn on. Second, a 100% duty
cycle timeout ensures that the low side switch
is periodically enhanced during extended
periods at 100% duty cycle. This guarantees the synchronized refreshing of the
BST capacitor during very large duty ratios.
The SP7661 has two separate UVLO comparators to monitor the bias (Vcc) and Input
(Vin) voltages independently. The Vcc UVLO
is internally set to 4.25V. The Vin UVLO is
programmable through UVIN pin. When
UVIN pin is greater than 2.5V the SP7661
is permitted to start up pending the removal
of all other faults. A pair of internal resistors
is connected to UVIN as shown in the figure
below.
SP7661
The SP7661 also contains a number of valuable protection features. Programmable VIN
UVLO allows the user to set the exact value
at which the conversion voltage can safely
begin down-conversion, and an internal VCC
UVLO which ensures that the controller itself
has enough voltage to properly operate.
Other protection features include thermal
shutdown and short-circuit detection. In the
event that either a thermal, short-circuit, or
UVLO fault is detected, the SP7661 is forced
into an idle state where the output drivers
are held off for a finite period before a restart
is attempted.
Mar 1-07 Rev N
VIN
R6
140KΩ
UVIN
+
2.5V ON
2.2V OFF
R7
50KΩ
GND
Internal and external bias of UVIN
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
THEORY OF OPERATION
Therefore without external biasing the Vin
start threshold is 9.5V. A small capacitor may
be required between UVIN and GND to filter
out noise. For applications with Vin of 5V
or 3.3V, connect UVIN directly to Vin. To
program the Vin start threshold, use a pair
of external resistors as shown. If external
resistors are an order of magnitude smaller
than internal resistors, then the Vin start
threshold is given by:
across the inductor. Over-current is detected by monitoring a differential voltage
across the output inductor as shown in the
next figure.
SP7661
SWN
L=2.7uH,DCR=4.1mΩ
R3
5.11KΩ
Vin(start) = 2.5 • (R6+R7)/R7
For example, if it is required to have a Vin
start threshold of 7V, then let R7 = 5KΩ and
using the Vin start threshold equation we get
R6 = 9.09KΩ.
VOUT
R4
5.11KΩ
ISP
ISN
CSP
6.8nF
CS
0.1uF
Thermal and Short-Circuit Protection
Because the SP7661 is designed to drive
large output current, there is a chance that
the power converter will become too hot.
Therefore, an internal thermal shutdown
(145°C) has been included to prevent the
IC from malfunctioning at extreme temperatures.
Over-current detection circuit
Inputs to an over-current detection comparator, set to trigger at 60 mV nominal, are
connected to the inductor as shown. Since
the average voltage sensed by the comparator is equal to the product of inductor
current and inductor DC resistance (DCR),
then Imax = 60mV / DCR. Solving this equation for the specific inductor in circuit 1, Imax
= 14.6A. When Imax is reached, a 220 ms
time-out is initiated, during which top and
bottom drivers are turned off. Following the
time-out, a restart is attempted. If the fault
condition persists, then the time-out is repeated (referred to as hiccup).
A short-circuit detection comparator has
also been included in the SP7661 to protect
against an accidental short at the output of
the power converter. This comparator constantly monitors the positive and negative
terminals of the error amplifier, and if the VFB
pin falls more than 250mV (typical) below
the positive reference, a short-circuit fault
is set. Because the SS pin overrides the
internal 0.8V reference during soft start, the
SP7661 is capable of detecting short-circuit
faults throughout the duration of soft start as
well as in regular operation.
Increasing the Current Limit
If it is desired to set Imax > {60mV / DCR} (in
this case larger than 14.6A), then a resistor
R9 should be added as shown in the next
figure. R9 forms a resistor divider and reduces the voltage seen by the comparator.
(Imax • DCR)
Since: 60mV
=
R9 {R3 + R4 + R9} Over-Current Protection
The Over-current protection feature can
only be used on output voltages ≤ 3.3 volts.
It is limited by the common mode rating
of the op-amp used to sense the voltage
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
THEORY OF OPERATION
Solving for R9 we get:
R8 = R9 = [60mV • (R3 + R4)] [(Imax • DCR) – 60mV]
R4 • [VOUT - 60mV + (IMAX • DCR)]
60mV - (IMAX • DCR)
As an example: if desired Imax is 17A, then
R9 = 63.4KΩ.
As an example: for Imax of 4A and Vout of 3.3V,
calculated R8 is 381kΩ.
SP7661
SP7661
SWN
L=2.7uH,DCR=4.1mΩ
R3
5.11KΩ
SWN
L=2.7uH,DCR=4.1mΩ
R4
5.11KΩ
R3
5.11KΩ
VOUT
R4
5.11KΩ
R9
63.4KΩ
ISP
ISN
VOUT
ISP
CSP
6.8nF
ISN
CSP
6.8nF
CS
0.1uF
R8
1.5MΩ
CS
0.1uF
Over-current detection circuit for
Imax < {60mV / DCR}
Over-current detection circuit for
Imax > 60mV / DCR
Decreasing the Current Limit
Handling of Faults
If it is required to set Imax < {60mV / DCR, a
resistor is added as shown in the following
figure. R8 increases the net voltage detected
by the current-sense comparator. Voltage at
the positive and negative terminal of comparator is given by:
Upon the detection of power (UVLO), thermal, or short-circuit faults, the SP7661 is
forced into an idle state where the SS and
COMP pins are pulled low and both switches
are held off. In the event of UVLO fault, the
SP7661 remains in this idle state until the
UVLO fault is removed. Upon the detection
of a thermal or short-circuit fault, an internal
100ms timer is activated. In the event of a
short-circuit fault, a restart is attempted immediately after the 100ms timeout expires. Whereas, when a thermal fault is detected
the 100ms delay continuously recycles and a
restart cannot be attempted until the thermal
fault is removed and the timer expires.
VSP = Vout + (Imax • DCR)
VSN = Vout • {R8 / (R4 +R8)}
Since the comparator is triggered at 60mV:
VSP-VSN = 60 mV
Combining the above equations and solving for R8:
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
APPLICATIONS INFORMATION
Error Amplifier and Voltage Loop
The second feature is a 100% duty cycle
timeout that ensures synchronized refreshing of the BST capacitor at very high duty
ratios. In the event that the high side NFET
is on for 20 continuous clock cycles, a reset
is given to the PWM flip flop half way through
the 21st cycle. This forces GL to rise for the
cycle, in turn refreshing the BST capacitor.
The boost capacitor is used to generate a
high voltage drive supply for the high side
switch, which is Vcc above VIN.
The heart of the SP7661 voltage error loop
is a high performance, wide bandwidth
transconductance amplifier. Because of
the amplifier’s current limited (+/-150µA)
transconductance, there are many ways to
compensate the voltage loop or to control the
COMP pin externally. If a simple, single-pole,
single-zero response is desired, then compensation can be as simple as an RC circuit
to Ground. If a more complex compensation
is required, then the amplifier has enough
bandwidth (45° at 4 MHz), and enough gain
(60dB) to run Type III compensation schemes
with adequate gain and phase margins at
crossover frequencies greater than 50kHz. Power MOSFETs
The SP7661 contains a pair of integrated low
resistance N-channel switches designed to
drive up to 3A of output current. Care should
be taken to de-rate the output current based
on the thermal conditions in the system such
as ambient temperature, airflow and heat
sinking. Maximum output current could be
limited by thermal limitations of a particular
application by taking advantage of the integrated-over-temperature protective scheme
employed in the SP7661. The SP7661 incorporates a built-in overtemperature protection
to prevent internal overheating.
The common mode output of the error amplifier is 0.9V to 2.2V. Therefore, the PWM
voltage ramp has been set between 1.1V and
2.2V to ensure proper 0% to 100% duty cycle
capability. The voltage loop also includes
two other very important features. One is a
nonsynchronous startup mode. Basically, the
synchronous rectifier cannot turn on unless
the high side switch has attempted to turn
on or the SS pin has exceeded 1.7V. This
feature prevents the controller from “dragging
down” the output voltage during startup or
in fault modes.
Setting Output Voltages
The SP7661 can be set to different output
voltages. The relationship in the following
formula is based on a voltage divider from
the output to the feedback pin VFB, which is
set to an internal reference voltage of 0.80V. Standard 1% metal film resistors of surface
mount size 0603 are recommended.
VBST
GH
Voltage
VSWN
V(VCC)
GL
Voltage
Vout = 0.80V [R1 / R2 + 1 ] =>
R2 = R1 / [ ( Vout / 0.80V ) – 1 ]
0V
V(VIN)
SWN
Voltage
Where R1 = 10KΩ and for Vout = 0.80V
setting, simply remove R2 from the board.
Furthermore, one could select the value of
the R1 and R2 combination to meet the exact
output voltage setting by restricting the R1
resistance range such that 10KΩ < R1 <
100KΩ for overall system loop stability. -0V
-V(Diode) V
V(VIN)+V(VCC)
BST
Voltage
V(VCC)
TIME
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
© 2007 Sipex Corporation
APPLICATIONS INFORMATION
and provide low core loss at the high
switching frequency. Low cost powderediron cores have a gradual saturation characteristic but can introduce considerable
AC core loss, especially when the inductor value is relatively low and the ripple
current is high. Ferrite materials, although
more expensive, have an abrupt saturation characteristic with the inductance
dropping sharply when the peak design
current is exceeded. Nevertheless, they
are preferred at high switching frequencies because they present very low core
loss while the designer is only required
to prevent saturation. In general, ferrite
or molypermalloy materials are a better
choice for all but the most cost sensitive
applications.
Inductor Selection
There are many factors to consider in selecting the inductor including core material,
inductance vs. frequency, current handling
capability, efficiency, size and EMI. In a typical SP7661 circuit, the inductor is chosen
primarily for value, saturation current and DC
resistance. Increasing the inductor value will
decrease output voltage ripple, but degrade
transient response. Low inductor values provide the smallest size, but cause large ripple
currents, poor efficiency and require more
output capacitance to smooth out the larger
ripple current. The inductor must be able
to handle the peak current at the switching
frequency without saturating, and the copper
resistance in the winding should be kept as
low as possible to minimize resistive power
loss. A good compromise between size, loss
and cost is to set the inductor ripple current
to be within 20% to 40% of the maximum
output current.
Optimizing Efficiency
The power dissipated in the inductor is equal
to the sum of the core and copper losses.
To minimize copper losses, the winding
resistance needs to be minimized, but this
usually comes at the expense of a larger
inductor. Core losses have a more significant
contribution at low output current where the
copper losses are at a minimum, and can
typically be neglected at higher output currents where the copper losses dominate.
Core loss information is usually available
from the magnetics vendor. Proper inductor selection can affect the resulting power
supply efficiency by more than 15%!
The switching frequency and the inductor
operating point determine the inductor value
as follows:
L =
.
Vout • (Vin(max) - Vout) Vin(max) • ƒs • Kr • Iout(max)
where:
ƒs = switching frequency
Kr = ratio of the AC inductor ripple current
to the maximum output current
The copper loss in the inductor can be calculated using the following equation:
The peak-to-peak inductor ripple current is:
IPP
=
Vout • (Vin(max) - Vout)
.
Vin(max) • ƒs •L
2
PL(Cu) = I L(RMS) • Rwinding
where IL(RMS) is the RMS inductor current
that can be calculated as follows:
Once the required inductor value is selected,
the proper selection of core material is based
on peak inductor current and efficiency requirements. The core must be large enough
not to saturate at the peak inductor current
Mar 1-07 Rev N
Ipeak = Iout(max) +
IL(RMS) = Iout(max) •
IPP
2
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
10
√ ( )
1+1
3
.
IPP
2
Iout(max)
© 2007 Sipex Corporation
APPLICATIONS INFORMATION
Output Capacitor Selection
∆VOUT =
The required ESR (Equivalent Series Resistance) and capacitance drive the selection of the type and quantity of the output
capacitors. The ESR must be small enough
that both the resistive voltage deviation due
to a step change in the load current and
the output ripple voltage do not exceed
the tolerance limits expected on the output
voltage. During an output load transient,
the output capacitor must supply all the additional current demanded by the load until
the SP7661 adjusts the inductor current to
the new value.
where:
ƒs • COUT
+ (IPP •RESR)
2
D = Duty Cycle
COUT = output capacitance value
Input Capacitor Selection
The input capacitor should be selected for
ripple current rating, capacitance and voltage rating. The input capacitor must meet
the ripple current requirement imposed
by the switching current. In continuous
conduction mode, the source current of
the high-side MOSFET is approximately a
square wave of duty cycle VOUT/VIN. More
accurately, the current wave form is trapezoidal, given a finite turn-on and turn-off,
switch transition slope. Most of this current
is supplied by the input bypass capacitors. The RMS current handling capability
of the input capacitors is determined at maximum output current and under the
assumption that the peak-to-peak inductor
ripple current is low, it is given by:
The ESR of the output capacitor, combined
with the inductor ripple current, is typically
the main contributor to output voltage ripple.
The maximum allowable ESR required to
maintain a specified output voltage ripple can
be calculated by:
)
2
ƒs = Switching Frequency
In order to maintain VOUT,the capacitance
must be large enough so that the output
voltage is held up while the inductor current ramps to the value corresponding
to the new load current. Additionally, the
ESR in the output capacitor causes a step
in the output voltage equal to the current.
Because of the fast transient response and
inherent 100% to 0% duty cycle capability
provided by the SP7661 when exposed to
output load transients, the output capacitor
is typically chosen for ESR, not for capacitance value.
√(
IPP • (1 – D)
ICIN(RMS) = Iout(max) • √D(1 - D)
The worst case occurs when the duty cycle
D is 50% and gives an RMS current value
equal to Iout/2. Select input capacitors with
adequate ripple current rating to ensure reliable operation.
RESR ≤ ∆VOUT
Ipk-pk
The power dissipated in the input capacitor is:
∆Vout = peak-to-peak output voltage ripple
Ipk-pk = peak-to-peak inductor ripple Current
PCIN = I CIN(RMS) • RESR(CIN)
The total output ripple is a combination of
the ESR and the output capacitance value
and can be calculated as follows:
This can become a significant part of power
losses in a converter and hurt the overall
energy transfer efficiency. The input voltage ripple primarily depends on the input
Mar 1-07 Rev N
2
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
11
© 2007 Sipex Corporation
APPLICATIONS INFORMATION
Loop Compensation Design
capacitor ESR and capacitance. Ignoring
the inductor ripple current, the input voltage
ripple can be determined by:
The open loop gain of the whole system can
be divided into the gain of the error amplifier, PWM modulator, buck converter output
stage, and feedback resistor divider. In order
to cross over at the desired frequency cut-off
(fco), the gain of the error amplifier must
compensate for the attenuation caused by
the rest of the loop at this frequency. The
goal of loop compensation is to manipulate loop frequency response such that its
crossover gain at 0db, results in a slope of
-20db/decade.
∆VIN =
Iout(max)•RESR(CIN) + Iout(max)•Vout•(Vin - Vout)
V2in • ƒs • CIN
The capacitor type suitable for the output
capacitors can also be used for the input
capacitors. However, exercise extra caution
when tantalum capacitors are used. Tantalum
capacitors are known for catastrophic failure
when exposed to surge current, and input
capacitors are prone to such surge current
when power supplies are connected “live”
to low impedance power sources. Although
tantalum capacitors have been successfully
employed at the input, it is generally not
recommended.
The first step of compensation design is
to pick the loop crossover frequency. High
crossover frequency is desirable for fast
transient response, but often jeopardizes the
power supply stability. Crossover frequency
should be higher than the ESR zero but
less than 1/5 of the switching frequency or
Type III Voltage Loop
Compensation
GAMP (s) Gain Block
VREF
(Volts)
PWM Stage
GPWM Gain
Block
VIN
(SRESRCOUT+ 1)
VRAMP_PP
[S^2LCOUT+S(RESR+RDC) COUT+1]
(SRz2Cz2+1)(SR1Cz3+1)
SR1Cz2(SRz3Cz3+1)(SRz2Cp1+1)
Output Stage
GOUT (s) Gain
Block
VOUT
(Volts)
Notes:
RESR = Output Capacitor Equivalent Series Resistance.
RDC = Output Inductor DC Resistance.
VRAMP_PP = SP7662 Internal Ramp Amplitude Peak-to-Peak Voltage.
Voltage Feedback
GFBK Gain Block
Condition:
Cz2 >> Cp1 & R1 >> Rz3
Output Load Resistance >> RESR & RDC
R2
VFBK
(Volts)
(R1 + R2)
or
VREF
VOUT
SP7661 Voltage Mode Control Loop with Loop Dynamic
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
12
© 2007 Sipex Corporation
APPLICATIONS INFORMATION
1
ƒP(LC) =
2π • √ L • Cout
120kHz. The ESR zero is contributed by the
ESR associated with the output capacitors
and can be determined by:
ƒ
=
z(esr)
.
1
When the output capacitors are of a Ceramic
Type, the SP7661 Evaluation Board requires
a Type III compensation circuit to give a phase
boost of 180° in order to counteract the effects
of an underdamped resonance of the output
filter at the double pole frequency.
2π • Cout • Resr
The next step is to calculate the complex
conjugate poles contributed by the LC
output filter,
Gain
(dB)
Error Amplifier
Gain Bandwidth Product
Condition:
C22 >> CP1, R1 >> RZ3
1/6.28 (RZ3) (CZ3)
1/6.28 (RZ2) (CP1)
1/6.28 (R1) (CZ2)
1/6.28 (R1) (CZ3)
1/6.28(R22) (CZ2)
20 Log (RZ2/R1)
Frequency
(Hz)
Bode Plot of Type III Error Amplifier Compensation.
CP1
RZ3
CZ3
CZ2
VOUT
R1
68.1kΩ, 1%
RSET =
VFB
+
RSET
54.48
(kΩ)
(VOUT -0.8)
+
- 0.8V
RZ2
COMP
CF1
Type III Error Amplifier Compensation Circuit
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
13
© 2007 Sipex Corporation
APPLICATIONS INFORMATION
VOUT
3.30V, 0-3A
L1, Wurth -744311220
2.2uH, 14 mOhm, 7x7mm, 9A
LX
1
2
3
RZ2
CZ2
6800pF
4
4.02k
5
CP1
56pF
6
7
CSS
CF1
100pF
47nF
8
9
R8
NP
10
11
C9
6.8nF
12
13
27
GND PAD
PGND
PGND
C4
LX
PGND
U1
LX
PGND
SP7661
LX
GND
VCC
VFB
UVIN
COMP
GND
SS
GND
GND
VIN
ISN
BST
ISP
LX
SWN
LX
VIN
R11
LX
47nF
C5
26
R9
100uF
61.9k
C6
C7
NP
NP
25
ISP
24
RZ3
ISN
400
23
CVCC
4.7uF
22
1
R1
10k
4
GND
R12
NP
CZ3
21
1500pF
20
R7
NP
19
R6
NP
18
C8
NP
R14
R2
NP
3160
17
16
RBST
0 Ohm
SD101AWS
DBST
15
14
22nF
CBST
29
ISN
R4
5.11K
0 Ohm
LX
VIN PAD
1
SWN PAD
28
3
R3
5.11K
ISP
LX
LX
VIN
12V (9.6V-22V)
Rs1
Cs1
NP
NP
Rs2
1 Ohm
Cs2
2.2nF
1
1
C3
NP
C2
22uF
C1
22uF
1
2
GND
Evaluation Board Schematic
Parts shown for 9.6V-22V input, 3.3V Output
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
14
© 2007 Sipex Corporation
typical performance characteristics
Efficiency vs. Load at 22VIN
90
90
80
80
70
Vout=5.0V
60
Vout=3.3V
70
Vout=5.0V
Vout=3.3V
60
Vout=2.5V
Vout=1.8V
Vout=2.5V
50
Efficiency vs Load at 12VIN
00
Efficiency (%)
Efficiency (%)
00
50
Vout=1.5V
Vout=1.8V
Vout=1.2V
40
40
0.5
1.0
1.5
2.0
2.5
0.5
3.0
1.0
Output Load (A)
Efficie ncy v s. Load at 5.0VIN
95
95
90
90
85
Vout=3.3V
Vout=2.5V
Vout=1.8V
Vout=1.5V
Vout=1.2V
Vout=0.8V
80
75
1.0
1.5
2.0
3.0
Vout=2.5V
80
Vout=1.8V
Vout=1.5V
Vout=1.2V
Vout=0.8V
2.5
3.0
Output Load (A)
Mar 1-07 Rev N
2.5
85
75
70
0.5
2.0
Efficiency vs. Load at 3.3VIN
00
Efficiency (%)
Efficiency (%)
00
1.5
Output Load (A)
70
2
2
3
3
Output Load (A)
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
15
© 2007 Sipex Corporation
typical performance characteristics
Transient Response:
CH1: Vout. CH4: Iout 1A/div.
Transient Response: CH1: Vout. CH4:
Iout 1A/div. Zoom showing ~1.5A/us Irate
Transient Response:
CH1: Vout. CH4: Iout 1A/div.
Short Circuit Protection: CH1:Vout.
CH2:Sstart. CH4:Iout(10A/div).
Short Circuit Protection: CH1:Vout. CH2:
Sstart. CH4:Input Current (5A/div).
Short Circuit Protection: CH1:Vout.
CH2:Sstart. CH4: Input Current (5A/div).
104ms restart rate shown.
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
16
© 2007 Sipex Corporation
typical performance characteristics
Start-up in to 3A Load: CH1:Vout.
CH2:SS. CH3:Vin. CH4: Iout (2A/div).
Current Limit: CH1: Vout. CH2:SoftStart.
CH4 Iout (2A/div). Current is reaching
approximtely 6A before a
shutdown & restart
Current Limit: CH1: Vout. CH2:SoftStart.
CH4 Iout (2A/div).
OCP Repeat rate is 107ms
12Vin Output Ripple: CH1:Vout. CH2:
Switch Node taken at 3A Out.
12Vin Output Ripple: CH1: Vout.
CH2: Switch Node taken at 0A Out.
22Vin Output Ripple: CH1: Vout.
CH2: Switch Node taken at 0A out.
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
17
© 2007 Sipex Corporation
typical performance characteristics
Operation from exernal bias:
CH2: Switchnode @ 2.34Vin.
22Vin Transient Response
CH1: Vout. CH4: Iout (1A/div).
Operation from exernal bias:
CH2: Switchnode @ 3Vin, Iout = 3A.
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
18
© 2007 Sipex Corporation
Package: 26 Pin dfn
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
19
© 2007 Sipex Corporation
ORDERING INFORMATION
Part Number
Junction Temperature
Package
SP7661ER/TR..................................-40°C to +125°C...................................................26 Pin 7 X 4 DFN
(Option 2)
SP7661ER-L/TR...............................-40°C to +125°C.........................(Lead Free) 26 Pin 7 X 4 DFN
(Option 2)
/TR = Tape and Reel
Pack quantity is 3,000 26 pin DFN.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Mar 1-07 Rev N
SP7661 Wide Input Voltage Range 3A, 600kHz Buck Regulator
20
© 2007 Sipex Corporation