AKM AKD4645-B

ASAHI KASEI
[AKD4645-B]
AKD4645-B
AK4645 Evaluation board Rev.0
GENERAL DESCRIPTION
AKD4645-B is an evaluation board for the AK4645, Stereo CODEC with built-in MIC/HP amplifier. The
AKD4645-B can evaluate A/D converter and D/A converter separately in addition to loop-back mode (A/D
→ D/A). The AKD4645-B also has the digital audio interface and can achieve the interface with digital
audio systems via opt-connector.
„ Ordering guide
AKD4645-B
---
Evaluation board for AK4645
(Cable for connecting with printer port of IBM-AT compatible PC and control
software are packed with this. This control software does not operate on Windows
NT.)
FUNCTION
• DIT/DIR with optical input/output
• 10pin Header for serial control mode
• On-board Stereo Class-D Speaker Amplifier (AK7830)
5V
GND
Regulator
3.3V
LIN1/
RIN1
Control Data
10pin Header
LIN2/
RIN2
MIN/
LIN3/
RIN3
DSP
10pin Header
LIN4/
RIN4
AK4645
HP
AK4114
(DIR/DIT)
LOUT/
ROUT
SPL /
SPR
Opt In
Opt Out
AK7830
(Class-D)
Figure 1. AKD4645-B Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual
<KM084500>
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ASAHI KASEI
[AKD4645-B]
Evaluation Board Manual
„ Operation sequence
1) Install the control software (Refer to page 9).
2) Set up the power supply lines.
[VCC]
(red)
= 5.0V (or 3.3V)
[TVDD]
(orange) = 1.6 ∼ 3.6V
[AGND] (black)
[DGND] (black)
: for TVDD of AK4645 (typ. 3.3V:≤DVDD)
= 0V
= 0V
Each supply line should be distributed from the power supply unit.
When the power is supplied to the AK4645 via the regulator, JP2 should be set to “REG” side and VCC should
be 5.0V.<default> (When the power is supplied from VCC jack to the AK4645 directly, JP2 should be set to
“VCC” side and VCC should be 3.3V.)
3) Set up the evaluation mode, jumper pins. (See the followings.)
4) Power on.
The AK4645 and AK4114 should be reset once bringing SW2 “L” upon power-up.
And the AK7830 should be reset once bringing SW1 (SPK_PDN) “L” upon power-up.
„ Evaluation mode
(1) Slave mode
(1-1) Evaluation of Recording block (MIC, ADC) using DIT of AK4114
(1-2) Evaluation of Playback block (HP, LINEOUT) using DIR of AK4114
(1-3) Evaluation of Loop-back using AK4114 <Default>
(1-4) All interface signals including master clock are fed externally.
The AK4114’s audio interface format is fixed to LJ compatible.
(1-1) Evaluation of Recording block using DIT of AK4114
PORT2 (DIT) and X1 (X’tal) are used. DIT generates audio bi-phase signal from received data and which is
output through optical connector (TOTX141). Nothing should be connected to PORT1 (DIR) and PORT3
(DSP).
JP11
DIR-MCLK
JP13
DIR-BICK
JP14
DIR-LRCK
JP16
DIR-SEL
Master
JP19
SDTI
Slave DIR
ADC
(1-2) Evaluation of Playback block using DIR of AK4114
PORT1 (DIR) is used. Nothing should be connected to PORT3 (DSP).
JP11
DIR-MCLK
JP13
DIR-BICK
JP14
DIR-LRCK
JP16
DIR-SEL
Master
JP19
SDTI
Slave DIR
ADC
The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz,
any other evaluation mode without using DIR should be used.
<KM084500>
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[AKD4645-B]
(1-3) Evaluation of Loop-back using AK4114 <Default>
X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP).
JP11
DIR-MCLK
JP13
DIR-BICK
JP14
JP16
DIR-SEL
DIR-LRCK
Master
JP19
SDTI
Slave DIR
ADC
The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz,
any other evaluation mode without using DIR should be used.
(1-4) All interface signals including master clock are fed externally.
PORT3 (DSP) is used. Nothing should be connected to PORT1 (DIR).
JP11
DIR-MCLK
JP13
DIR-BICK
JP14
JP16
DIR-SEL
DIR-LRCK
Master
JP19
SDTI
Slave DIR
ADC
(2) Master mode
(2-1) Evaluation of Recording block using MCLK of AK4114
(2-2) Master clock is fed externally
(2-1) Evaluation of Loop-back using MCLK of AK4114
X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP). It can be
evaluated at internal loop-back mode (LOOP bit = “1”). It is possible to evaluate at various sampling frequencies
using built-in AK4645’s PLL.
JP11
DIR-MCLK
JP13
DIR-BICK
JP14
DIR-LRCK
JP16
DIR-SEL
Master
JP19
SDTI
Slave DIR
ADC
(2-2) Master clock is fed externally
PORT3 (DSP) is used and MCLK is fed from PORT3. Nothing should be connected to PORT1 (DIR). It can be
evaluated at internal loop-back mode (LOOP bit = “1”). It is possible to evaluate at various sampling frequencies
using built-in AK4645’s PLL.
JP11
DIR-MCLK
JP13
DIR-BICK
JP14
DIR-LRCK
JP16
DIR-SEL
Master
<KM084500>
JP19
SDTI
Slave DIR
ADC
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[AKD4645-B]
„ Other jumper pins set up
[JP1] (GND) : Connection between AGND and DGND.
OPEN : Both grounds are separated on board.
SHORT : Both grounds are connected on board. <Default>
[JP9, JP10] : Connection of mic power.
OPEN: Mic power is not connected.
SHORT : Mic power is connected. <Default>
[JP4, JP8]: Select Pin #5, 28
Pin #5
Pin #28
JP4
JP8
AIN3 bit
VCOC
MIN
VCOC
Open
0
RIN3
LIN3
RIN3
Short
1
<Default>
[JP7] : Select the Power Booster of AK7830.
VCC : Power Booster ON
GND: Power Booster Off<Default>
[JP15] : Select Output Signal Voltage of 74AVC8T245
TVDD: TVDD = D3V <Default>
D3V :
TVDD < D3V
[JP18] (SDTO-IN): Presence of external device connection via PORT3(DSP)
SHORT : connection <default>
OPEN : non-connection
„ The function of the toggle SW
[SW1] (SPK_PDN): Power down of AK7830. Keep “H” during normal operation.
[SW2] (PDN): Power down of AK4645 and AK4114. Keep “H” during normal operation.
„ Indication for LED
[LED1] (ERF): Monitor INT0 pin of the AK4114. LED turns on when some error has occurred to AK4114.
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[AKD4645-B]
„ Serial Control
The AK4645 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4
(CTRL) with PC by 10 wire flat cable packed with the AKD4645. When I2C bus mode is used, PORT4 should be
directly connected to the I2C bus on the system. JP3, 17 and 12 should be set to I2C bus mode to control the AK7830.
CSN
SCL/CCLK
SDA/CDTI
Connect
PC
AKD4645-B
10 wire
flat cable
10pin
Connector
10pin Header
Figure 2. Connect of 10 wire flat cable
(1) 3-wire Serial Control Mode <Default>
JP17
CAD0
JP12
SDA
JP3
I2C-SEL
I2C
3-wire
The jumper pins should be set to the following.
(2) I2C-bus Control Mode
The jumper pins should be set to the following.
(2-1) In case of using CAD0=0 (device address bits).
JP17
CAD0
JP12
SDA
JP3
I2C-SEL
I2C
3-wire
(2-2) In case of using CAD0=1 (device address bits).
JP17
CAD0
JP12
SDA
JP3
I2C-SEL
I2C
<KM084500>
3-wire
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ASAHI KASEI
[AKD4645-B]
„ Analog Input/Output Circuits
(1) Input Circuits
1. MIN/LIN3/RIN3 Input Circuit
C31
1u
RIN3
+
J3
MIN/LIN3/RIN3
6
C32
1u
MIN/LIN3
+
4
3
R17
20k
JP8
LIN3
Figure 3. MIN/LIN3/RIN3 Input Circuit
2. LINE1 Input Circuit
R22
2.2k
MPWR
R23
2.2k
J7
LIN1/RIN1
JP9
RIN1
6
C37
1u
RIN1
+
4
3
C38
1u
LIN1
+
JP10
LIN1
Figure 4. LIN1/RIN1 Input Circuit
3. LINE2 Input Circuit
J5
LIN2/RIN2
C34
1u
6
RIN2
+
4
3
C36
1u
+
LIN2
Figure 5. LIN2/RIN2 Input Circuit
4. LINE4 Input Circuit
J2
LIN4/RIN4
C29
1u
6
+
4
3
RIN4
C30
1u
+
LIN4
Figure 6. LIN4/RIN4 Input Circuit
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[AKD4645-B]
(2) Output Circuits
1.
Headphone-amp Output Circuit
+
C25
47u
R13
short
6
HPR
+
4
3
J1
HP
HPL
C26
47u
C27
0.22u
C28
0.22u
R15
10
R16
10
R14
short
Figure 6. Headphone-amp Output Circuit
2.
LINE Output Circuit
C33
1u
+
R18
220
6
ROUT
4
3
R19
20k
C35
1u
J4
LOUT/ROUT
+
R20
220
LOUT
R21
20k
Figure 7. LINE Output Circuit
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ASAHI KASEI
4.
[AKD4645-B]
External SPEAKER-Amp(AK7830) Output Circuit
TP2
VC-L-P
6
1
VC-L-P
4
3
1
TP3
VC-L-N
VC-L-N
SPP-L
TP4
VC-R-P
6
1
VC-R-P
J8
4
3
1
TP5
VC-R-N
VC-R-N
J6
SPP-R
Figure 8. External SPEAKER-Amp(AK7830) Output Circuit
∗ AKM assumes no responsibility for the trouble when using the above circuit examples.
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ASAHI KASEI
[AKD4645-B]
Control Software Manual
„ Set-up of evaluation board and control software
1. Connect IBM-AT compatible PC with AKD4645-B by 10-line type flat cable (packed with AKD4645-B). Take care
of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
2. Insert the CD-ROM labeled “AKD4645-B Evaluation Kit” into the CD-ROM drive.
3. Access the CD-ROM drive and double-click the icon of “akd4645.exe” to set up the control program. When control
the AK7830 with the serial mode, double-click the icon of “akd7830.exe” to set up the control program.
4. Then please evaluate according to the follows.
„ Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
3. Click “Write default” button
„ Explanation of each buttons
[Port Reset] :
[Write default] :
[All Write] :
[Function1] :
[Function2] :
[Function3] :
[Function4] :
[Function5]:
[SAVE] :
[OPEN] :
[Write] :
[Filter] :
Set up the USB interface board (AKDUSBIF-A) .
Initialize the register of AK4645.
Write all registers that is currently displayed.
Dialog to write data by keyboard operation.
Dialog to write data by keyboard operation.
The sequence of register setting can be set and executed.
The sequence that is created on [Function3] can be assigned to buttons and executed.
The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
Set Programmable Filter (FIL1, FIL3, EQ) of AK4645 easily.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
<KM084500>
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[AKD4645-B]
„ Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to the AK4645, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box:
Data Box:
Input registers address in 2 figures of hexadecimal.
Input registers data in 2 figures of hexadecimal.
If you want to write the input data to the AK4645, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog] : Dialog to evaluate DATT
There are dialogs corresponding to register of 09h, 0Ah, 0Ch, and 0Dh.
Address Box:
Input registers address in 2 figures of hexadecimal.
Start Data Box:
Input starts data in 2 figures of hexadecimal.
End Data Box:
Input end data in 2 figures of hexadecimal.
Interval Box:
Data is written to the AK4645 by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to the AK4645, click [OK] button. If not, click [Cancel] button.
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ASAHI KASEI
[AKD4645-B]
4. [SAVE] and [OPEN]
4-1. [SAVE]
All of current register setting values displayed on the main window are saved to the file. The extension of file name is
“akr”.
<Operation flow>
(1) Click [SAVE] Button.
(2) Set the file name and click [SAVE] Button. The extension of file name is “akr”.
4-2. [OPEN]
The register setting values saved by [SAVE] are written to the AK4645. The file type is the same as [SAVE].
<Operation flow>
(1) Click [OPEN] Button.
(2) Select the file (*.akr) and Click [OPEN] Button.
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[AKD4645-B]
5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [START] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step.
This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file
name is “aks”.
Figure 9. Window of [F3]
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[AKD4645-B]
6. [Function4 Dialog]
The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed.
When [F4] button is clicked, the window as shown in Figure 10 opens.
Figure 10. [F4] window
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[AKD4645-B]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3].
The sequence file name is displayed as shown in Figure 11. ( In case that the selected sequence file name is
“DAC_Stereo_ON.aks”)
Figure 11. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name
is “*.ak4”.
[OPEN] : The name assign of sequence file(*.ak4) saved by [SAVE] is loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the
change.
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ASAHI KASEI
[AKD4645-B]
7. [Function5 Dialog]
The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to
buttons and then executed. When [F5] button is clicked, the window as shown in Figure 12 opens.
Figure 12. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
The register setting file name is displayed as shown in Figure 13. (In case that the selected file name is
“DAC_Output.akr”)
(2) Click [WRITE] button, then the register setting is executed.
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[AKD4645-B]
Figure 13. [F5] windows(2)
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of register setting file displayed on [Function5] window can be saved to the file. The file
name is “*.ak5”.
[OPEN] : The name assign of register setting file(*.ak5) saved by [SAVE] is loaded.
7-3. Note
(1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be
loaded again in order to reflect the change.
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[AKD4645-B]
8. [Filter Dialog]
This dialog can easily set the AK4645’s programmable filter.
Figure 6. [Filter] window
8-1. Value input columns on left side
[Sampling Rate]
[Cut Off Frequency of FIL1]
[Cut Off Frequency of FIL3]
[Pole Frequency of EQ]
[Zero Frequency of EQ]
[FIL3 GAIN]
[EQ GAIN]
Æ Input value of sampling frequency [unit : Hz] <default : 44100>
Æ Input value of cut off frequency of FIL1 [unit : Hz] <default : 150>
Æ Input value of cut off frequency of FIL3 [unit : Hz] <default : 4000>
Æ Input value of pole frequency of EQ [unit : Hz]
Æ Input value of zero frequency of EQ [unit : Hz]
Æ Input value of gain of FIL3 (0~−10dB) [unit : dB]
Æ Input value of gain of EQ (+12~0dB) [unit : dB]
8-2. Check box on left side
Check Box
FIL1
FIL3
EQ
LPF of FIL1
LPF of FIL3
Check
FIL1 bit =“1”
FIL3 bit =“1”
EQ bit =“1”
F1AS bit =“1”(LPF)
F3AS bit =“1”(LPF)
Check off
FIL1 bit =“0”
FIL3 bit =“0”
EQ bit =“0”
F1AS bit =“0”(HPF)
F3AS bit =“0”(HPF)
8-2. [Register Setting] panel and [Register Setting] button on right side
Click [Register setting] button, then filter coefficient set by 8-1 and 8-2 is written on [Register setting] panel.
(It is also written to the actual control register of the AK4645.)
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[AKD4645-B]
MEASUREMENT RESULTS
1. EXT mode (slave mode)
[Measurement condition]
● Measurement unit: Audio Precision, System two Cascade
● EXT Slave Mode
● MCLK: 256fs
● BICK: 64fs
● Bit: 16bit
● Measurement Frequency: 20Hz ∼ 20kHz
● Power Supply: AVDD=DVDD=HVDD=TVDD=3.3V
● Temperature: Room
● Input Frequency: 1kHz
● Sampling Frequency: 44.1kHz
[Measurement Results]
ADC (LIN2/RIN2) characteristics (IVOL=0dB, ALC1 = OFF, LIN2/RIN2 Æ ADC Æ IVOL)
L[dB]
R[dB]
MIC-Amp Gain
0dB
+20dB
0dB
+20dB
S/(N+D) 20kHzLPF (−1dB)
DR
20kHzLPF + A-weighted
S/N
20kHzLPF + A-weighted
88.7
95.6
95.6
83.6
87.1
87.1
88.5
95.6
95.6
83.5
87.1
87.1
DAC (LOUT/ROUT) characteristics (RL=20kΩ, DAC Æ LOUT/ROUT)
L[dB]
R[dB]
S/(N+D) 20kHzLPF (−3dB)
88.3
88.1
S/N
20kHzLPF + A-weighted
94.4
94.4
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[AKD4645-B]
2. PLOT DATA
2-1 ADC (LIN2/RIN2 Æ ADC) (+20dB)
AK4645 LIN2 -> ADC (MGain+20dB) THD+N vs Input Level
fs=44.1kHz, fin=1kHz
-70
-72
-74
-76
-78
-80
-82
d
B
F
S
-84
-86
-88
-90
-92
-94
-96
-98
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 15. THD+N vs. Input Level
AK4645 THD+N vs Input Frequency
fs=44.1kHz, -1dB Input
-60
-62
-64
-66
-68
-70
-72
-74
-76
d
B
F
S
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 16. THD+N vs. Input Frequency
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[AKD4645-B]
AK4645 LIN2-->ADC (MIC=+20dB) Linearity
fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
d
B
F
S
-50
-60
-70
-80
-90
-100
-110
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 17. Linearity
AK4645 LIN2-->ADC (MIC=+20dB) Frequency Response
fs=44.1kHz, -1dB Input
+0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
d
B
F
S
-1.4
-1.6
-1.8
-2
-2.2
-2.4
-2.6
-2.8
-3
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 18. Frequency Response
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[AKD4645-B]
AK4645 LIN2-->ADC (MIC=+20dB) FFT
fs=44.1kHz, fin=1kHz, -1dB Input
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 19. FFT Plot (Input level= -1dBFs)
AK4645 LIN2-->ADC (MIC=+20dB) FFT
fs=44.1kHz, fin=1kHz, -60dB Input
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Figure 20. FFT Plot (Input level= -60dBFs)
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ASAHI KASEI
[AKD4645-B]
AK4645 LIN2-->ADC (MIC=+20dB) FFT
fs=44.1kHz, fin=1kHz, No Signal
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 21. FFT Plot (No signal)
AK4645 Crosstalk
fs=44.1kHz, -1dB Input, Red -> Lch, Blue-> Rch
-70
TTTTTTTT
TTTT
T
T
TT
T
T
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 22. Crosstalk Plot
<KM084500>
2006/07
- 22 -
ASAHI KASEI
[AKD4645-B]
2-2 ADC (LIN2/RIN2 Æ ADC) (0dB)
AK4645 LIN2 -> ADC (MGain 0dB) THD+N vs Input Level
fs=44.1kHz, fin=1kHz
-70
-72
-74
-76
-78
-80
-82
d
B
F
S
-84
-86
-88
-90
-92
-94
-96
-98
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 23. THD+N vs. Input Level
AK4645 THD+N vs Input Frequency
fs=44.1kHz, fin=1kHz
-70
-72
-74
-76
-78
-80
-82
d
B
F
S
-84
-86
-88
-90
-92
-94
-96
-98
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 24. THD+N vs. Input Frequency
<KM084500>
2006/07
- 23 -
ASAHI KASEI
[AKD4645-B]
AK4645 Linearity
fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
d
B
F
S
-50
-60
-70
-80
-90
-100
-110
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 25. Linearity
AK4645 Frequency Response
fs=44.1kHz, -1dB Input
+0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
d
B
F
S
-1.4
-1.6
-1.8
-2
-2.2
-2.4
-2.6
-2.8
-3
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 26. Frequency Response
<KM084500>
2006/07
- 24 -
ASAHI KASEI
[AKD4645-B]
AK4645 LIN2-->ADC FFT
fs=44.1kHz, fin=1kHz, -1dB Input
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 27. FFT Plot (Input level= -1dBFs)
AK4645 LIN2-->ADC FFT
fs=44.1kHz, fin=1kHz, -60dB Input
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Figure 28. FFT Plot (Input level = -60dBFs)
<KM084500>
2006/07
- 25 -
ASAHI KASEI
[AKD4645-B]
AK4645 LIN2-->ADC FFT
fs=44.1kHz, fin=1kHz, No Signal
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 29. FFT Plot ( No signal )
AK4645 Crosstalk
fs=44.1kHz, -1dB Input, Red -> Lch, Blue-> Rch
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
20
50
100
200
500
1k
2k
Hz
Figure 30. Crosstalk Plot
<KM084500>
2006/07
- 26 -
ASAHI KASEI
[AKD4645-B]
2-3 DAC (DACÆ LOUT/ROUT)
Vin = 0dB
AK4645 DAC -> LINEOUT THD+N vs InputLevel
fs=44.1kHz, fin=1kHz
-60
-62.5
-65
-67.5
-70
-72.5
-75
d
B
r
A
-77.5
-80
-82.5
-85
-87.5
-90
-92.5
-95
-97.5
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 31. THD+N vs. Input Level
AK4645 THD+N vs Input Frequency
fs=44.1kHz
-60
-62
-64
-66
-68
-70
-72
-74
-76
d
B
r
A
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 32.THD+N vs. Input Frequency (Input Level = 0dBFS)
<KM084500>
2006/07
- 27 -
ASAHI KASEI
[AKD4645-B]
AK4645 DAC -> LINEOUT Linearity
fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
d
B
r
-50
-60
A
-70
-80
-90
-100
-110
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 33. Linearity
AK4645 DAC -> LINEOUT Frequency Response
fs=44.1kHz
+1
+0.8
+0.6
+0.4
d
B
r
A
+0.2
+0
-0.2
-0.4
-0.6
-0.8
-1
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 34. Frequency Response
<KM084500>
2006/07
- 28 -
ASAHI KASEI
[AKD4645-B]
AK4645 DAC -> LINEOUT FFT
fs=44.1kHz, fin=1kHz, 0dB Input
+10
+0
-10
-20
-30
-40
-50
d
B
r
A
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 35. FFT Plot (Input level= 0dBFs)
AK4645 DAC -> LINEOUT FFT
fs=44.1kHz, fin=1kHz, -60dB Input
+10
+0
-10
-20
-30
-40
-50
d
B
r
A
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Figure 36. FFT Plot (Input level = -60dBFs)
<KM084500>
2006/07
- 29 -
ASAHI KASEI
[AKD4645-B]
AK4645 DAC -> LINEOUT FFT
fs=44.1kHz, fin=1kHz, No signal
+10
+0
-10
-20
-30
-40
-50
d
B
r
A
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
Figure 37. FFT Plot (No signal)
AK4645 DAC -> LINEOUT Crosstalk
fs=44.1kHz
+60
T
T
T T
+40
+20
+0
-20
d
B
-40
-60
-80
-100
-120
-140
20
50
100
200
500
1k
Hz
Figure 38. Crosstalk Plot
<KM084500>
2006/07
- 30 -
ASAHI KASEI
[AKD4645-B]
Revision History
Date
(YY/MM/DD)
06/07/12
Manual
Revision
KM084500
Board
Revision
0
Reason
Contents
First Edition
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering
any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or
authorized distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the
application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license
or other official approval under the law and regulations of the country of export pertaining to customs
and tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life
support, or other hazard related device or system, and AKM assumes no responsibility relating to
any such use, except with the express written consent of the Representative Director of AKM. As
used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its
failure to function or perform may reasonably be expected to result in loss of life or in significant
injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to
result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or
system containing it, and which must therefore meet very high standards of performance and
reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or
otherwise places the product with a third party to notify that party in advance of the above content
and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability
for and hold AKM harmless from any and all claims arising from the use of said product in the
absence of such notification.
<KM084500>
2006/07
- 31 -
E
LIN4
RIN2
LIN2
LIN1
31
E
RIN1
AGND
ROUT
D
32
JP1
GND
RIN3
DGND
C
LOUT
B
MIN/LIN3
A
E
VCC
VCC
VCC
T1
TA48033F
REG
1
26
25
28
29
27
LIN4/IN4+
ROUT/LON
MPWR
LOUT/LOP
1
MPWR
MIN/LIN3
D3V
D
RIN2/IN2-
U1
2
D
L1
10u
30
C3
0.1u
LIN2/IN2+
C2
0.1u
LIN1/IN1-
+
OUT
RIN1/IN1+
C1
47u
REG
GND
IN
JP2
REG-SEL
RIN4/IN4-
24
RIN4
C6
2.2u
+
TVDD
JP3
I2C-SEL
JP6
TVDD-SEL
C
C9
4.7n
+
C7
10u
R1
10k
2
VCOM
3
4
23
AVSS
HPL
22
HPL
AVDD
HPR
21
HPR
HVDD
20
1u
C8
0.1u
AK4645
JP4
RIN3 RIN3
5
VCOC
VCOC/RIN3
JP5
HVDD
C10
0.1u
R2 47k
L2
2
MUTET
C4
0.1u
6
1
+
C5
I2C
HVSS
19
MCKO
18
MCKI
17
C11
+10u
5V
VCC
3.3V
REG
C
TP1
TVDD
R3
short
51
PDN
7
PDN
8
CSN/CAD0
+
R6
51
R7
51
R8
51
R9
51
R10
51
R11
51
MCKI
16
TVDD
DVDD
15
14
13
BICK
LRCK
SDTO
12
11
10
SDTI
CDTI/SDA
CSN
9
R5
10
51
CCLK/SCL
R4
C13
0.1u
C14
0.1u
B
+
C12
47u
C15
10u
+
BICK
LRCK
SDTO
SDTI
CDTI
CCLK
B
TVDD
C16
10u
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4645-B
Document Number
Rev
AK4645
Tuesday, June 13, 2006
Sheet
E
0
1
of
5
A
B
C
+
A
D
E
C17
10u
A
+
13
L3
1u
VSS3
DIODE-SS2003M
VC-R-N
19
VC-R-N
VCOIL
12
VC-L-P
20
VC-L-P
TEST
11
VC-L-N
21
VC-L-N
BST-PDN
10
3
D1
+
14
VSS1
15
VSS2
16
VDD1
17
VDD2
18
VC-R-P
1
C18
2.2u
U2
2
VC-R-P
1
2
5
6
D3V
JP7
BST-PD
B
VFB
9
DVDDI
8
D3V
PDN
7
SPK-PDN
C20
0.1u
SDA
6
VC
SCL
5
C21
0.1u
LOUT
4
IN-L-P
IN-R-N
24
3
VBAT
IN-R-P
23
1
VCC
D3V
GND
VSS4
2
22
AK7830
IN-L-N
B
AK7830
C22
0.01u
C23
0.1u
CDTI
ROUT
C
C19
10u
CCLK
C
K
D3V
R12
10k
A
D2
HSU119
FOR-SPK-PDN
3
D
H
D
1
L
2
SW1
C24
SPK-PDN 0.1u
E
E
Title
Size
A3
Date:
A
B
C
D
AKD4645-B
Document Number
Rev
AK7830
Wednesday, June 14, 2006
Sheet
E
0
2
of
5
A
B
C
D
C25
47u
+
R13
short
6
HPR
J1
HP
4
3
+
E
E
E
HPL
J2
LIN4/RIN4
C26
47u
C29
1u
6
+
RIN4
4
3
C30
1u
+
LIN4
C27
0.22u
C28
0.22u
R15
10
R16
10
R14
short
D
D
6
RIN3
C32
1u
R17
20k
MIN/LIN3
+
4
3
C31
1u
+
J3
MIN/LIN3/RIN3
C33
1u
R18
220
+
JP8
LIN3
J4
LOUT/ROUT
6
ROUT
R19
20k
C
J5
LIN2/RIN2
C34
1u
6
C35
1u
4
3
LOUT
R21
20k
C36
1u
+
LIN2
R22
2.2k
B
6
SPP-L
C37
1u
+
TP4
VC-R-P
RIN1
4
3
VC-R-P
+
JP10
LIN1
TP5
VC-R-N
LIN1
VC-R-N
4
3
1
C38
1u
J8
6
1
JP9
RIN1
4
3
1
TP3
VC-L-N
VC-L-N
J6
6
1
VC-L-P
R23
2.2k
B
TP2
VC-L-P
MPWR
J7
LIN1/RIN1
C
R20
220
+
+
RIN2
4
3
SPP-R
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4645-B
Document Number
Rev
Input/Output
Monday, June 05, 2006
Sheet
E
0
3
of
5
A
B
C
D
E
1
D3V
L4
47u
E
2
2
1
TORX141
+ C40
10u
C39
0.1u
R24
470
1
IPS0
2
40
39
R25
18k
R
VCOM
41
AVSS
42
RX0
43
NC
44
RX1
45
TEST1
46
RX2
NC
48
RX3
U3
47
C43
0.47u
D
D3V
C42
0.1u
37
GND
OUT
C41
10u
INT1
3
+
VCC
38
PORT1
AVDD
E
D
INT0
36
NC
OCKS0
35
3
DIF0
OCKS1
34
4
TEST2
CM1
33
5
DIF1
CM0
32
6
NC
PDN
31
7
DIF2
XTI
30
8
IPS1
XTO
29
9
P/SN
DAUX
28
10
XTL0
MCKO2
27
11
XTL1
BICK
26
DIR-BICK
12
VIN
SDTO
25
DIR-SDTO
4114-INT0
R26
47k
D3V
R27
47k
AK4114
D3V
C
4114-PDN
TP6
C44
5p
1
C
2
X1
C45
11.2896MHz 5p
SDTO
A
IN
VCC
3
2
GND
1
LRCK
DIR-LRCK
DIR-MCLK
C48
10u
C49
10u
D3V
PORT2
24
MCKO1
23
22
DVSS
DVDD
C47
0.1u
+
21
VOUT
20
UOUT
19
COUT
18
BOUT
17
TX1
16
15
14
TVDD
C46
0.1u
+
13
TX0
B
DVSS
B
R28
5.1
D3V
A
C50
0.1u
TOTX141
Title
Size
A3
Date:
A
B
C
D
AKD4645-B
Document Number
Rev
DIR/DIT
Monday, June 05, 2006
Sheet
E
0
4
of
5
A
B
C
D
E
JP11
DIR-MCLK
DIR-MCLK
JP13
DIR-BICK
DIR-BICK
E
U4
E
U5
BICK
MCKI
3
A1
B1
21
SDTI
4
A2
B2
20
5
A3
B3
19
6
A4
B4
18
7
A5
B5
17
8
A6
B6
16
9
A7
B7
15
10
A8
B8
14
3-wire
JP12
SDA
I2C
CDTI
CCLK
LRCK
RP1
6
5
4
3
2
1
3
A1
B1
21
4
A2
B2
20
5
A3
B3
19
6
A4
B4
18
7
A5
B5
17
8
A6
B6
16
9
A7
B7
15
10
A8
B8
14
47k
JP14
DIR-LRCK
DIR-LRCK
RP2
6
5
4
3
2
1
47k
AVC
D
AVC
CSN
D
TVDD
PDN
C52
0.1u
TVDD
1
VCCA
VCCB
24
2
DIR
VCCB
23
11
GND
OE
22
12
GND
GND
13
C51
0.1u
D3V
1
VCCA
VCCB
24
C54
2
DIR
VCCB
23
0.1u
11
GND
OE
22
12
GND
GND
13
C53
0.1u
D3V
TVDD
TVDD
JP15
Signal V select
Master
74AVC8T245
Slave
JP16
DIR-SEL
74AVC8T245
C
C
PORT4
1
2
3
4
5
10
9
8
7
6
CTRL
10k
10k
R34
10k
R30
R32
R33
MCLK
BICK
LRCK
SDTI
VCC
470
470
470
PORT3
1
2
3
4
5
10
9
8
7
6
GND
GND
NC
NC
SDTO
DSP
CSN
SCL/CCLK
SDA/CDTI
R35
D3V
D3V
4114-PDN
JP17
CAD0
R36
10k
D3
10k
JP18
SDTO-IN
U6
A
B
R29
R31
K
D3V
HSU119
H
4114-INT0
1
3
L
1
2
3
4
5
6
C55
0.1u
4Y
4A
5Y
5A
6Y
6A
8
9
10
11
12
13
ADC
SPK-PDN
B
SDTO
JP19
SDTI
FOR-SPK-PDN
DIR-SDTO
DIR
2
SW2
PDN
1A
1Y
2A
2Y
3A
3Y
14
7
D3V
C56
0.1u
R37
1k
Vcc
GND
74HC14
LED1
K
A
D3V
ERF
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4645-B
Document Number
Rev
LOGIC
Tuesday, June 06, 2006
0
Sheet
E
5
of
5