ONSEMI MC10EP17DTR2G

MC10EP17, MC100EP17
3.3V / 5VECL Quad
Differential Driver/Receiver
Description
The MC10/100EP17 is a 4-bit differential line receiver based on the
EP17 device. The >3.0 GHz maximum frequency provided by the high
frequency outputs makes the device ideal for buffering of very high
speed oscillators.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The design incorporates two stages of gain, internal to the device,
making it an excellent choice for use in high bandwidth amplifier
applications.
Inputs of unused gates can be left open and will not affect the
operation of the rest of the device. All VCC and VEE pins must be
externally connected to power supply to guarantee proper operation.
The 100 Series contains temperature compensation.
• 220 ps Typical Propagation Delay
• Maximum Frequency >3.0 GHz Typical
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
•
•
•
•
•
MARKING
DIAGRAMS*
20
TSSOP−20
DT SUFFIX
CASE 948E
MCXXX
EP17
ALYWG
G
1
20
20
MCXXXEP17
AWLYYWWG
1
SO−20
DW SUFFIX
CASE 751D
Features
•
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1
20
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at VEE
VBB Output
Pb−Free Packages are Available*
1
QFN−20
MN SUFFIX
CASE 485E
XXXX
EP17
ALYWG
G
XXX
= 10 or 100
A
= Assembly Location
L,
= Assembly Lot
WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 7
1
Publication Order Number:
MC10EP17/D
MC10EP17, MC100EP17
VCC
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
VEE
20
19
18
17
16
15
14
13
12
11
Table 1. PIN DESCRIPTION
1
2
3
4
5
6
7
8
9
10
VCC
D0
D0
D1
D1
D2
D2
D3
D3
VBB
PIN
FUNCTION
D[0:3]*, D[0:3]*
ECL Differential Data Inputs
Q[0:3], Q[0:3]
ECL Differential Data Outputs
VBB
Reference Voltage Output
VCC
Positive Supply
VEE
Negative Supply
EP
Exposed Pad
* Pins will default LOW when left open.
Figure 1. 20−Lead Pinout (Top View) and Logic Diagram
Exposed Pad
D0
VCC
VCC
Q0
Q0
20
19
18
17
16
D0
1
15
Q1
D1
2
14
Q1
D1
3
D2
4
12
Q2
D2
5
11
Q3
MC10/100EP17
6
NOTE:
7
8
9
13
Q2
10
D3 D3 VBB VEE Q3
The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to VEE.
Figure 1. QFN−20 Pinout (Top View)
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
ESD Protection
N/A
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−20
TSSOP−20
QFN−20
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
> 2 kV
> 100 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
N/A
Level 1
Level 3
Level 1
UL 94 V−0 @ 0.125 in
259 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
MC10EP17, MC100EP17
Table 3. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
Condition 2
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
20 TSSOP
20 TSSOP
140
100
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
20 TSSOP
23 to 41
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
20 SOIC
20 SOIC
90
60
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
20 SOIC
30 to 35
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
QFN−20
QFN−20
47
33
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
QFN−20
18
°C/W
Tsol
Wave Solder
265
265
°C
VI v VCC
VI w VEE
Pb
Pb−Free
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
42
50
65
44
52
66
46
54
68
mA
VOH
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1555
1680
1490
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
365
1690
1430
1755
1490
1815
mV
VBB
Output Voltage Reference
1790
1990
1855
2055
1915
2115
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 4)
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
1890
2.0
150
0.5
1955
150
0.5
0.5
2015
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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3
MC10EP17, MC100EP17
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
Symbol
IEE
Characteristic
Power Supply Current
Min
−40°C
Typ
Max
Min
25°C
Typ
Max
Min
85°C
Typ
Max
42
50
65
44
52
66
46
54
68
Unit
mA
VOH
Output HIGH Voltage (Note 6)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage (Note 6)
3065
3190
3315
3130
3255
3380
3190
3315
3440
mV
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
3515
mV
VBB
Output Voltage Reference
3490
3690
3555
3755
3615
3815
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 7)
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
3590
2.0
3655
150
3715
150
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. All loading with 50 W to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 8)
Min
−40°C
Typ
Max
Min
25°C
Typ
Max
Min
85°C
Typ
Max
42
50
65
44
52
66
46
54
68
Unit
mA
Output HIGH Voltage (Note 9)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
Output LOW Voltage (Note 9)
−1935
−1810
−1685
−1870
−1745
−1620
−1810
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
VBB
Output Voltage Reference
−1510
−1310
−1445
−1245
−1385
−1185
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 10)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
IEE
Characteristic
Power Supply Current
VOH
VOL
−1410
VEE + 2.0
0.0
VEE + 2.0
150
0.5
−1345
0.0
VEE + 2.0
150
0.5
−1285
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with VCC.
9. All loading with 50 W to VCC − 2.0 V.
10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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4
MC10EP17, MC100EP17
Table 7. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
47
55
63
50
58
66
54
62
70
mA
Output HIGH Voltage (Note 12)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 12)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1355
1675
1355
1675
1355
1675
mV
VBB
Output Voltage Reference
1775
1975
1775
1975
1775
1975
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 13)
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
1875
2.0
1875
150
0.5
1875
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
12. All loading with 50 W to VCC − 2.0 V.
13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
47
55
63
50
58
66
54
62
70
mA
Output HIGH Voltage (Note 15)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
VOL
Output LOW Voltage (Note 15)
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3055
3375
3055
3375
3055
3375
mV
VBB
Output Voltage Reference
3475
3675
3475
3675
3475
3675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 16)
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
3575
2.0
150
0.5
3575
150
0.5
0.5
3575
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
15. All loading with 50 W to VCC − 2.0 V.
16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP17, MC100EP17
Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 17)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
47
55
63
50
58
66
54
62
70
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 18)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 18)
−1945
−1820
−1695
−1945
−1820
−1695
−1945
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1945
−1625
−1945
−1625
−1945
−1625
mV
VBB
Output Voltage Reference
−1525
−1325
−1525
−1325
−1525
−1325
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 19)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
−1425
VEE + 2.0
0.0
−1425
VEE + 2.0
150
0.5
0.0
−1425
VEE + 2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17. Input and output parameters vary 1:1 with VCC.
18. All loading with 50 W to VCC − 2.0 V.
19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C
Symbol
Min
Characteristic
fmax
Maximum Frequency (Figure 2)
tPLH,
tPHL
Propagation Delay to Output Differential
10 Series
100 Series
tJITTER
CLOCK Random Jitter (RMS)
@ v 1.0 GHz
@ v 1.5 GHz
@ v 2.0 GHz
@ v 2.5 GHz
@ v 3.0 GHz
VPP
Input Voltage Swing
(Differential Configuration)
tr
tf
Output Rise/Fall Times
(20% − 80%)
Typ
25°C
Max
Min
>3
Q, Q
125
150
Typ
85°C
Max
Min
>3
200
220
275
300
0.132
0.143
0.148
0.129
0.129
0.2
0.3
0.3
0.3
0.3
150
800
1200
100
160
220
150
180
Typ
Max
>3
220
250
300
320
0.147
0.159
0.146
0.131
0.142
0.2
0.3
0.3
0.3
0.3
150
800
1200
100
170
230
200
200
Unit
GHz
ps
260
290
350
360
0.154
0.156
0.169
0.147
0.168
0.3
0.3
0.3
0.3
0.3
150
800
1200
mV
120
190
250
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
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6
800
8
700
7
600
6
500
5
400
4
300
3
200
2
ÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉ
100
0
0
1000
2000
1
(JITTER)
3000
4000
5000
JITTER OUT ps (RMS)
VOUTpp (mV)
MC10EP17, MC100EP17
ÉÉ
ÉÉ
6000
FREQUENCY (MHz)
Figure 2. Fmax/Jitter
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
D
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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7
MC10EP17, MC100EP17
ORDERING INFORMATION
Package
Shipping †
MC10EP17DT
TSSOP−20
75 Units / Rail
MC10EP17DTG
TSSOP−20
(Pb−Free)
75 Units / Rail
MC10EP17DTR2
TSSOP−20
2500 / Tape & Reel
MC10EP17DTR2G
TSSOP−20
(Pb−Free)
2500 / Tape & Reel
MC10EP17DW
SOIC−20
38 Units / Rail
MC10EP17DWG
SOIC−20
(Pb−Free)
38 Units / Rail
MC10EP17DWR2
SOIC−20
1000 / Tape & Reel
MC10EP17DWR2G
SOIC−20
(Pb−Free)
1000 / Tape & Reel
MC10EP17MNG
QFN−20
(Pb−Free)
92 Units / Rail
MC10EP17MNTXG
QFN−20
(Pb−Free)
3000 / Tape & Reel
MC100EP17DT
TSSOP−20
75 Units / Rail
MC100EP17DTG
TSSOP−20
(Pb−Free)
75 Units / Rail
MC100EP17DTR2
TSSOP−20
2500 / Tape & Reel
MC100EP17DTR2G
TSSOP−20
(Pb−Free)
2500 / Tape & Reel
MC100EP17DW
SOIC−20
38 Units / Rail
MC100EP17DWG
SOIC−20
(Pb−Free)
38 Units / Rail
MC100EP17DWR2
SOIC−20
1000 / Tape & Reel
MC100EP17DWR2G
SOIC−20
(Pb−Free)
1000 / Tape & Reel
MC100EP17MNG
QFN−20
(Pb−Free)
92 Units / Rail
MC100EP17MNTXG
QFN−20
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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MC10EP17, MC100EP17
PACKAGE DIMENSIONS
TSSOP−20
CASE 948E−02
ISSUE C
20X
0.15 (0.006) T U
2X
L
K REF
0.10 (0.004)
S
L/2
20
M
T U
S
V
K
K1
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
S
J J1
11
B
−U−
PIN 1
IDENT
SECTION N−N
0.25 (0.010)
N
1
10
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
G
D
H
DETAIL E
0.100 (0.004)
−T− SEATING
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
PLANE
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
9
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
−−− 0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
MC10EP17, MC100EP17
PACKAGE DIMENSIONS
SO−20 WB
CASE 751D−05
ISSUE G
A
20
q
X 45 _
E
h
1
10
20X
B
B
0.25
M
T A
S
B
S
A
L
H
M
10X
0.25
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
11
B
M
D
18X
e
A1
SEATING
PLANE
C
T
http://onsemi.com
10
DIM
A
A1
B
C
D
E
e
H
h
L
q
MILLIMETERS
MIN
MAX
2.35
2.65
0.10
0.25
0.35
0.49
0.23
0.32
12.65
12.95
7.40
7.60
1.27 BSC
10.05
10.55
0.25
0.75
0.50
0.90
0_
7_
MC10EP17, MC100EP17
PACKAGE DIMENSIONS
QFN−20
CASE 485E−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
−X−
A
M
−Y−
N
B
0.25 (0.010) T
0.25 (0.010) T
R
J
C
0.08 (0.003) T
−T−
K
SEATING
PLANE
E
H
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
MILLIMETERS
MIN
MAX
4.00 BSC
4.00 BSC
0.80
1.00
0.23
0.35
2.75
2.85
2.75
2.85
0.50 BSC
1.38
1.43
0.20 REF
0.00
0.05
0.35
0.45
2.00 BSC
2.00 BSC
1.38
1.43
0.60
0.80
INCHES
MIN
MAX
0.157 BSC
0.157 BSC
0.031
0.039
0.009
0.014
0.108
0.112
0.108
0.112
0.020 BSC
0.054
0.056
0.008 REF
0.000
0.002
0.014
0.018
0.079 BSC
0.079 BSC
0.054
0.056
0.024
0.031
G
L
6
10
5
11
1
15
F
20
D
16
NOTE 3
0.10 (0.004)
M
P
T X Y
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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11
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MC10EP17/D