i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC 16Mb, 512Kx32 CMOS 5.0V, High Speed Static RAM Integrated Plastic Encapsulated Microcircuit FEATURES DESCRIPTION The AS8S512K32 is a high speed, 5V, 16Mb SRAM. The device is available with access times of 12, 15, 20 and 25ns creating a zero wait state/latency, real-time memory solution. The high speed, 5v supply voltage and control lines,make the device ideal for all your real-time computer memory requirements. Integrated Real-Time Memory Array Solution No latency or refresh fycles Parallel Read/Write Interface User Configurable via multiple enables Random Access Memory Array Fast Access Times: 12, 15, 20, and 25ns TTL Compatible I/O Fully Static, No Clocks Surface Mount Package 68 Lead PLCC, No. 99 JEDEC M0-47AE Small Footprint, 0.990 Sq. In. Multiple Ground Pins for Maximum Noise Immunity Single +5V (±5%) Supply Operation The device can be configured as a 512K x 32 and used to create a single chip external data /program memory array solution or via use of the individual chip enable lines, be reconfigured as a 1M x 16 or 2M x 8. The device provides a 50+% space savings when compared to four 512K x 8, 36 pin SOJs. In addition the AS8S512K32 has only a 20pF load on the Addr. lines vs. ~30pF for four plastic SOJs. DQ15 A14 A15 A16 W\ G\ NC NC Vcc NC E0\ E1\ E2\ E3\ A17 A18 PIN NAMES A0 - A18 E0\ - E3\ W\ G\ DQ0 - DQ31 Vcc Vss NC 61 62 63 64 65 66 67 68 1 2 3 4 5 6 7 8 9 DQ16 PIN CONFIGURATIONS AND BLOCK DIAGRAM DQ17 10 60 DQ14 DQ18 11 59 DQ13 DQ19 12 58 DQ12 Vss 13 57 Vss Address Inputs Chip Enables Write Enables Output Enable Common Data Input/Output Power (+5V ± 10%) Ground No Connection BYTE CONTROL TABLE Chip Byte Enable Control E0\ DQ0-7 E1\ DQ8-15 E2\ DQ16-23 E3\ DQ24-31 DQ29 25 45 DQ02 E2\ DQ8-DQ15 DQ30 26 44 DQ01 E3\ DQ16-DQ23 43 E1\ DQ00 DQ03 42 46 A07 24 41 E0\ DQ28 A08 Vss 40 DQ04 47 A09 48 23 39 22 Vss A10 DQ27 38 W\ A11 DQ05 37 DQ06 49 A12 50 21 36 20 DQ26 A13 DQ25 35 DQ07 Vcc 51 34 19 A0 DQ24 33 Vcc A1 52 32 18 A2 DQ08 Vcc 31 53 A3 17 30 DQ09 DQ23 A4 54 29 16 A5 DQ10 DQ22 28 DQ11 55 27 56 15 A6 14 DQ31 DQ20 DQ21 AS8S512K32PEC Rev. 0.1 01/09 A0-A18 G\ 19 512K x 32 Memory Array DQ0-DQ7 DQ24-DQ31 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to Vss Operating Temperature tA (Ambient) Commercial Industrial Storage Temperature, Plastic Power Dissipation Output Current Junction Temperature, TJ -0.5V to 7.0V 0oC to +70oC -40oC to +85oC -55oC to +125oC 5.0 Watts 20 mA 175oC *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those in di cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. RECOMMENDED DC OPERATING CONDITIONS Parameter Sym Min Typ VCC Supply Voltage 4.75 5 VSS Supply Voltage 0 0 Max 5.25 Units V 0 V Input High Voltage VIH 2.2 --- Vcc+0.5V V Input Low Voltage VIL -0.3 --- 0.8 V AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load Vss to 3.0V 5ns 1.5V Figure 2 Note: For tEHQZ, tGHQZ and tWLQZ, CL=5pF FIG. 2 FIG. 3 Vcc Vcc 480Ω 480Ω Q Q 30pF 255Ω 5pF 255Ω DC ELECTRICAL CHARACTERISTICS Parameter Sym Conditions Min Max 20/25 300 Units ns mA Operating Power Supply Current ICC1 W#=VIL, II/O=0mA, Min Cycle 12/15 350 Standby (TTL) Power Supply Current ICC2 E#VIH, VINVIL or VINVIH, f=0MHz 120 125 mA 20 20 mA Full Standby Power Supply Current CMOS ICC3 E#VCC-0.2V VINVCC-0.2V or VIN0.2V Input Leakage Current ILI VIN=0V to VCC ±5 μA Output Leakage Current ILO VI/O=0V to VCC ±5 μA Ouput High Voltage VOH IOH=-4.0mA Output Low Voltage VOL IOL=8.0mA TRUTH TABLE G# E# W# Mode Output H X Standby HIGH Z H L H Output Deselect ICC1 ICC1 L L H Read HIGH Z DOUT X L L Write DIN AS8S512K32PEC Rev. 0.1 01/09 CAPACITANCE (f=1.0MHz, VIN=VCC or VSS) Sym Parameter Address Lines CI Data Lines CD/Q Write & Output Enable Line W#, G# Chip Enable Line E0#, E3# Power ICC2 X 2.4 ICC3 ICC1 V 0.4 V Max 20 7 20 7 Unit pF pF pF pF Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC AC CHARACTERISTICS READ CYCLE Symbol JEDEC Alt. tAVAV tRC Parameter Read Cycle Time 12ns Min Max 12 15ns Min Max 15 20ns Min Max 20 25ns Min Max 25 Units ns Address Access Time tAVQV tAA 12 15 20 25 ns Chip Enable Access tELQV tACS 12 15 20 25 ns Chip Enable to Output in Low Z tELQX tCLZ Chip Disable to Output in High Z tEHQZ tCHZ 9 ns Output Hold from Address Change tAVQX tOH Output Enable to Output Valid tGLQV tOE Output Enable to Output in Low Z tGLQX tOLZ Output Enable to Output in High Z tGHQZ tOHZ 3 3 6 3 3 7 9 3 6 0 3 7 0 7 ns 3 9 0 6 3 ns 9 ns 9 ns 0 9 ns READ CYCLE 1 - W\ HIGH, G\, E\ LOW tAVAV A ADDRESS 1 ADDRESS 2 tAVQV tAVQX Q DATA 1 DATA 2 READ CYCLE 2 - W\ HIGH tAVAV A tAVQV E# tELQV tEHQZ tELQX G# tGLQV t GHQZ tGLQX Q AS8S512K32PEC Rev. 0.1 01/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC AC CHARACTERISTICS READ CYCLE Symbol Alt. JEDEC tAVAV tWC Parameter Write Cycle Time 12ns Min Max 12 15ns Min Max 15 20ns Min Max 20 25ns Min Max 25 Units ns tELWH tCW 8 10 11 12 ns tELEH tCW 8 10 11 12 ns tAVWL tAS 0 0 0 0 ns tAVEL tAS 0 0 0 0 ns tAVWH tAW 8 10 11 12 ns tAVEH tAW 8 10 11 12 ns tWLWH tWP 8 10 11 12 ns tELEH tWP 10 12 13 14 tWHAZ tWR 0 0 0 0 tEHAZ tWR 0 0 0 0 tWHDX tDH 0 0 0 0 tEHDZ tDH 0 0 0 0 Write to Output in High Z tWLQZ tWHZ 0 Data to Write Time tDVWH tDW 6 7 8 9 tDVEH tDW 6 7 8 9 tWHQX tWLZ 3 3 3 3 Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Output Active from End of Write 6 0 7 0 8 0 ns ns 9 ns ns WRITE CYCLE 1 - W\ CONTROLLED tAVAV A E\ tELWH tWHAX tAVWH tWLWH W\ tAVWL tDVWH D DATA VALID tWHQX tWLQZ HIGH Z Q AS8S512K32PEC Rev. 0.1 01/09 tWHDX Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC WRITE CYCLE 2 - E\ CONTROLLED tAVAV A tAVEL tELEH E\ tAVEH tEHAX tWLEH W\ tDVEH D tEHDX DATA VALID HIGH Z Q PACKAGE DRAWING Package No. 99 68 Lead PLCC JEDEC MO-47AE 0.995 Max 0.956 Max 0.180 Max 0.995 0.956 Max Max 0.040 Max AS8S512K32PEC Rev. 0.1 01/09 0.020 0.015 0.930 0.890 0.050 BSC 0.115 Max Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC ORDERING INFORMATION Part Number Access Speed Device Grade AS8S512K32PEC-MS NA Mechanical Sample AS8S512K32PEC-ES NA Engineering Sample AS8S512K32PEC-12/IT 12ns INDUSTRIAL AS8S512K32PEC-15/IT 15ns INDUSTRIAL AS8S512K32PEC-20/IT 20ns INDUSTRIAL AS8S512K32PEC-25/IT 25ns INDUSTRIAL AS8S512K32PEC-12/ET 12ns ENHANCED AS8S512K32PEC-15/ET 15ns ENHANCED AS8S512K32PEC-20/ET 20ns ENHANCED AS8S512K32PEC-25/ET 25ns ENHANCED AS8S512K32PEC-12/XT 12ns MIL-TEMP AS8S512K32PEC-15/XT 15ns MIL-TEMP AS8S512K32PEC-20/XT 20ns MIL-TEMP AS8S512K32PEC-25/XT 25ns MIL-TEMP Availability SEPTEMBER 2006 OCTOBER 2006 NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 CF NOVEMBER 2006 NOVEMBER 2006 NOVEMBER 2006 AS8S512K32PEC Rev. 0.1 01/09 A20 Vcc NC G\ W\ A16 A15 A14 DQ15 NC Vcc NC NC G\ W\ A16 A15 A14 DQ15 NC Vcc NC NC G\ W\ A16 A15 A14 DQ15 2 1 68 67 66 65 64 63 62 61 A19 E0\ E0\ E0\ 3 E1\ E1\ E1\ 4 E2\ E2\ E2\ 5 E3\ E3\ E3\ 6 A17 A17 NC 7 A18 A18 DQ16 DQ16 NC 4Mb-SRAM, 128K x 32: 5.0V = AS8S128K32PEC DQ16 16Mb-SRAM, 512K x 32: 5.0V = AS8S512K32PEC 3.3V = AS8SLC512K32PEC 8 64Mb-SRAM, 2M x 32: 3.3V = AS8SLC2M32PEC 9 FAMILY PIN MATRIX DQ17 DQ17 DQ17 10 60 DQ14 DQ14 DQ14 DQ18 DQ18 DQ18 11 59 DQ13 DQ13 DQ13 DQ19 DQ19 DQ19 12 58 DQ12 DQ12 DQ12 Vss Vss Vss 13 57 Vss Vss Vss DQ20 DQ20 DQ20 14 56 DQ11 DQ11 DQ11 DQ21 DQ21 DQ21 15 55 DQ10 DQ10 DQ10 DQ22 DQ22 DQ22 16 54 DQ09 DQ09 DQ09 DQ23 DQ23 DQ23 17 53 DQ08 DQ08 DQ08 Vcc Vcc Vcc 18 52 Vcc Vcc Vcc DQ24 DQ24 DQ24 19 51 DQ07 DQ07 DQ07 DQ25 DQ25 DQ25 20 50 DQ06 DQ06 DQ06 DQ26 DQ26 DQ26 21 49 DQ05 DQ05 DQ05 DQ27 DQ27 DQ27 22 48 DQ04 DQ04 DQ04 Vss Vss Vss 23 47 Vss Vss Vss DQ28 DQ28 DQ28 24 46 DQ03 DQ03 DQ03 DQ29 DQ29 DQ29 25 45 DQ02 DQ02 DQ02 DQ30 DQ30 DQ30 26 44 DQ01 DQ01 DQ01 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 DQ31 A6 A5 A4 A3 A2 A1 A0 Vcc A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 Vcc A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 Vcc A13 A12 A11 A10 A09 A08 A07 DQ00 AUSTIN SEMICONDUCTOR 68 - LD. PLCC [JEDEC MO-47AE] Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 i PEM 16 MB ASYNC SRAM Austin Semiconductor, Inc. AS8S512K32PEC DOCUMENT TITLE 16Mb, 512K x 32, SRAM, 5.0V, 0.990”sq. - 68 LD. PLCC, Multi-Chip Package [iPEM] REVISION HISTORY Rev # 0.0 0.1 AS8S512K32PEC Rev. 0.1 01/09 History Initial Release Updated Order Chart Release Date September 2005 January 2009 Status Advance Advance Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 7