CY2X014 Low Jitter LVPECL Crystal Oscillator Low Jitter LVPECL Crystal Oscillator Features Functional Description ■ Low jitter crystal oscillator (XO) ■ Less than 1 ps typical root mean square (RMS) phase jitter ■ Differential low-voltage positive emitter coupled logic (LVPECL) output ■ Output frequency from 50 MHz to 690 MHz ■ Factory-configured or field-programmable ■ Integrated phase-locked loop (PLL) ■ Output enable or power-down function ■ Supply voltage: 3.3 V or 2.5 V ■ Pb-free package: 5.0 x 3.2 mm leadless chip carrier (LCC) ■ Commercial and industrial temperature ranges The CY2X014 is a high-performance and high-frequency XO. The device uses a Cypress proprietary low-noise PLL to synthesize the frequency from an embedded crystal. The CY2X014 is available as a factory-configured device or as a field-programmable device. Factory-configured devices are configured for general use or they can be customer specific. Logic Block Diagram 4 CRYSTAL OSCILLATOR LOW-NOISE PLL CLK OUTPUT DIVIDER 5 CLK# PROGRAMMABLE CONFIGURATION 1 OE/PD# Cypress Semiconductor Corporation Document Number: 001-10179 Rev. *I • 6 3 VDD VSS 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised December 20, 2012 CY2X014 Contents Pin Configurations ........................................................... 3 Pin Definitions .................................................................. 3 Programming Description ............................................... 4 Field-programmable CY2X014 .................................... 4 Factory-configured CY2X014 ...................................... 4 Programming Variables ................................................... 4 Output Frequency ........................................................ 4 Pin 1: Output Enable (OE) or Power Down (PD#) ....... 4 Industrial versus Commercial Device Performance .... 4 Absolute Maximum Conditions ....................................... 5 Operating Conditions ....................................................... 5 DC Electrical Characteristics .......................................... 6 AC Electrical Characteristics .......................................... 7 Typical Output Characteristics ....................................... 8 Switching Waveforms ...................................................... 9 Document Number: 001-10179 Rev. *I Termination Circuits ......................................................... 9 Ordering Information ...................................................... 10 Possible Configurations ............................................. 10 Ordering Code Definitions ......................................... 10 Package Diagrams .......................................................... 11 Acronyms ........................................................................ 12 Document Conventions ................................................. 12 Units of Measure ....................................................... 12 Document History Page ................................................. 13 Sales, Solutions, and Legal Information ...................... 14 Worldwide Sales and Design Support ....................... 14 Products .................................................................... 14 PSoC Solutions ......................................................... 14 Page 2 of 14 CY2X014 Pin Configurations Figure 1. 6-pin Ceramic LCC pinout OE/PD# 1 DNU 2 VSS 3 6 VDD 5 CLK# 4 CLK Pin Definitions Pin Name I/O Type Description 1 OE/PD# CMOS input Output enable pin: Active HIGH. If OE = 1, CLK is enabled. Power-down pin: Active LOW. If PD# = 0, the device is powered down and the clock is disabled. The functionality of this pin is programmable. 4, 5 CLK, CLK# 2 DNU – 6 VDD Power Supply voltage: 2.5 V or 3.3 V 3 VSS Power Ground LVPECL output Differential output clock Document Number: 001-10179 Rev. *I Do not use: DNU pins are electrically connected, but perform no function Page 3 of 14 CY2X014 Programming Description Programming Variables The CY2X014 is a programmable device. Prior to being used in an application, it must be programmed with the output frequency and other variables described in Programming Variables. Two different device types are available, each with its own programming flow. They are described in the following sections. Output Frequency Field-programmable CY2X014 The CY2X014 has an output frequency range of 50 MHz to 690 MHz, but the range is not continuous. The CY2X014 cannot generate frequencies in the ranges of 521 MHz to 529 MHz and 596 MHz to 617 MHz. Field programmable devices are shipped unprogrammed and must be programmed before being installed on a printed circuit board (PCB). Customers use CyClockWizard™ software to specify the device configuration and generate a JEDEC (extension .jed) programming file. Programming of samples and prototype quantities is available using the CyClockWizard software along with a CY3675-CLKMAKER1 CyClockMaker Clock Programmer Kit with a CY3675-LCC6A socket adapter. Cypress’s value-added distribution partners also provide programming services. Field-programmable devices are designated with an ‘F’ in the part number. They are intended for quick prototyping and inventory reduction. The software and programmer kit hardware can be downloaded from www.cypress.com by clicking the hyperlinks in the previous paragraph. Factory-configured CY2X014 For ready-to-use devices, the CY2X014 is available with no field programming required. A request for a custom configuration can be made. All requests are submitted to the local Cypress Field Application Engineer (FAE) or sales representative. After the request is processed, the user receives a new part number, samples, and datasheet with the programmed values. This part number is used for additional sample requests and production orders. The CY2X014 is one-time programmable (OTP). Document Number: 001-10179 Rev. *I The CY2X014 can synthesize a frequency to a resolution of one part per million (ppm), but the actual accuracy of the output frequency is limited by the accuracy of the integrated reference crystal. Pin 1: Output Enable (OE) or Power Down (PD#) Pin 1 is programmed as either OE or PD#. The OE function is used to enable or disable the CLK output quickly, but it does not reduce core power consumption. The PD# function puts the device into a low power state, but the wake-up takes longer because the PLL must reacquire the lock. Industrial versus Commercial Device Performance Industrial and commercial devices have different internal crystals. They have a potentially significant impact on performance levels for applications requiring the lowest-possible phase noise. CyClockWIzard software allows the user to select between and view the expected performance of both options. Table 1. Device Programming Variables Variable Output frequency Pin 1 function (OE or PD#) Temperature range (commercial or industrial) Page 4 of 14 CY2X014 Absolute Maximum Conditions Parameter VDD [1] Description Condition Supply voltage Min Max Unit –0.5 4.4 V Input voltage, DC Relative to VSS –0.5 VDD + 0.5 V TS Temperature, storage Non operating –55 135 °C TJ Temperature, junction –40 135 °C ESDHBM Electrostatic discharge (ESD) protection human body model (HBM) JEDEC STD 22-A114-B 2000 – V JA[2] Thermal resistance, junction to ambient 0 m/s airflow VIN 64 °C/W Operating Conditions Parameter VDD Description Min Typ Max Unit 3.3-V supply voltage range 3.0 3.3 3.6 V 2.5-V supply voltage range 2.375 2.5 2.625 V TPU Power-up time for VDD to reach minimum specified voltage (power ramp is monotonic) 0.05 – 500 ms TA Ambient temperature (commercial) 0 – 70 °C –40 – 85 °C Ambient temperature (industrial) Notes 1. The voltage on any input or I/O pin cannot exceed the power pin during power up. 2. Simulated. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of copper (2/1/1/2 oz.). The internal layers are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model. Document Number: 001-10179 Rev. *I Page 5 of 14 CY2X014 DC Electrical Characteristics Parameter IDD [3] Description Operating supply current Condition Min Typ Max Unit VDD = 3.6 V, CLK = 150 MHz, OE/PD# = VDD, output terminated – – 150 mA VDD = 2.625 V, CLK = 150 MHz, OE/PD# = VDD, output terminated – – 145 mA – – 200 A ISB Standby supply current PD# = VSS VOH LVPECL high output voltage VDD = 3.3 V or 2.5 V, RTERM = 50 to VDD – 2.0 V VDD – 1.15 – VDD – 0.75 V VOL LVPECL low output voltage VDD = 3.3 V or 2.5 V, RTERM = 50 to VDD – 2.0 V VDD – 2.0 – VDD – 1.625 V VOD1 LVPECL output voltage swing (VOH – VOL) VDD = 3.3 V or 2.5 V, RTERM = 50 to VDD – 2.0 V 600 – 1000 mV VOD2 LVPECL output voltage swing (VOH – VOL) VDD = 2.5 V, RTERM = 50 to VDD – 1.5 V 500 – 1000 mV VOCM LVPECL output common mode voltage (VOH + VOL)/2 VDD = 2.5 V, RTERM = 50 to VDD – 1.5 V 1.2 – – V IOZ LVPECL output leakage current PD#/OE = VSS –35 – 35 A VIH Input high voltage 0.7 × VDD – – V VIL Input low voltage – – 0.3 × VDD V IIH Input high current Input = VDD – – 115 A IIL Input low current Input = VSS – – 50 A CIN Input capacitance – 15 – pF Note 3. IDD includes ~24 mA of current that is dissipated externally in the output termination resistors. Document Number: 001-10179 Rev. *I Page 6 of 14 CY2X014 AC Electrical Characteristics The following table lists the AC electrical specifications for this device. Parameter [4] Description FOUT Output frequency [5] FSC Frequency stability, commercial devices [6] FSI Frequency stability, industrial devices [6] AG Aging, 10 years TDC Output duty cycle Condition Min Typ Max Unit 50 – 690 MHz VDD = min to max, TA = 0 °C to 70 °C – – ±35 ppm VDD = min to max, TA = –40 °C to 85 °C – – ±55 ppm – – ±15 ppm F < 450 MHz, measured at zero crossing 45 50 55 % F > 450 MHz, measured at zero crossing 40 50 60 % 0.2 0.4 1.0 ns TR, TF Output rise and fall time 20% and 80% of full output swing TOHZ Output disable time Time from falling edge on OE to stopped outputs (asynchronous) – – 100 ns TOE Output enable time Time from rising edge on OE to outputs at a valid frequency (asynchronous) – – 100 ns TLOCK Startup time Time for CLK to reach valid frequency measured from the time VDD = VDD (min.) or from PD# rising edge – – 10 ms TJitter() RMS phase jitter (random) FOUT = 106.25 MHz (12 kHz to 20 MHz) – 1 – ps Pre-defined factory configurations – ps Notes 4. Not 100% tested, guaranteed by design and characterization. 5. This parameter is specified in the CyClockWizard software 6. Frequency stability is the maximum variation in frequency from F0. It includes initial accuracy, and variation from temperature and supply voltage. Document Number: 001-10179 Rev. *I Page 7 of 14 CY2X014 Typical Output Characteristics Figure 2. 2.5-V Supply and Termination to VDD–1.5 V, Minimum VDD and Maximum TA 0.9 1.40 0.8 0.7 VOCM (V) Swing (V) 1.35 0.6 1.30 1.25 0.5 1.20 0.4 0 100 200 300 400 500 600 0 700 100 200 300 400 500 600 700 Frequency (MHz) Frequency (MHz) Figure 3. 2.5-V Supply and Termination to VDD–2 V, Minimum VDD and Maximum TA 0.9 0.90 0.8 0.7 VOCM (V) Swing (V) 0.85 0.6 0.80 0.75 0.5 0.4 0.70 0 100 200 300 400 500 600 700 0 100 200 Frequency (MHz) 300 400 500 600 700 600 700 Frequency (MHz) Figure 4. 3.3-V Supply and Termination to VDD–2 V, Minimum VDD and Maximum TA 0.9 1.60 0.8 0.7 VOCM (V) Swing (V) 1.55 0.6 1.50 1.45 0.5 0.4 1.40 0 100 200 300 400 Frequency (MHz) Document Number: 001-10179 Rev. *I 500 600 700 0 100 200 300 400 500 Frequency (MHz) Page 8 of 14 CY2X014 Switching Waveforms Figure 5. Output DC Parameters VA CLK VOD VOCM = (VA + VB)/2 CLK# VB Figure 6. Duty Cycle Timing CLK TDC = CLK# TPW TPERIOD TPW TPERIOD Figure 7. Output Rise and Fall Time CLK# 80% 80% 20% 20% CLK TF TR Figure 8. Output Enable and Disable Timing OE VIL TOHZ VIH TOE CLK High-Impedance CLK# Termination Circuits Figure 9. LVPECL Termination VDD – 2 V or VDD - 1.5 V (VDD = 2.5 V) VDD – 2 V (VDD = 3.3 V) CLK CLK# Document Number: 001-10179 Rev. *I BUF BUF CLK CLK# Page 9 of 14 CY2X014 Ordering Information Part Number Configuration Package Description Product Flow Pb-free CY2X014FLXCT Field-programmable 6-pin ceramic LCC surface mount device (SMD) - tape and reel Commercial, 0 °C to 70 °C CY2X014FLXIT Field-programmable 6-pin ceramic LCC SMD - tape and reel Industrial, –40 °C to 85 °C Some product offerings are factory-programmed customer-specific devices with customized part numbers. The Possible Configurations table shows the available device types, but not complete part numbers. Contact your local Cypress FAE or sales representative for more information. Possible Configurations Part Number [7] Configuration Package Description Product Flow CY2X014LXCxxxT Factory-configured 6-pin ceramic LCC SMD - tape and reel Commercial, 0 °C to 70 °C CY2X014LXIxxxT Factory-configured 6-pin ceramic LCC SMD - tape and reel Industrial, –40 °C to 85 °C Ordering Code Definitions CY 2X014 X - L X X XXX X X = blank or T blank = Tube; T = Tape and Reel Custom part configuration code Temperature Range: X = C or I C = Commercial; I = Industrial Pb-free Package Type: L = 6-pin LCC package X = F or blank F = Field programmable device; blank = Factory configured device Base part number Company ID: CY = Cypress Note 7. “xxx” indicates factory programmed parts based on customer specific configuration. For more details, contact your local Cypress FAE or Sales Representative. Document Number: 001-10179 Rev. *I Page 10 of 14 CY2X014 Package Diagrams Figure 10. 6-pin Ceramic LCC (5.0 × 3.2 × 1.3 mm) LZ06A Package Outline, 001-10044 001-10044 *B Document Number: 001-10179 Rev. *I Page 11 of 14 CY2X014 Acronyms Acronym Document Conventions Description Units of Measure ESD electrostatic discharge FAE field application engineer °C degree Celsius HBM human body model kHz kilohertz JEDEC joint electron devices engineering council MHz megahertz LCC leadless chip carrier µA microampere LVPECL low-voltage positive-referenced emitter coupled logic mA milliampere mm millimeter ms millisecond mV millivolt OE output enable OTP one-time programmable PCB printed circuit board PLL phase-locked loop RMS root mean square SMD surface mount device XO crystal oscillator Document Number: 001-10179 Rev. *I Symbol Unit of Measure ns nanosecond ohm ppm parts per million % percent pF picofarad ps picosecond V volt W watt Page 12 of 14 CY2X014 Document History Page Document Title: CY2X014, Low Jitter LVPECL Crystal Oscillator Document Number: 001-10179 Rev. ECN Orig. of Change Submission Date ** 504478 RGL See ECN New datasheet *A 1428603 JWK / SFV See ECN Removed pull up on pin 1 and related specifications, Added items to Programming Variables section, Added CIN specification, Modified tJ2, IIH, IIL, IDD and ISB specifications, Changed to a single Frequency Stability specification, Removed Peak-to-peak Period Jitter specification, Changed pin 2 from NC to DNU, Changed max storage temperature, Title change, 2.5V supply tightened from ±10% to ±5%, 2.5V termination option changed from VDD-1.4V to VDD-1.5V, Added typical output characteristic curves *B 2669117 KVM / AESA 03/05/09 Revised frequency stability and aging specs and conditions, Max frequency changed from 700 MHz to 690 MHz, Duty cycle changed from 45/55 to 40/60 for freq > 450 MHz, Removed reference to CY3672 programmer, Junction and storage temperatures changed from 125 to 135°C, IIH changed from 20 A to 115 A, IIL changed from 20 A to 50 A, Rise and fall times changed from 350 ps to 500 ps, Removed MSL spec, Changed Datasheet Status to Final. *C 2701663 KVM / PYRS 05/06/09 General clean up Added explanation of gaps in the frequency range Added URL for software Removed frequency stability paragraph under Programming Variables Added programming variables table Added separate IDD spec for 2.5V supply Changed the amount of load current in IDD footnote Changed phase jitter parameter name Removed supply voltage as a programming variable Changed conditions for ESD spec Changed rise and fall times from 500 ps to 400 ps typ, added min and max *D 2718433 WWZ / HMT 06/12/09 No change. Submit to ECN for product launch. *E 2761943 KVM 09/10/09 Revised maximum output rise and fall times. *F 2896548 KVM 03/19/10 Moved parts with ‘xxx’ into new table, Possible Configurations Updated package diagram *G 2973338 CXQ 07/08/2010 Added Standard and Application-Specific Factory Configurations. Added phase jitter specs for pre-defined configurations in AC Electrical Characteristics (note 7 refers users to the new table on page 2 for typical specs). Added all new factory programmed devices from the Standard and Application-Specific Factory Configurations to Ordering Information. Added note 8 to reference the configuration descriptions for each new device. Changed all references to CyberClocksOnline software to CyClockWizard. Removed section on phase noise vs jitter SW optimization. *H 3767932 PURU 10/05/2012 Updated Package Diagrams (spec 001-10044 (Changed revision from *A to *B)). Added Units of Measure. Updated in new template. *i 3845087 PURU 12/20/2012 Removed references of “Standard and Application-Specific Factory Configurations” in Functional Description. Removed “Standard and Application-Specific Factory Configurations”. Removed references of “Standard and Application-Specific Factory Configurations” in Factory-configured CY2X014 under Programming Description. Updated Ordering Information (Updated part numbers). Document Number: 001-10179 Rev. *I Description of Change Page 13 of 14 CY2X014 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control PSoC Solutions cypress.com/go/automotive cypress.com/go/clocks psoc.cypress.com/solutions cypress.com/go/interface PSoC 1 | PSoC 3 | PSoC 5 cypress.com/go/powerpsoc cypress.com/go/plc Memory cypress.com/go/memory PSoC cypress.com/go/psoc Touch Sensing cypress.com/go/touch USB Controllers Wireless/RF cypress.com/go/USB cypress.com/go/wireless © Cypress Semiconductor Corporation, 2007-2012. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 001-10179 Rev. *I Revised December 20, 2012 Page 14 of 14 CyberClocks is a trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders.