PL IA NT CO M *R oH S Features Applications ■ Formerly ■ xDSL (ADSL, VDSL, VDSL2) ■ ■ High Data Rate Interface IC protection ■ ■ ■ ■ ■ brand Extremely high speed performance Low impedance Two TBU® protectors in one small package Very high bandwidth, GHz compatible Simple, superior circuit protection RoHS compliant*, UL Recognized (LVDS, HDMI, etc.) ■ Industrial sensors and controls ■ General electronics P40-G Series TBU® High-Speed Protectors Transient Blocking Units - TBU® Devices Bourns® Model P40-G products are high-speed bidirectional protection components, constructed using MOSFET semiconductor technology, designed to protect against faults caused by short circuits, AC power cross, induction and lightning surges. Agency Approval UL recognized component File # E315805. Industry Standards Description The TBU® high-speed protector, triggering as a function of the MOSFET, blocks surges and provides an effective barrier behind which sensitive electronics are not exposed to large voltages or currents during surge events. The TBU® device is provided in a surface mount DFN package and meets industry standard requirements such as RoHS and Pb Free solder reflow profiles. Model Telcordia GR-1089 ITU-T K.20, K.20E, K.21, K.21E, K.45 P40-G Absolute Maximum Ratings (Tamb = 25 °C) Symbol Parameter Value Unit Vimp Maximum protection voltage for impulse faults with rise time ≥ 1 µsec 40 V Vrms Maximum protection voltage for continuous Vrms faults 28 V Top Operating temperature range -40 to +85 °C Tstg Storage temperature range -65 to +150 °C Electrical Characteristics (Tamb = 25 °C) Symbol Parameter Min. Iop Maximum current through the device that will not cause current blocking Itrigger Typical current for the device to go from normal operating state to protected state Iout Maximum current through the device ® Rdevice Series resistance of the TBU device Rbal Line-to line series resistance difference between two TBU® devices tblock Maximum time for the device to go from normal operating state to protected state Iquiescent Current through the triggered TBU® device with 40 Vdc circuit voltage Vreset Voltage below which the triggered TBU® device will transition to normal operating state The P40-G Series TBU® high-speed protector is bidirectional; specifications are valid in both directions. *RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. Typ. Max. Unit 240 mA 350 mA 480 3.6 mA 4.2 Ω 5 % 0.2 µs 0.7 mA 7 V P40-G Series TBU® High-Speed Protectors Typical Performance Characteristics Time to Block vs. Fault Current V-I Characteristics Time to Block vs. Fault Current +I 1 0.1 -Vreset +V Vreset Time to Block (sec) Itrigger 0.01 0.001 0.0001 0.00001 0.000001 0.0000001 0.1 -Itrigger 1 10 100 1000 Fault Current (A ) Trigger Current vs. Temperature 140 % of Trigger Current 120 100 80 60 40 20 -40 -20 0 20 40 60 80 Temperature (°C) Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. P40-G Series TBU® High-Speed Protectors Operational Characteristics The graph below demonstrates the operational characteristics of the TBU® device. In the graph below the fault voltage, protected side voltage, and current is presented. V1 TEST CONFIGURATION DIAGRAM Load Line1 P40-G Line2 P40-G Lightning Protection 40 V 3 10 V/div. 400 mA/div. 1 1 µs/div. Ch1 V1 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. Ch3 Current P40-G Series TBU® High-Speed Protectors Product Dimensions K B K Dim. E C F F N A G 4 5 6 B H C A G 3 PIN 1 J D TOP VIEW SIDE VIEW M 1 2 H E F J N G BOTTOM VIEW H Recommended Pad Layout 0.35 (.014) 0.90 (.035) J Pad Designation 0.30 +0.05/-0.00 (.012 +.002/-.000) 2.60 (.102) D Pad # Apply 1 In1 2 NC 3 Out1 4 Out2 5 NC 6 In2 1.45 (.057) 0.30 (.012) NC = Solder to PCB; do not make electrical connection, do not connect to ground. TBU® devices have matte-tin termination finish. Suggested layout should use non-solder mask define (NSMD). Recommended stencil thickness is 0.10-0.12 mm (.004-.005 in.) with stencil opening size 0.025 mm (.0010 in.) less than the device pad size. As when heat sinking any power device, it is recommended that, wherever possible, extra PCB copper area is allowed. For minimum parasitic capacitance, do not allow any signal, ground or power signals beneath any of the pads of the device. K M N Min. 3.90 (.154) 3.90 (.154) 0.80 (.031) 0.000 (.000) 2.55 (.100) 0.20 (.008) 0.75 (.030) 1.40 (.055) 0.10 (.004) 0.25 (.010) 0.55 (.022) 0.20 (.008) DIMENSIONS: Typ. 4.00 (.157) 4.00 (.157) 0.85 (.033) 0.025 (.001) 2.60 (.102) 0.25 (.010) 0.80 (.031) 1.45 (.057) 0.15 (.006) 0.30 (.012) 0.60 (.024) 0.25 (.010) Max. 4.10 (.161) 4.10 (.161) 0.90 (.035) 0.050 (.002) 2.65 (.104) 0.30 (.012) 0.85 (.033) 1.50 (.059) 0.20 (.008) 0.35 (.014) 0.65 (.026) 0.30 (.012) MM (INCHES) Block Diagram 6 4 1 3 TBU® Device Thermal Resistances Thermal resistance using minimal pad size, where the power is the total power dissipated in the package. Additional copper pad area to be used for additional heatsinking is also recommended. Symbol Value Unit Rth(j-a) Junction to Package Pads (1 TBU of Pair) Parameter 250 °C/W Rth(j-a) Junction to Package Pads (2 TBUs of Equal Power) 180 °C/W Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. P40-G Series TBU® High-Speed Protectors Reflow Profile Profile Feature Average Ramp-Up Rate (Tsmax to Tp) Preheat - Temperature Min. (Tsmin) - Temperature Max. (Tsmax) - Time (tsmin to tsmax) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5 °C of Actual Peak Temp. (tp) Ramp-Down Rate Time 25 °C to Peak Temperature Pb-Free Assembly 3 °C/sec. max. 150 °C 200 °C 60-180 sec. 217 °C 60-150 sec. 260 °C 20-40 sec. 6 °C/sec. max. 8 min. max. How to Order Typical Part Marking P 40 - G 240 - WH MANUFACTURER’S TRADEMARK* Form Factor P = Two TBU® protectors in one device Impulse Voltage Rating 40 = 40 V MARKING NUMBER 04GC = P40-G240-WH Directional Indication G = Bidirectional Iop Indicator 240 = 240 mA PIN 1 MANUFACTURING DATE CODE* - 1ST DIGIT INDICATES THE YEAR’S 6-MONTH PERIOD. - 2ND DIGIT INDICATES THE WEEK NUMBER IN THE 6-MONTH PERIOD. - 3RD & 4TH DIGITS INDICATE SPECIFIC LOT FOR THE WEEK. 6-MONTH PERIOD CODES: A = JAN-JUN 2009 C = JAN-JUN 2010 B = JUL-DEC 2009 D = JUL-DEC 2010 E = JAN-JUN 2011 F = JUL-DEC 2011 EXAMPLE: ARBC - 1ST DIGIT ‘A’ = JAN-JUN 2009 - 2ND DIGIT ‘R’ = WEEK 18; WEEK OF APRIL 27 - 3RD & 4TH DIGITS ‘BC’ = LOT SPECIFIC INFORMATION *TRANSITION FROM FULTEC TRADEMARK AND LOT CODE TO BOURNS TRADEMARK AND DATE CODE IN 2009. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. P40-G Series TBU® High-Speed Protectors Packaging Specifications (per EIA468-B) P0 E D t B P2 TOP COVER TAPE A N F W C D B0 K0 CENTER LINES OF CAVITY A0 P D1 EMBOSSMENT G (MEASURED AT HUB) USER DIRECTION OF FEED QUANTITY: 3000 PIECES PER REEL A Device Min. 326 330.25 (12.835) (13.002) P40-G240 Device P40-G240 Device P40-G240 B Max. A0 G N Min. Max. Min. Max. Min. Max. Ref. Ref. 1.5 (.059) 2.5 (.098) 12.8 (.504) 13.5 (.531) 20.2 (.795) - 12.4 (.488) 102 (4.016) B0 C D D D1 E F Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. max. 4.2 (.165) 4.4 (.173) 4.2 (.165) 4.4 (.173) 1.5 (.059) 1.6 (.063) 1.5 (.059) - 1.65 (.065) 1.85 (.073) 5.45 (.216) 5.55 (.219) Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. 1.05 (.041) 1.25 (.049) 7.9 (.311) 8.1 (.319) 3.9 (.159) 4.1 (.161) 1.9 (.075) 2.1 (.083) 0.25 (.010) 0.35 (.014) 11.7 (.461) 12.3 (.484) K0 P P0 DIMENSIONS: P2 t W MM (INCHES) Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. Model - High Speed Surge Protectors P40-G P40-G Series Series TBU® High-Speed Protectors Reference Application A cost-effective protection solution combines the Bourns® TBU® protection device with a diode bridge on the driver side of the transformer and GDTs on the line side. The GDT should have a minimum DCBD of 900 V and a maximum sparkover voltage of 1600 V. The diagram below illustrates a common configuration of these components. The graph demonstrates the operational characteristics of the circuit. Ch1 Ch3 V CC P40-G P40 Common Configuration Diagram - xDSL Protection 200 mA/div. 400 V/div. 3 1 1 µs/div. Ch1 V1 Ch3 Current 5000 V Lightning 2/10 μsec, 500 A Asia-Pacific: Tel: +886-2 2562-4117 • Fax: +886-2 2562-4116 Europe: Tel: +41-41 768 5555 • Fax: +41-41 768 5510 The Americas: Tel: +1-951 781-5500 • Fax: +1-951 781-5700 www.bourns.com REV. 04/12 “TBU” is a registered trademark of Bourns, Inc. in the United States and other countries. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.