ONSEMI NCP4810

NCP4810
X2 Capacitors Discharger
The NCP4810 is a HV switch suitable for implementation of the X2
capacitor discharge function in applications with extremely low
standby consumption requirements. It contains two high voltage
MOSFETs with 700 V peak capabilities that can be connected directly
to AC line voltage. Implementing this IC helps to design optimized
EMI filter with appropriate X2 capacitor and reduced EMI coil
volume and losses.
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MARKING
DIAGRAM
Features
•
•
•
•
•
•
•
8
Build−in 700 V MOSFET
Minimum Discharge Capability 0.85 mA
Self Consumption Below 11 mW @ 700 V
NoVCC Necessary
Compact SOIC−8 Package
−40°C to + 125°C Operating Temperature Range
This is a Pb−Free Device
8
1
NCP4810G
ALYWX
1
A
L
Y
W
X
G
Typical Applications
•
•
•
•
SOIC−8
D SUFFIX
CASE 751
Auxiliary Power Supply
AC−DC Adapter
Standby Power Supply
Offline Battery Charger
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Assembly Lot
= Pb−Free Package
PINOUT
NC
NC
AC1
AC2
AC1
AC2
NC
NC
ORDERING INFORMATION
Device
NCP4810DR2G
Package
Shipping†
SOIC−8
(Pb−Free)
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
September, 2013 − Rev. 0
1
Publication Order Number:
NCP4810/D
NCP4810
X1−1
R1
NCP4810
L1
CX1
AC input
X2−2
AC1
CX2
C1
AC2
DC output
X2−1
R2
GND
X1−2
Figure 1. Typical Application Example of the X2 Discharger
PIN FUNCTION DESCRIPTION
Pin N5
Pin Name
Function
Pin Description
1
NC
Not connected
−
2
AC1
Alternate Current 1
Terminal for connections AC line
3
AC1
Alternate Current 1
Terminal for connections AC line
4
NC
Not connected
−
5
NC
Not connected
−
6
AC2
Alternate Current 2
Terminal for connections AC line
7
AC2
Alternate Current 2
Terminal for connections AC line
8
NC
Not connected
−
AC1
+
Idisch
−
Tdel
delay
S SET Q
R CLR Q
VAC(start)
R SET Q
VAC(start)
−
AC2
Tdel
delay
S
CLR
Q
Idisch
+
Figure 2. Simplified Circuit Architecture
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2
NCP4810
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VHV
−700 to 700
V
RqJ−A
162
°C/W
Junction Temperature
TJ
−40 to +150
°C
Storage Temperature Range
Tstg
−60 to +150
°C
ESD Capability, HBM model per JEDEC standard JESD22, Method A114E
VESD−HBM
4
kV
ESD Capability, Machine Model per JEDEC standard JESD22, Method A115A
VESD−MM
600
V
AC1 pin Voltage related to AC2 pin
Thermal Resistance, Junction−to−Air (50 mm2 x 35 mm Cu)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The latchup tests were not provided on this device because of two function pins only.
ELECTRICAL CHARACTERISTICS
(for typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, unless otherwise noted.)
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
VAC = 400 Vdc
Idisch
0.85
−
−
mA
IAC = Idisch * 0.95
VAC(start)
−
−
40
Vdc
VAC = 700 Vdc
IAC(leak)
−
7
15
mA
−
Tdel
15
−
−
ms
HV PIN
Discharge current capability
Minimum HV voltage
IHV or IHV(strat) leakage current
INTERNAL TIMER
Internal timer
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3
NCP4810
TYPICAL CHARACTERISTICS
9.5
1.75
1.50
8.5
Idisch (mA)
IAC(Leak) (mA)
9.0
8.0
1.00
7.5
7.0
−40 −25 −10
25.00
1.25
5
20 35 50 65
TEMPERATURE (°C)
80 95 110 125
Figure 3. IHV or IHV(start) Leakage Current,
IAC(Leak)
0.75
−40 −25 −10
5
20 35 50 65
TEMPERATURE (°C)
80 95 110 125
Figure 4. Discharge Current Capability, Idisch
55
50
45
Tdel (ms)
VAC(start) (V)
24.75
24.50
40
35
24.25
30
24.00
−40 −25 −10
5
20 35 50 65
TEMPERATURE (°C)
80 95 110 125
25
−40 −25 −10
Figure 5. Minimum HV Voltage, VAC(start)
5
20 35 50 65
TEMPERATURE (°C)
80 95 110 125
Figure 6. Internal Timer, Tdel
Function Description:
function refer to the input voltage behavior is described on
Figure 7.
The input sinusoidal voltage resets the relevant internal
timer by transitioning across zero level at each its half wave.
If no zero cross is detected, the internal timer expires and the
appropriate current sink is turned on. This discharging path
(the current sink and opposite diode) is established until the
X2 capacitors are discharged (the input terminal voltage
VAC drops to zero) or the input AC voltage is restored by
re−plugging the mains. The minimum discharge voltage is
defined by VAC(start). Low VAC(start) allows to use serial
resistors to distribute loss during discharging process. The
recommended resistors values (R1 and R2) for any X2
capacitor are mentioned in Table 1. Every possibility of IC
Table 1. RECOMMENDED SERIES RESISTORS
VALUES
X2 Capacitance
Total Series Resistance (R1 + R2)
≤500 nF
1.5 MW
750 nF
1.02 MW
1 mF
780 kW
1.5 mF
480 kW
2 mF
360 kW
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4
NCP4810
VAC
VAC(start)
Idisch
t = Tdel
t < Tdel
Discharge
Current
Plugged
Unplugged
Mains
Figure 7. Function Description
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5
t + Tdel
NCP4810
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
SOLDERING FOOTPRINT*
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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NCP4810/D