National Semiconductor Application Note 2108 Mark Sauerwald December 15, 2010 Introduction The LMH1983 is a highly integrated programmable audio / video (A/V) clock generator intended for broadcast and professional applications. The programmable features allow for the generation of many different clocks and control signals. This application note describes how to generate a 44.1 kHz audio clock using PLL4. To generate a 44.1 kHz based clock with the LMH1983, make the following writes to the PLL4 Advance Control registers: 0x35 (Charge Pump Current): 0F'h 0x36 (R Counter): 7D'h 0x37 ( N Counter MSB): 03'h 0x38 ( N Counter LSB): 10'h 0x39 ( VCO Frequency): 66'h To calculate these numbers you need to match the frequencies coming in to the phase comparator — the first of these frequencies is 27 MHz / R. The second frequency is 44.1 kHz x 512 x 4 x 5 x 3 / (N*8) (assuming that the IS125 bit and the PLL_DIV registers have not been changed from their default vaules.) Setting these two equal to each other gives: 27 MHz * 8 * N = 44.1 kHz x 512 x 4 x 3 x R Break 27 MHz and 44.1 kHz down into their prime factors: 27 MHz = 26 * 33 * 56 44.1 kHz = 22 * 32 * 52 * 72 therefore: 29 * 33 * 56 * N = 213 * 33 * 53 * 72 x R simplifying: 53 * N = 24 * 72 * R Therefore the following values were selected: Generating 44.1 kHz Based Clocks with the LMH1983 Generating 44.1 kHz Based Clocks with the LMH1983 53 = 125 = 7D'h for R 24 * 72 = 784 = 0310'h for N Since the frequency coming into the charge pump is about one half the default value, increase the charge pump current to about twice the default value to compensate, then adjust the VCO center frequency to main stable lock. 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