AK62464Z 65,536 x 24 Bit CMOS/BiCMOS Static Random Access Memory ACCUTEK MICROCIRCUIT CORPORATION 64-Pin ZIP DESCRIPTION Front View The Accutek AK62464 SRAM Module consists of fast high performance SRAMs mounted on a low profile, 64 pin ZIP Board. The module utilizes six 28 pin 64K x 4 SRAMs in 300 mil SOJ packages and three decoupling capacitors mounted on the top side and two 28 pin 64K x 4 SRAMs in 300 mil SOJ packages and three decoupling capacitors mounted on the bottom side of a printed circuit board. 1 33 64 32 · TTL-compatible inputs and outputs · Operating temperature range in free air, 00C to 700C · JEDEC Standard 64 pin ZIP format · Power 900 mA Max Active (12 nS) 840 mA Max Active (15 nS) 780 mA Max Active (20 nS) 240 mA Max Standby (Cycling) 12 mA Max Standby (f=0MHZ) · Common I/O, single OE functions with four separate chip selects (CE) · Low height 0.500 inch maximum · Upward compatible with PIN NOMENCLATURE PIN ASSIGNMENT FUNCTIONAL DIAGRAM PIN # SYMBOL PIN # SYMBOL PIN # SYMBOL PIN # 1 Vss 17 A2 33 NC 49 A4 Chip Enable 2 PD0 18 A9 34 CE3 50 A11 Data In/Data Out 3 PD1 19 DQ9 35 NC 51 A5 4 DQ1 20 DQ5 36 NC 52 A12 21 DQ10 37 OE 53 Vcc A13 A0 - A15 Address Inputs CE1 - CE3 DQ1 - DQ24 SYMBOL OE Output Enable 5 NC PD0 - PD1 Presence Detect 6 DQ2 22 DQ6 38 Vss 54 Vcc Power Supply 7 NC 23 DQ11 39 DQ13 55 A6 8 DQ3 24 DQ7 40 DQ17 56 DQ21 Vss Ground 9 NC 25 DQ12 41 DQ14 57 NC WE Write Enable 10 DQ4 26 DQ8 42 DQ18 58 DQ22 NC No Connect 11 NC 27 Vss 43 DQ15 59 NC 12 Vcc 28 WE 44 DQ19 60 DQ23 MODULE OPTIONS AK62464Z 13 A0 29 A15 45 DQ16 61 NC 14 A7 30 A14 46 DQ20 62 DQ24 15 A1 31 CE2 47 A3 63 NC 16 A8 32 CE1 48 A10 64 Vss PD0 = Open PD1 = Vss 1 · Fast Access Times range from 8 nSEC BiCMOS to 20 nSEC CMOS · Single 3.3 volt power supply - AK62464Z/3.3 · 65,536 x 24 bit organization 64 · Presence Detect, PD0 and PD1 for identifying module density · Single 5 volt power supply - AK62464Z FEATURES Leadless ZIP: 33 Rear View The SRAMs used have common I/O functions and single output enable functions. Also, three separate chip select (CE) connections are used to independently enable the three bytes. The modules can be supplied in a variety of access time values from 8nSEC to 20nSEC in CMOS or BiCMOS technology. The Accutek module is designed to have a maximum seated height of 0.500 inch to provide for the lowest height off the board. The modules conform to JEDEC - standard sizes and pin-out configurations. Using two pins for module memory density identification, PD0 and PD1, minimizes interchangeability and design considerations when changing from one module size to the other in customer applications. 32 MECHANICAL DIMENSIONS ORDERING INFORMATION Inches PART NUMBER CODING INTERPRETATION Position 1 2 3 4 5 6 7 8 Top View ZIP 3 5 59 60 63 64 1 3.595 3.605 CL CL 0.100 TYP 64 0.100 TYP CL CL EXAMPLES: AK62464Z-12 5 NEW PASTURE ROAD NEWBURYPORT, MA 01950-4040 PHONE: 978-465-6200 FAX: 978-462-3396 Email: [email protected] Internet: www.accutekmicro.com 0.350 MAX 64K x 24, 12 nSEC SRAM Module, ZIP Configuration ACCUTEK .050 x .050 ANGLE NOTCH 0.500 MAX 0.050 TYP The numbers and coding on this page do not include all variations available but are shown as examples of the most widely used variations. Contact Accutek if other information is required. MICROCIRCUIT CORPORATION 61 62 CLCL 8 0.120 0.130 7 C L 6 0.125 0.155 5 6 4 4 3 2 2 Product AK = Accutek Memory Type 4 = Dynamic RAM 5 = CMOS Dynamic RAM 6 = Static RAM Organization/Word Width 1 = by 1 16 = by 16 4 = by 4 32 = by 32 8 = by 8 36 = by 36 9 = by 9 Size/Bits Depth 64 = 64K 4096 = 4 MEG 256 = 256K 8192 = 8 MEG 1024 = 1 MEG 16384 = 16 MEG Package Type G = Single In-Line Package (SIP) S = Single In-Line Module (SIM) D = Dual In-Line Package (DIP) W = .050 inch Pitch Edge Connect Z = Zig-Zag In-Line Package (ZIP) Special Designation P = Page Mode N = Nibble Mode K = Static Column Mode W = Write Per Bit Mode V = Video Ram Separator - = Commercial 00C to +700C M = Military Equivalent Screened (-550C to +1250C) I = Industrial Temperature Tested (-450C to +850C) X = Burned In Speed (first two significant digits) DRAMS SRAMS 50 = 50 nS 12 = 12 nS 60 = 60 nS 15 = 15 nS 70 = 70 nS 20 = 20 nS 80 = 80 nS 25 = 25 nS 1 1 Accutek reserves the right to make changes in specifications at any time and without notice. Accutek does not assume any responsibility for the use of any circuitry described; no circuit patent licenses are implied. Preliminary data sheets contain minimum and maximum limits based upon design objectives, which are subject to change upon full characterization over the specific operating conditions.