PPG323F - Data Delay Devices, Inc.

PPG323F
23-BIT CRYSTAL-STABILIZED
PULSE GENERATOR
(SERIES PPG323F)
FEATURES







PINOUT
Digitally programmable in 8,388,608 steps
Monotonic pulse-width-vs-address variation
Rising edge triggered
Precise and stable pulse width
Low jitter over entire programmable range
Input & outputs fully TTL interfaced & buffered
2
10 T L fan-out capability
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
OUT
IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
RES
VCC
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The PPG323F-series device is a 23-bit digitally programmable pulse
generator. The width, PW A, depends on the address code (A22-A0)
according to the following formula:
TRIG
OUT
A0-A22
VCC
GND
PW A = PW 0 + TINC * A
Trigger Input
Pulse Output
Address Bits
+5 Volts
Ground
where A is the address code, TINC is the incremental pulse width of the
device, and PW 0 is the inherent pulse width of the device. The incremental
width is specified by the dash number of the device and can range from 20ns through 5us, inclusively. RES
is held LOW during normal operation. When it is brought HIGH, OUT is forced into a LOW state, and the
unit is ready for the next trigger input. The address is not latched and must remain asserted while the output
pulse is active. The PPG323F is crystal-stabilized, providing low jitter (350ps RMS) over the entire address
range.
DASH NUMBER SPECIFICATIONS
SERIES SPECIFICATIONS






Pulse width tolerance: 0.05% or 100ps,
whichever is greater
Inherent width (PW0): 100ns typical
Inherent delay (TTO): 10ns typical
Operating temperature: -40 to 85 C
Supply voltage VCC: 5VDC  5%
Supply current: ICC = 200ma typical
Part
Number
PPG323F-20
PPG323F-50
PPG323F-100
PPG323F-200
PPG323F-500
PPG323F-1000
PPG323F-2000
PPG323F-5000
Incremental
Width
Per Step (ns)
20
50
100
200
500
1000
2000
5000
Total Width
Change (sec)
0.16777
0.41943
0.83886
1.6777
4.1943
8.3886
16.777
41.943
NOTE: Any dash number between 20 and 5000
not shown is also available.
2014 Data Delay Devices
Doc #14016
6/9/2014
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
PPG323F
APPLICATION NOTES
DEVICE TIMING
POWER SUPPLY BYPASSING
The timing definitions and restrictions for the
PPG323F are shown in Figure 1. The unit is
activated by a rising edge on the TRIG input.
After a time, TTO (called the inherent delay), the
rising edge of the pulse appears at OUT. The
duration of the pulse is given by the above
equation. For the duration of the pulse, the device
ignores subsequent triggers. Once the falling
edge of the pulse has appeared at OUT, an
additional time, TOTR, is required before the
device can respond to the next trigger.
The PPG323F relies on a stable power supply to
produce repeatable pulses within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to the VCC pin, is
recommended. A wide VCC trace should connect
the VCC pin externally, and a clean ground plane
should be used.
At power-up, the state of the PPG323F is
unknown. Consequently, after power is applied,
the unit may not respond to input triggers for a
time equal to the maximum pulse width, PW T.
After this time, the unit will function properly. If
your application requires that the device function
immediately, issue a quick reset at power-up.
`A22:0
Ai
Ai+1
TOAX
TATS
TRW
RES
TRTS
TTW
TRIG
TTO
TTO
TRO
TOTR
OUT
PW A
Figure 1: Timing Diagram
Doc #14016
6/9/2014
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
PPG323F
DEVICE SPECIFICATIONS
TABLE 1: AC CHARACTERISTICS
PARAMETER
Total Programmable Pulse Width
Inherent Pulse Width
Trigger to Output Delay
Reset to Output Delay
Output Skew
Trigger Pulse Width
Reset Pulse Width
Reset to Trigger Setup Time
Address to Trigger Setup Time
Output Low to Address Change
Output to Trigger Recovery Time
SYMBOL
PW T
PW 0
TTO
TRO
TSKEW
TTW
TRW
TRTS
TATS
TOAX
TOTR
MIN
TYP
8,388,608
100.0
10.0
MAX
17.0
1.5
5.0
10.0
9.0
6.0
0.0
10.0
UNITS
TINC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VCC
VIN
TSTRG
TLEAD
MIN
-0.3
-0.3
-55
MAX
7.0
VDD+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
SYMBOL
VOH
Low Level Output Voltage
VOL
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
Output Low Fan-out
IOH
IOL
VIH
VIL
VIK
IIHH
Doc #14016
6/9/2014
IIH
IIL
IOS
MIN
2.5
TYP
3.4
MAX
UNITS
V
0.35
0.5
V
-1.0
20.0
0.8
-1.2
0.1
mA
mA
V
V
V
mA
20
-0.6
-150
25
12.5
A
mA
mA
Unit
Load
2.0
-60
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
NOTES
VCC = MIN, IOH = MAX
VIH = MIN, VIL = MAX
VCC = MIN, IOL = MAX
VIH = MIN, VIL = MAX
VCC = MIN, II = IIK
VCC = MAX, VI = 7.0V
VCC = MAX, VI = 2.7V
VCC = MAX, VI = 0.5V
VCC = MAX
3
PPG323F
PACKAGE DIMENSIONS
2.000
0.500
0.370
0.240
0.130
28
15
0.100
(26 places)
0.027 x 0.027
(28 places)
1.800 2.000
1
Doc #14016
6/9/2014
14
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4
PPG323F
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
o
o
Ambient Temperature: 25 C  3 C
Supply Voltage (Vcc): 5.0V  0.1V
Input Pulse:
High = 3.0V  0.1V
Low = 0.0V  0.1V
Source Impedance:
50 Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width:
PW IN = 10ns
Period:
PERIN = 2 x Max. Pulse Width
OUTPUT:
Load:
Cload:
Threshold:
1 FAST-TTL Gate
5pf  10%
1.5V (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PRINTER
COMPUTER
SYSTEM
REF
PULSE
GENERATOR
OUT
TRIG
TRIG
DEVICE UNDER
TEST (DUT)
OUT
IN
TRIG
TIME INTERVAL
COUNTER
Test Setup
PERIN
PW IN
TRISE
INPUT
SIGNAL
TFALL
VIH
2.4V
1.5V
0.6V
2.4V
1.5V
0.6V
TTO
OUTPUT
SIGNAL
VIL
PW A
VOH
1.5V
1.5V
VOL
Timing Diagram For Testing
Doc #14016
6/9/2014
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
5