Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 General Description Features The AA4006 is a Class AB stereo audio power amplifier with headphone driver, which can deliver 2.7W into 3Ω speakers with 5.0V power supply and THD+N less than 10%. It is designed specially for notebook PC and portable media player applications. · The AA4006 features stereo full differential input or 2 sets of stereo single-ended audio input. There are 4 different gain settings at BTL mode -6dB, 10dB, 15.6dB and 21.6dB, changed by setting GAIN0, GAIN1 pins. At SE mode, the gain is fixed 4.1dB. · · · · · · The AA4006 can amplify square waveform beep input signal from BEEP_IN pin and its' output can always reach BTL terminal, masking all other audio inputs regardless of whether the chip is in shutdown, SE or BTL mode. · · Output Power, THD+N=10%: 110mW at SE mode for 32Ω Headphone 220mW at SE mode for 16Ω Headphone 1.5W at BTL mode for 8Ω Speaker 2.3W at BTL mode for 4Ω Speaker 2.7W at BTL mode for 3Ω Speaker Supply Voltage Range: 4.5V to 5.5V 4 Selectable Internal Fixed Gain Setups Stereo 2:1 Input Multiplexer Stereo Full Differential Input PC Beep Input Low Power Consumption at Shutdown mode 150µA Typical Excellent Click/Pop Noise Suppression Thermal Shutdown Protection Applications The AA4006 is available in TSSOP-24 (EDP) package . · · Notebook PC Portable Media Player TSSOP-24 (EDP) Figure 1. Packages Type of AA4006 Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 1 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Pin Configuration G Package (TSSOP-24 (EDP)) GND 1 24 GND GAIN0 2 23 R_LINE_IN GAIN1 3 22 SHUTDOWN OUTL+ 4 21 OUTR+ L_LINE_IN 5 20 R_HP_IN L_HP_IN 6 19 VDD PVDD 7 18 PVDD R_IN 8 17 HP_LINE OUTL- 9 16 OUTR- L_IN 10 15 HP_SENSE BYPASS 11 14 BEEP_IN GND 12 13 GND Figure 2. Pin Configuration of AA4006 (Top View) Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 2 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Pin Description Pin Number Pin Name Function 1, 12, 13, 24 GND 2 GAIN0 Internal gain setup 0, see table 1 below 3 GAIN1 Internal gain setup 1, see table 1 below 4 OUTL+ Left channel positive output 5 L_LINE_IN 6 L_HP_IN Left channel headphone input 7, 18 PVDD Power supply for output stage 8 R_IN Right channel common input for differential input, AC ground for single-ended input 9 OUTL- 10 L_IN Left channel common input for differential input, AC ground for single-ended input 11 BYPASS Internal reference voltage pin, connect a 1.0µF ceramic capacitor to GND 14 BEEP_IN Beep signal input pin 15 HP_SENSE 16 OUTR- 17 HP_LINE 19 VDD 20 R_HP_IN 21 OUTR+ 22 SHUTDOWN 23 R_LINE_IN Ground reference, it is better to connect with thermal pad Left channel line input Left channel negative output SE, BTL mode switch pin, L – BTL mode, H – SE mode Right channel negative output Headphone, line input select pin, L – line input, H – headphone input Power supply for other analog circuit Right channel headphone input Right channel positive output Shutdown mode select, L – shutdown enable, H – shutdown disable, normal work Right channel line input Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 3 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Table 1: Gain vs. Gain0, Gain1 Logic Level GAIN0 GAIN1 HP_SENSE Mode Gain L L L BTL 6dB L H L BTL 10dB H L L BTL 15.6dB H H L BTL 21.6dB X X H SE 4.1dB Ordering Information AA4006 E1: Lead Free G1: Green Circuit Type Package G: TSSOP-24 (EDP) Package Temperature Range TSSOP-24 (EDP) -40 to 85oC TR: Tape and Reel Part Number Lead Free AA4006GTR-E1 Green Marking ID Lead Free AA4006GTR-G1 AA4006G Green AA4006G-G1 Packing Type Tape & Reel BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Products with "G1" suffix are available in green packages. Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 4 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Absolute Maximum Ratings (Note 1) Parameter Symbol Value Unit Supply Voltage VDD 6 V Input Voltage VIN -0.3 to VDD + 0.3 V Power Dissipation PD Internally limited θ JA 65 TJ 150 oC TSTG -65 to 150 oC TLEAD 260 oC ESD (Human Body Model) 2000 V ESD (Machine Model) 200 V Package Thermal Resistance (Note 2) Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 sec) o C/W Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operation is not implied. Exposure to "Absolute Maximum Ratings" for extended periods may affect device reliability. Note 2: Chip is soldered to 100mm2 (4mm x 25mm) copper (top side solder mask) of 1oz. on PCB with 16 x 0.5mm vias. Recommended Operating Conditions Parameter Supply Voltage Operating Ambient Temperature Symbol Min Max Unit VDD 4.5 5.5 V TA -40 85 oC Electrical Characteristics PVDD=VDD=5.0V, Gain = 6dB @ BTL mode, 4.1dB @ SE mode, TA=25oC, f=1 kHz, 20 kHz Low pass filter, for SE mode, HP_SENSE=5.0V, for BTL mode, HP_SENSE=0V, unless otherwise specified. Parameter Symbol Quiescent Current IDD Shutdown Current ISD HP_SENSE, HP_LINE High Logic Level GAIN0, GAIN1 Conditions Typ Max SE mode, VIN=0, IO=0 3.5 7 BTL mode, VIN=0, IO=0 6.5 12 VSHUTDOWN=0V 150 300 VIH Aug. 2008 Rev. 1. 3 Min Unit mA µA 4.0 V 3.0 V BCD Semiconductor Manufacturing Limited 5 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Electrical Characteristics (Continued) VDD=5.0V, Gain = 6dB @ BTL mode, 4.1dB @ SE mode, TA=25oC, f=1kHz, 20kHz low pass filter, for SE mode, HP_SENSE=5.0V, for BTL mode, HP_SENSE=0V, unless otherwise specified. Parameter Symbol High Logic Level SHUTDOWN HP_SENSE, HP_LINE Low Logic Level GAIN0, GAIN1 Conditions VIH Min Typ Max 2.0 V VIL SHUTDOWN 3.0 V 2.0 V 0.8 Thermal Shutdown Temperature V o 165 Hysteresis Temperature Window Unit C oC 35 BEEP Input Amplitude VBP Gain GBP VP-P 2.5 CBP=0.47µF, f=1kHz, D=50% square wave form, VBP=3.3Vp-p 0.3 THD+N=1%, RL=32Ω 90 THD+N=10%, RL=32Ω 110 THD+N=1%, RL=16Ω 180 THD+N=10%, RL=16Ω 220 V/V SE mode Output Power Total Harmonic Distortion + Noise Signal to Noise Ratio PO THD+N PO=75mW, RL=32Ω S/N mW 0.03 % PO=75mW, RL=32Ω 95 dB Crosstalk XTALK f=1kHz -90 dB Power Supply Rejection Ratio PSRR Cb=1µF, f=1kHz, VRIPPLE=0.2VRMS 60 dB Output Noise VNO f=20Hz to 20kHz, RL=32Ω 20 µVRM VIN=0V, no load ±5 THD+N=1%, RL=3Ω 2.1 THD+N=10%, RL=3Ω 2.7 THD+N=1%, RL=4Ω 1.8 THD+N=10%, RL=4Ω 2.3 THD+N=1%, RL=8Ω 1.2 THD+N=10%, RL=8Ω 1.5 BTL mode Output Offset Voltage Output Power Total Harmonic Distortion + Noise Signal to Noise Ratio PO ±25 mV W THD+N PO=1W, RL=4Ω 0.08 % PO=1W, RL=4Ω 100 dB -100 dB S/R Crosstalk XTALK f=1kHz Power Supply Rejection Ratio PSRR Cb=1µF, f=1kHz, VRIPPLE=0.2VRMS 70 dB Output Noise VNO f=20Hz to 20kHz, RL=8Ω 18 µVRM Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 6 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics 10 300 VIN=0V 9 275 No Load Shutdown Current_ISD(µA) Quiescent Current (mA) 8 BTL Mode 7 6 5 4 SE Mode 3 2 VIN=0 250 IOUT=0 225 VSHUTDOWN=0 200 175 150 125 100 75 50 1 25 0 4.5 5.0 5.5 0 4.5 6.0 5.0 5.5 6.0 Supply Voltage_VDD(V) Supply Voltage (V) Figure 4. Shutdown Current vs. Supply Voltage Figure 3. Quiescent Current vs. Supply Voltage 3.0 2.5 10 VDD=5.0V, SE Mode 20kHz LPF 2.0 THD+N (%) Bypass Voltage (V) RL=16Ω , f=1kHz 1.5 1.0 1 0.1 0.5 0.0 0 1 2 3 4 5 0.01 10m 6 Supply Voltage (V) 50m 100m 400m Output Power (W) Figure 5. Bypass Voltage vs. Supply Voltage Figure 6. THD+N vs. Output Power Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 7 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics (Continued) VDD=5.0V, SE Mode 10 BTL Mode, R L=4 Ω 10 f=1kHz, 20kHz LPF RL=32Ω , f=1kHz 20kHz LPF THD+N (%) THD+N (%) 1 1 VDD=5.0V 0.1 0.1 V DD=5.5V 0.01 10m 50m 100m 0.01 10m 200m 100m Output Power (W) 3 1 Output Power (W) Figure 8. THD+N vs. Output Power Figure 7. THD+N vs. Output Power 10 10 VDD=5.0V, SE Mode VDD=5.0V, SE Mode R L=32Ω , 30kHz LPF RL=32Ω , 30kHz LPF COUT=220µF THD+N (%) THD+N (%) 1 1 f=10kHz 0.1 0.1 PO=75mW PΟ=25mW 0.01 f=1kHz PO=50mW f=100Hz 0.01 10m 1E-3 100m 20 200m 100 1k 10k 20k Frequency (Hz) Output Power (W) Figure 10. THD+N vs. Frequency Figure 9. THD+N vs. Output Power Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 8 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics (Continued) VDD=5.0V, BTL Mode 10 VDD=5.0V, BTL Mode RL=3Ω, f=1kHz RL=4Ω, f=1kHz Gain=6dB, 20kHz LPF Gain=6dB, 20kHz LPF THD+N (%) THD+N (%) 10 1 1 0.1 0.1 0.01 10m 100m 1 0.01 10m 4 100m Output Power (W) VDD=5.0V, BTL Mode 10 VDD=5.0V, BTL Mode RL=8Ω, f=1kHz RL=4Ω, f=1kHz Gain=6dB, 20kHz LPF 20kHz LPF 1 THD+N (%) THD+N (%) 4 Figure 12. THD+N vs. Output Power Figure 11. THD+N vs. Output Power 10 1 Output Power (W) 0.1 Gain=21.6dB 1 0.1 Gain=15.6dB Gain=6dB Gain=10dB 0.01 10m 100m 1 0.01 10m 2 Output Power (W) 100m 1 4 Output Power (W) Figure 14. THD+N vs. Output Power Figure 13. THD+N vs. Output Power Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 9 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics (Continued) 10 VDD=5.0V, BTL Mode VDD=5.0V, BTL Mode RL=4Ω, Gain=6dB RL=3Ω, Gain=6dB 30kHz LPF 30kHz LPF 1 f=10k 1 THD+N (%) THD+N (%) 10 f=1k PO=0.25W 0.1 PO=1.0W PO=1.75W 0.1 0.01 f=20Hz 0.01 10m 100m 1 1E-3 4 20 100 Figure 15. THD+N vs. Output Power 10k 20k 10k 20k Figure 16. THD+N vs. Frequency 10 10 VDD=5.0V, BTL Mode VDD=5.0V, BTL Mode RL=4Ω, Gain=6dB RL=8Ω, Gain=6dB 30kHz LPF 30kHz LPF 1 0.1 THD+N (%) 1 THD+N (%) 1k Frequency (Hz) Output Power (W) PO=1.0W PO=1.5W 0.01 PO=0.25W 0.1 PO=1.0W 0.01 PO=0.25W 1E-3 20 PO=0.5W 100 1k 10k 1E-3 20k 20 100 1k Frequency (Hz) Frequency (Hz) Figure 17. THD+N vs. Frequency Figure 18. THD+N vs. Frequency Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 10 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics (Continued) 0 BTL Mode, R L=4 Ω 10 VDD=5.0V, SE Mode -10 Cb=1.0µF, RL=32Ω f=1kHz, 20kHz LPF VRIPPLE=0.2VRMS -20 Input AC Ground PSRR (dB) THD+N (%) -30 1 V DD =5.0V -40 -50 -60 0.1 -70 V DD=5.5V -80 0.01 10m 100m -90 3 1 20 100 Figure 19. THD+N vs. Output Power 10k 20k 10k 20k Figure 20. PSRR vs. Frequency 0 0 VDD=5.0V, BTL Mode -10 VDD=5.0V, SE Mode Cb=1.0µF, RL=8Ω -20 -20 PO=75mW, RL=32Ω VRIPPLE=0.2VRMS -40 Input AC Ground Crosstalk (dB) -30 PSRR (dB) 1k Frequency (Hz) Output Power (W ) -40 -50 -60 -60 Left -> Right -80 -100 -70 Right -> Left -120 -80 -90 20 100 1k 10k -140 20k 20 100 1k Frequency (Hz) Frequency (Hz) Figure 21. PSRR vs. Frequency Figure 22. THD+N vs. Frequency Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 11 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics (Continued) 24 0 -20 VDD=5.0V BTL Mode 22 RL=8Ω, PO=1.0W 20 VDD=5.0V, BTL Mode 18 RL=8Ω, CIN=1.0µF Gain0, Gain1=H, L 16 -60 -80 Gain (dB) Crosstalk (dB) -40 Gain0, Gain1=H, H Right -> Left 14 12 Gain0, Gain1=L, H 10 -100 8 Gain0, Gain1=L, L -120 6 Left -> Right 4 -140 20 100 1k 10k 100 20 20k 1k Frequency (Hz) Figure 23. Crosstalk vs. Frequency 20k Figure 24. Gain vs. Frequency 10 6 VDD=5.0V, BTL Mode RL=10kΩ 4 Differential Input RL=8Ω, f=1kHz VDD=5.0V, SE Mode P=1.0W 1 THD+N (%) CIN=1.0µF, COUT=220µF 2 Gain (dB) 10k Frequency (Hz) RL=16Ω 0 RL=32Ω -2 0.1 -4 0.01 -6 20 100 1k 10k 20k Frequency (Hz) 0 1 2 3 4 5 Common Mode Input Voltage (V) Figure 26. THD+N vs. Common Mode Input Voltage Figure 25. Gain vs. Frequency Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 12 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Performance Characteristics (Continued) 10 VDD=5.0V, SE Mode R L=10k Ω , C OUT=220µF THD+N (%) C IN=1.0µF, f=1kHz 1 CH1 0.1 CH2 0.01 CH3 100m 1 3 Output Voltage (V) Figure 27. THD+N vs. Output Voltage Figure 28. Pop Noise at SE Mode (VDD=5V, SE Mode, RL=32Ω, Cb=1.0µF, CIN=0.47µF, COUT=220µF, CH1=VSHUTDOWN, CH2=VBYPASS, CH3=VOUT at RL) Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 13 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information It is recommended to connect HP_SENSE to the headphone jack switch pin illustrated in Figure 29. When headphone plug is not inserted, the voltage of HP_SENSE pin is determined by voltage divider formed by RL and R12. For given resistors' value in Figure 29, RL=1kΩ, R12=100kΩ (Assuming VDD=5.0V), DC voltage at HP_SENSE node is about 49.5mV. AC signal equals output amplitude of OUT+ through COUT, the maximum peak-peak voltage is no greater than VDD, so the positive maximum voltage of HP_SENSE node will be no greater than 2.5V+49.5mV=2.55V(DC voltage plus AC voltage), which is less than HP_SENSE input high level minimum value (4.0V). That means the chip works in BTL mode reliably and there is no risk of operation mode switch between SE and BTL. When headphone plug is inserted, as the RL is disconnected from R12, the voltage of HP_SENSE pin is pulled up by R12 to VDD sets the chip in SE mode. SE/BTL Mode, HP_SENSE Pin The AA4006 can operate under 2 types of output configuration, SE (Single-Ended) mode and BTL (Bridged Tied Load) mode, determined by HP_SENSE pin's logic level. (Here is the discussion about left channel only, it can equally apply to right channel.) When HP_SENSE pin is held low which sets the chip in BTL mode, both AMP1 and AMP2 are turned on. AMP2 has the same gain with AMP1 except 180 degree phase shift. Because the DC component (output bias voltage from AMP1 and AMP2, approx. 1/2 VDD) between OUT+ and OUT- is canceled, there is no necessity to use DC block capacitors for speaker load. In BTL mode, output voltage swing across load is about 2 times that in SE mode, so there is about 4 times output power compared to SE mode with same load and input. (See Figure 29) HP_SENSE pin can also be connected to MCU I/O port directly to switch the operation mode between SE and BTL. If applying high level to HP_SENSE pin which sets the chip in SE mode, AMP2 unit is turned off with high impedance. There is no current loop between OUT+ and OUT-, the speaker is naturally disabled without any hardware change. The output audio signal rides on bias voltage at OUT+ (output bias voltage from AMP1 and AMP2, approx. 1/2 VDD), so it has to use a capacitor COUT to block DC bias voltage and couple AC signal to headphone load. CIN 0.47µF 5 The AA4006 offers the capability to use 2 individual stereo inputs: headphone input and line input. For a single-ended input, the common input terminal pins (L_IN, R_IN) should be connected to ground through a MUX _ Left Line IN CIN 0.47µF Input MUX, Single-Ended Input and Differential Input 10 COUT 220µF + AMP1 Gain Control CIN 0.47µF 4 + 6 Left HP IN Left Out+ + _ Left IN RL 1kΩ Left Out- 9 HP/LINE 17 HP-SENSE 15 GAIN0 2 GAIN1 3 AMP2 R1 100kΩ R12 100kΩ SLEEVE HEADPHONE JACK VDD Figure 29. Input MUX and Output Configuration for Left Channel Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 14 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 AA4006 allows using input capacitors CIN to accommodate different DC level between input source(like Audio D-A converter) and bias voltage (about 1/2 VDD), especially in single-ended input mode which is popularly used in most applications. Input stage of AA4006 is illustrated as Figure 33, it is a full differential architecture, which consists of input resistor, RIN and feedback resistor, RFB. Application Information (Continued) capacitor, also the size of CLIN (CRIN) has to be the same as CLLIN (CRLIN), CLHPIN (CRHPIN). Line input and headphone input are selected by switching HP_LINE pin. When HP_LINE is pulled high, the headphone input (L_HP_IN, R_HP_IN) is selected. When HP_LINE is held low, the line input (L_LINE_IN, R_LINE_IN) is selected. If the input signals are differential, only one stereo signal is permitted because share common input terminal pin (L_IN, R_IN), both headphone input and line input can be formed into differential pair with common input terminal. (See Figure 31) In SE mode, pass-band gain is, GAIN SE = With differential input configuration, the input coupling capacitors of differential pair can be removed if DC bias voltage of input source is within input common- mode voltage range, refer to Figure 26. R FB ...................................................(1) R IN In BTL mode, pass-band gain is, GAIN BTL = 2 ∗ CIN, COUT, Cb and CS (Power Supply) Selection RFB ............................................(2) RIN Although there is no necessary to use input coupling capacitors in differential input if DC voltage of input is within common-mode input voltage range. The CLLIN 0.47µF 5 MUX _ Left Line IN CLHPIN 0.47µF 10 + Left IN CRLIN 0.47µF _ 23 _ CRHPIN 0.47µF 20 CRIN 0.47µF Left Out- 9 AMP2 Right Line IN Right HP IN 4 AMP1 Gain Control Left HP IN CLIN 0.47µF Left Out+ + 6 HP_LINE 17 HP_SENSE 15 GAIN0 2 GAIN1 3 Right Out- 16 Right Out+ 21 + AMP4 MUX Gain Control + 8 _ Right IN AMP3 Figure 30. Single-Ended Input Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 15 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) CLLIN 0.47µF MUX 5 _ Left Line INCLHPIN 0.47µF 6 CLIN 0.47µF Left Out+ 4 Left Out- 9 + AMP1 Gain Control 10 + Left Line IN+ _ AMP2 HP_LINE 17 HP_SENSE 15 GAIN0 CRLIN 0.47µF Right Line INCRHPIN 0.47µF 23 _ GAIN1 3 Right Out- 16 Right Out+ 21 + 20 AMP4 MUX CRIN 0.47µF 2 Gain Control + 8 _ AMP3 Right Line IN+ A) Using LINE_IN CLLIN 0.47µF 5 MUX _ CLHPIN 0.47µF 6 CLIN 0.47µF 10 + Left HP IN+ _ 23 CRIN 0.47µF Left Out- 9 VDD AMP2 _ CRHPIN 0.47µF 20 HP_LINE 17 HP_SENSE 15 GAIN0 2 GAIN1 3 Right Out- 16 Right Out+ 21 + AMP4 MUX Right HP IN- 4 AMP1 Gain Control Left HP IN- CRLIN 0.47µF Left Out+ + Gain Control + 8 _ Right HP IN+ AMP3 B) Using HP_IN Figure 31. Differential Input with Input Coupling Capacitors Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 16 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) MUX 5 _ Left Line INCLHPIN 0.47µF 6 4 Left Out- 9 AMP1 Gain Control 10 + Left Line IN+ _ 23 Right Line INCRHPIN 0.47µF Left Out+ + AMP2 _ HP_LINE 17 HP_SENSE 15 GAIN0 2 GAIN1 3 Right Out- 16 Right Out+ 21 + 20 AMP4 MUX Gain Control + 8 _ AMP3 Right Line IN+ A) Using LINE_IN CLLIN 0.47µF 5 MUX _ 10 + Left HP IN+ _ 23 Left Out- 9 VDD AMP2 _ HP_LINE 17 HP_SENSE 15 GAIN0 2 GAIN1 3 Right Out- 16 Right Out+ 21 + 20 AMP4 MUX Right HP IN- 4 AMP1 Gain Control Left HP IN- CRLIN 0.47µF Left Out+ + 6 Gain Control + 8 _ Right HP IN+ AMP3 B) Using HP_IN Figure 32. Differential Input without Input Coupling Capacitors Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 17 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) RFB The typical input resistance, feedback resistance of AA4006 at each gain setting are showed in the table below. GAI N0 0 GAI N1 0 HP_S ENSE 0 GAIN (dB) 6 RIN (Ω) RFB (Ω) 90 90 0 1 0 10 70 110 1 0 0 15.6 45 135 1 1 0 21.6 25 154 x x 1 4.1 70 110 CIN RIN + OUT - - + CIN - AMP1 RIN RFB VBIAS RFB RIN AMP2 + - RIN External Internal OUT + RFB A) AA4006 Input Configuration with Input Capacitor RFB + RFB - RIN + - OUT - CIN RIN - RIN CIN RIN AMP1 RFB VBIAS AMP1 RFB CIN RIN RFB AMP2 + VBIAS RIN - RFB CIN AMP2 + - - + + - OUT External OUT + RIN Internal OUT + RFB RIN External Internal B) Classic Input Configuration with Input Capacitor RFB Figure 33. Full Differential Input Stage of AA4006 Figure 34. Input Configuration with Input Capacitor, CIN Input capacitors CIN and input resistors RIN form a first order High Pass Filter, which determines the lower corner frequency according to the equation below. Input resistance varies with gain setting, also the absolute resistance of RIN may drift ± 20% due to fab process. To ensure the minimum cut-off frequency within the audible range, the input capacitor (CIN) has to be greater than 0.33µF. The low ESR ceramic capacitor of 0.47µF is recommended. See Figure 35 for frequency response using 0.47µF CIN. However, using bigger size of CIN will affect pop noise of AA4006. fCIL = 2 .................................................(3) 2πRIN * CIN If using an external resistor REXT in series with input capacitor CIN, the closed-loop gain and cut-off frequency can be calculated by equations below. It is a little different from the classic equation according to Figure 34. Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 18 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Similarly, for output stage in SE mode, output capacitor (COUT) and headphone load (RHP) also form a first order High Pass Filter, and its lower cut-off frequency is determined by equation 6. Application Information (Continued) 22 Gain=21.6dB 20 VDD=5.0V, BTL mode 18 CIN=0.47µF, RL=10kΩ Gain (dB) f COL = Gain=15.6dB 16 14 1 .............................................(6) 2πRHP * COUT 12 Gain=10dB 10 Gain=6dB 6 4 10 100 1k 10k 30k Frequency (Hz) Figure 35. Frequency Response Using 0.47mF Input Capacitor GAIN BTL = 2 ∗ f CIL = 220 Headphone Load (Ω) 16 Lower Cut-off Frequency (Hz) 45.2 220 32 22.6 330 16 30 330 32 15 COUT (µF) 8 The purpose of the bypass capacitor (Cb) is to filter noise, reduce total harmonic distortion plus noise, and improve power supply rejection ratio performance. Tantalum or ceramic capacitor of 1.0µF with low ESR is recommended, and it should be placed as close as possible to the chip in PCB layout. This capacitor affects the pop noise performance furthest by changing the ramp of charge and/or discharge. R FB ...........................(4) 2 ∗ REXT + RIN 2 ...............................(5) 2π (2 REXT + RIN )C IN The below table shows output noise in each gain under the condition of 1.0µF bypass capacitor. Unit: µVrms. RFB REXT REXT CIN CIN RIN + - OUT Filter: 22Hz ~ 22kHz - + - RIN AMP1 RFB SE mode VBIAS RIN RFB AMP2 + - RIN External Internal OUT + BTL mode RFB Figure 36. Using an External Resistor, REXT in Series with Input Capacitor, CIN Aug. 2008 Rev. 1. 3 COUT=220µF, RL=16Ω COUT=220µF, RL=32Ω Gain0, Gain1 = 0, 0 RL= Gain0, Gain1 = 0, 1 4Ω Gain0, Gain1 = 1, 0 Gain0, Gain1 = 1, 1 Gain0, Gain1 = 0, 0 RL= Gain0, Gain1 = 0, 1 8Ω Gain0, Gain1 = 1, 0 Gain0, Gain1 = 1, 1 22 23 18.5 23 32 46.5 19 24 33.5 52 AWeight ed Filter 16 17 13.5 17 24.5 37 14 18 25.5 39 BCD Semiconductor Manufacturing Limited 19 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 components (including Cb, CIN, COUT and headphone load) will affect pop noise performance. The recommended components are, Cb=1.0µF, CIN=0.47µF, COUT=220µF, 32Ω for headphone load. Under given conditions, the maximum peak-peak voltage of pop noise is less than 15mV(See Figure 28). If using 16Ω headphone, the voltage of pop noise will decrease accordingly. Application Information (Continued) For AA4006 power supply, it is better to use an individual power source generated from voltage regulator split from video, digital circuit units in system. For power supply bypass capacitor (CS), it is recommended to use one low ESR electrolytic or tantalum capacitor from 4.7µF to 10µF in parallel with 0.1µF ceramic capacitor which is located close to the chip. Beep Input AA4006 has a shutdown feature to reduce power consumption during non-use operation. If apply low level to shutdown pin, output amplifiers, bias circuit will be turned off, the current drawn from VDD is about 100µA. However, the Beep Detect circuitry is always ready to give alert on speaker load once apply any valid signal into BEEP_IN pin. The SHUTDOWN pin should be pulled high during normal operation, and it should never be left floating to prevent the unpredictable status of the chip. Beep input feature is used in computer system for alerting. A beep signal can be sent directly from a computer. If peak-peak voltage of beep signal applied to BEEP_IN pin (pin14) exceeds a certain voltage (typical 1/2 VDD), the feature will be activated automatically, then AA4006 will be forced in BTL mode with the fixed gain of 0.3V/V, both LINE_IN and HP_IN are deselected, the logic level of HP_SENSE, HP_LINE, GAIN0, GAIN1 and SHUTDOWN is ignored. Once beep signal is removed from the chip, the AA4006 will return to the previous operation mode, gain settings. However, the music signal will be output instantly once the SHUTDOWN pin is applied to logic level from low to high. When the SHUTDOWN pin changes from high to low, output will be present until bias voltage drops to approx 0.1V. See Figure 37 for time relationship between shutdown, bias voltage and output. The preferred beep signal is a square wave or pulse train, the preferred input is DC-coupled. If using ACcoupled, assuming beep input capacitor is 0.47µF, the input voltage is 3.3 Vp-p square wave, the beep signal should have a minimum of 10 cycles. Shutdown Power Dissipation, Efficiency and Thermal Design Consideration Optimizing Click/Pop Noise For Class AB amplifiers, equation 7 is the basic equation of efficiency worked in BTL mode, The AA4006 includes optimized circuits to suppress Click/Pop noise during power up/power down transition. η= In BTL mode, AA4006 can reduce most common mode signal also including Click/Pop noise due to symmetrical output. πVp 4VDD .............................................................(7) Here VP is output peak voltage across the load. In SE mode, optimized ramp for rise/fall edge of bias can significantly reduce Click/Pop noise generated by output capacitor (COUT) charge and/or discharge. Smoothing rise/fall edge of DC bias voltage is a quite important method. Another way is to prolong charge/ discharge time which can shape power spectrum of output, and this makes some frequencies outside of the human audible range (20Hz to 20 kHz). So external Thermal dissipation becomes major concern when delivering more power into speaker especially in BTL mode. The maximum allowed power dissipation can be calculated by equation below which is determined by thermal resistance of AA4006 package. Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 20 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) PDMAX = Here PDBTLMAX = TJMAX − TA ..............................................(8) θ 4V DD2 + V DD * I DD π 2 RL 4 * 52 + 5.0 * 0.0065 π 2 *4 = 2.56W = JA TJMAX is maximum operating junction o temperature of 150 C, TA is ambient temperature, θ JA is thermal resistance from junction to ambient. For TSSOP-24(EDP) package, it is 65oC/W given in datasheet. That is to say, to make sure AA4006 can output power into stereo 4Ω speakers continuously, the maximum ambient temperature should be no more than, TA = TJMAX − θ JA * PDT Assuming TA is 25oC, the maximum allowed power dissipation is about 1.92W according to equation 8. = 150 − 65 * 2.56 = 16.4°C There is another equation about power dissipation which is determined by power supply voltage and load resistance under a certain application. The maximum power dissipation is achieved only when output power per-channel equals 2*VDD2/ π *RSP. If actual output power is not this data, power dissipation will be less than 2.56W. ⎛ 2V *V V2 ⎞ PDBTL = 2 * ⎜⎜ P DD − P ⎟⎟ + VDD * I DD .......(9) 2 RL ⎠ ⎝ πRL When junction temperature exceeds about 165oC, OTSD feature will be enabled, that turns off output amplifiers to prevent damaging the chip. Once junction temperature drops lower than 130oC, the chip will work again automatically. The above equation expresses total power dissipation, dominated by dual channels, quiescent current. It is a quadratic equation with the negative coefficient of output voltage variation (VP), there is always a maximum showed as below. 4V DD 2 PDBTLMAX = π R 2 There is an exposed thermal pad on the bottom of the chip to provide the direct thermal path from die to heat sink. It is recommended to use copper on the surface of Printed Circuit Board (PCB) as heat sink. To dig some matrix regular holes under chip, remove mask of this area copper, and make sure to keep them contact well when soldering on PCB are also recommended.(See Figure 38) + V DD * I DD .............................(10) L If power dissipation calculated by application is larger than the package permitted , it is necessary to use larger copper plane under the chip, or assemble an additional heat sink, or use forced-air cooling to keep ambient temperature around the chip low, or increase load resistance, or decrease power supply voltage. Recommended PCB Layout Using wide traces for power supply, BTL outputs to reduce power losses caused by parasitic resistance is recommended. It is also recommended to place bypass capacitor, and power supply decouple capacitor as close as possible to the chip. For example, assuming VDD=5.0V, speaker load RSP=4.0Ω, stereo in BTL mode, the maximum power dissipation, includes 2 channels, plus quiescent power dissipation, dominated by quiescent current. Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 21 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) Figure 37. Time Chart for VSHUTDOWN, VBIAS and VOUT Figure 38. Recommended PCB Layout for Heat Sink Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 22 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) Figure 39. Top Route and Copper Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 23 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Application Information (Continued) Figure 40. Bottom Route and Copper Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 24 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Typical Application VDD 0.1µF CS 10µF + 7,18,19 CIN 0.47µF Left Line IN CIN 0.47µF MUX 5 _ 6 + Left HP IN 4 COUT 220µF + RL 1kΩ AMP1 Gain Control CIN 0.47µF Left Out+ + 10 Left Out- 9 _ Left IN AMP2 CIN 0.47µF Right Line IN CIN 0.47µF MUX 23 _ 20 + Right HP IN Cbp 0.47µF AMP4 BYPASS 22 SHUTDOWN 14 BEEP IN SLEEVE RL 1.0kΩ Right Out- 16 HP/LINE 17 HP-SENSE 15 _ 11 COUT 220µF + HEADPHONE JACK + 8 Right IN Cb 1µF 21 AMP3 Gain Control CIN 0.47µF Right Out+ R1 100kΩ R12 100kΩ VDD VREF PC BEEP 1,12,13,24 GAIN0 2 GAIN1 3 U1: AA4006 Figure 41. Typical Application of AA4006 Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 25 Data Sheet 2.7W Stereo Audio Power Amplifier with 4 Selectable Gain Setups and Input MUX AA4006 Mechanical Dimensions TSSOP-24(EDP) 0.650(0.026) 0.190(0.007) 0.300(0.012) 13 4.300(0.169) 4.500(0.177) 1.500(0.059)MIN 6.200(0.244) 6.600(0.259) 24 Unit: mm(inch) 1 2.700(0.106)MIN 12 GAGE PLANE 0.250(0.010) 0° 8° 0.500(0.020) 0.700(0.028) SEATING PLANE 1.000(0.039) 1.200(0.047)MAX 0.000(0.000) 0.150(0.005) Aug. 2008 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 26 BCD Semiconductor Manufacturing Limited http://www.bcdsemi.com IMPORTANT NOTICE BCD Semiconductor Manufacturing Limited reserves the right to make changes without further notice to any products or specifications herein. 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