TECHNICAL DATA AUTOMOTIVE DIGITAL CLOCK IC IN7100 DESCRIPTION IN7100 is a automotive digital clock, CMOS LSI. It drives fluorescent indicator panel directly. It can be driven by a 4.194304 MHz crystal oscillator or an external clock signal (1024 Hz). It has 4-ways display brightness control function and its display format is 12 hours. DIP-40 FEATURES 40 1 4.194304 MHz crystal oscillator 4-ways display brightness control ( Segment signal duty: 1, 1/4, 1/8, 1/16 ) Hours and Minutes Setting 30 seconds auto correction 1024 Hz external clock drive 1024 Hz SIGNAL output Segment Output: P-channel open drain 40 DIP package MS-011AC ABSOLUTE MAXIMUM RATINGS (Ta = 25 C) Parameter Power Supply Voltage Symbol Specification Unit VDD - VSS 0.5 ~ + 8.0 V VIN VSS 0.3 ~ VDD + 0.3 V VOUT VDD 30 ~ VDD + 0.3 V Ta 40 ~ + 85 C TSTG 55 ~ + 125 C Input Voltage Output Voltage Operating Temperature Storage Temperature * Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DC CHARACTERISTICS (Ta=25C, RH70%, CD=CG=15pF, Xtal=4.194304MHz) Characteristic Power Supply Voltage Power Supply Current Leakage Current (1) High Level Output Current (2) High Level Output Current (3) Low Level Output Current (4) High Level Input Current (5) High Level Input Current External Clock Duty OSC. Feedback Resistance Symbol VDD-VSS IDD IOFF IOH1 IOH2 IOL IIH1 IIH2 CLD RF Test Conditions No output loads, VDD=6V VDD-VSS =5.0V VDD-VSS=3.0V, VDD-VOUT=0.5V VDD-VSS=3.0V, VDD-VOUT=0.5V VDD-VSS=3.0V, VOUT –VSS=0.5V VIN=VDD=6V VIN=VDD=6V VDD=6V Min Typ Max Unit 3.0 — — 0.3 300 500 500 — — 40 — — — 15 120 50 3 7.0 0.5 5.0 1500 1800 — 30 600 60 V mA A A A A A A % M January, 2011, Rev. 03 IN7100 (VDD-VSS=3.0~7.0V, Ta = 40 ~ +85C, RH70%, CD=CG=15pF, Xtal=4.194304MHz) Characteristic Power Supply Current (1) High Level Output Current (2) High Level Output Current (1) (2) (3) (4) (5) Symbol Test Conditions Min Typ Max Unit IDD IOH1 IOH2 No output loads VDD-VSS=3.0V, VDD-VOUT=0.5V VDD-VSS=3.0V, VDD-VOUT=0.5V — 250 400 — — — 0.5 — — mA A A for segment other than bc4, ad2, 1Hz for segment bc4, ad2, 1Hz and CLOUT for CLOUT for DS1, DS2, RES, HS, MS and BLK for T1, T2, T3 and AC PIN CONFIGURATION BLK 40 1 DS1 DS2 bc4 VDD T3 T2 f3 g3 e3 d3 a3 b3 c3 g2 e2 c2 g1 e1 1HZ f2 ad2 b2 f1 IN7100 a1 b1 T1 d1 c1 MS HS RES CLK CLOUT AC VSS 20 21 OI OO 40-DIP MS-011AC January, 2011, Rev. 03 IN7100 Block Diagram January, 2011, Rev. 03 IN7100 Block Diagram (for die) January, 2011, Rev. 03 IN7100 APPLICATION CIRCUITs Typical Application D4 IN4007 B R1 100 + C3 33uF ZD1 IN4737A Cx (1 pF) C4 10nF R8 24 0.5W C2 13 pF + VDD OI AC MS GRID I + N 7 1 0 0 RES D2 1N4007 R2 1k SEGMENT S R7 33k BLK A R6 24 0.5W OO HS R9 56 2W EC1 0.22 uF ~1.0 uF 4.194303 MHz 11V ZD2 1N4732A C5 10uF C1 15 pF FIP + FILAMENT DS2 C7 33uF + T D1 1N4007 D3 1N4007 R10 18k DS1 T3 1024 Hz) CLOUT T2 T1 CLK VSS 4.3~4.9V E ZD3 1N4732A or 1N4731A January, 2011, Rev. 03 IN7100 “Keeping Time” Application BAT1 BAT1 C1 C2 BAT1 C3 R3-2 XT BAT1 Osc IN BAT1 C7 EC10 R5 C4 EC1 ILL(+) ZD1 40 VDD D2 R4 19 2 21 22 D5 15 GRD R3-1 OSC OUT C6 D1 4 3 GRD BAT1 D1 B+ c4/b4 AC D3 ACC 20 C8 26 38 ZD3 C11 IGN 39 17 3 2 R1 T2 T3 CLIN DS1 DS1 BLK R7 VFD SW1 R8-2 PAB(-) 1 T1 23 C9 SET 37 D4 ZD2 SW2 R8-1 SW3 30 D23 24 f3 HOU F- GND F+ R8 VSS 25 MIN FIP 1 16 IN7100 Part List S/No IC1 VFD XT C1 C2 C3 EC1 EC10 C4 C11 C6~9 R1 R2 PART IN7100 SVC-01MS01 4194304hz 10pF 15pF 1~12pF ADJ 470uF, 25V 22uF, 10V 104 104 104 68k,1/4w - Q’NTY 1 1 1 1 1 1 1 1 1 1 4 1 - Q’NTY S/No PART R3-1~2 R4 R5 R6 R7 R8-1~2 ZD1 ZD2 ZD3 SW1~3 D1~4 D5 CON1 560, 1/4W 100k, 1/8W 560k, 1/8W 130, 2W 130, 2W 56, 1/4W 1N4735A 1N4732A 1N4729A Switch(THH-10910) 1N4007 1N4148 Connector(5566-05A) 2 1 1 1 1 2 1 1 1 3 4 1 1 January, 2011, Rev. 03 IN7100 PIN DESCRIPTION PIN # NAME Н I/O DESCRIPTION 1 BLK I BLANCKING INPUT; When this pin is low state, FIP is off and the operation of HS, MS, RES, switch is blocking, or vice versa 2 DS1 I 3 DS2 I 4 bc4 O SEGMENT OUTPUT 5 g3 O SEGMENT OUTPUT 6 e3 O SEGMENT OUTPUT 7 d3 O SEGMENT OUTPUT 8 c3 O SEGMENT OUTPUT 9 g2 O SEGMENT OUTPUT 10 e2 O SEGMENT OUTPUT 11 c2 O SEGMENT OUTPUT 12 g1 O SEGMENT OUTPUT 13 e1 O SEGMENT OUTPUT 14 d1 O SEGMENT OUTPUT 15 c1 O SEGMENT OUTPUT 16 -- -- NO CONNECTION DIMMER INPUT1, DIMMER INPUT2; This PIN control the brightness of FIP. Duty of segment output is determined depend on the level of DS1, DS2 | DS1 | VDD | VSS | VDD | VSS | | DS2 | VDD | VDD | VSS | VSS | | DUTY | 1/16 | 1/8 | 1/4 | 1 | 17 CLK I EXTERNAL CLOCK INPUT; External clock of 1024 Hz frequency can drive the IC operation 18 CLOUT O CLOCK OUTPUT; Clock of 1024 Hz frequency is generated when using 4.194304 MHz crystal 19 AC I CLEAR INPUT (power on reset input pin) 20 VSS I GROUND 21 OO O OSCILLATOR OUTPUT (4.194304 MHz crystal output) 22 OI I OSCILLATOR INPUT (4.194304 MHz crystal input) 23 RES I RES INPUT (30 minutes auto correction Input) 24 HS I HOUR ADJUST INPUT 25 MS I MINUTE ADJUST INPUT 26 T1 I TEST PIN1 27 b1 O SEGMENT OUTPUT 28 a1 O SEGMENT OUTPUT 29 f1 O SEGMENT OUTPUT 30 b2 O SEGMENT OUTPUT 31 ad2 O SEGMENT OUTPUT 32 f2 O SEGMENT OUTPUT 33 1HZ O SEGMENT OUTPUT (colon) 34 -- -- NO CONNECTION 35 b3 O SEGMENT OUTPUT 36 a3 O SEGMENT OUTPUT 37 f3 O SEGMENT OUTPUT 38 T2 I TEST PIN2 39 T3 I TEST PIN3 40 VDD I POWER SUPPLY INTERNAL STATE pull down: BLK, DS1, DS2, AC, RES, HS, MS, TE1, TE2, TE3 P-ch OPEN DRAIN: bc4, g3, e3, d3, c3, g2, e2, c2, g1, e1, d1, c1, b1, a1, f1, b2, ad2, f2, 1Hz, b3, a3, f3 January, 2011, Rev. 03 IN7100 40-Pin Plastic Dual-in-Line A Aı A2 B B2 C D E E1 e e2 L α Dimension, mm max min min max min max min max min max min max min max min max nom nom min max min max 6.35 0.38 3.18 4.95 0.36 0.56 0.77 1.78 0.20 0.38 50.30 53.20 15.24 15.87 12.32 14.73 2.54 15.24 2.92 5.08 0º 10º January, 2011, Rev. 03