Application Note Crystal Clear and Visibly Superior LCD Modules Interfacing a Hantronix 128x64 Graphic Module to an 8-bit Microcontroller Introduction: Due to its thin profile, light weight, low power consumption and easy handling, liquid crystal graphic display modules are used in a wide variety of applications. This note details a simple interface technique between a Hantronix HDM64GS12 and a micro-controller. The HDM64GS12 has a built-in Hitachi HD61202, or Samsung KS107, controller which performs all of the refreshing and data storage tasks of the LCD display. This note applies to any display using these controllers. The driving micro-controller is the popular 87C751. The display is split logically in half. It contains two controllers with controller #1 (Chip select 1) controlling the left half of the display and controller #2 (Chip select 2) controlling the right half. Each controller must be addressed independently. The page addresses, 0-7, specify one of the 8 horizontal pages which are 8 bits (1 byte) high. A drawing of the display and how it is mapped to the refresh memory is shown below. Controller #2 CS1=0, CS2=1 Controller #1 CS1=1, CS2=0 D0 D1 PAGE 0 64 bytes (columns) x 8 bits PAGE 0 PAGE 1 PAGE 1 PAGE 2 PAGE 2 PAGE 3 PAGE 3 PAGE 4 PAGE 4 PAGE 5 PAGE 5 PAGE 6 PAGE 6 PAGE 7 PAGE 7 D2 D3 D4 D5 D6 D7 64 bits 6 4 b I t s 64 bits The schematic on page two is a simple circuit to illustrate one possible interface scheme. This is the circuit that the code example will work with directly. Page 1 Application Note Crystal Clear and Visibly Superior LCD Modules Schematic Diagram: 87C751 33pF 16.00mHz X1 HDM64GS12 P1.0 D0 P1.1 D1 P1.2 D2 P1.3 D3 P1.4 D4 P1.5 D5 P1.6 D6 P1.7 D7 VDD X2 33pF 1N4148 + VL 20K 1uF RST 10k VSS P3.0 E P3.1 D/I P3.2 CS1 P3.3 CS2 The following software is in 8051 assembly language and will run as-is on the hardware shown above. The busy status flag is not tested in this software. It is usually not necessary to do so when the display module is connected to the processor via I/O lines. When the module is connected to the processor’s data bus and mapped into it’s memory area the status should be tested to guarantee reliable service. Displayed Pattern: Page 2 Application Note Crystal Clear and Visibly Superior LCD Modules Software Flowchart: MAIN PROGRAM LOOP SENDS COMMANDS TO THE DISPLAY SENDS DATA BYTES TO THE DISPLAY START: COMMAND: BYTE: INITIALIZE BOTH 61202 CONTROLLERS C/D SET LOW C/D SET HIGH GET BYTE FROM TABLE MOVE DATA TO BOTH CONTROLLERS SENDS A BYTE TO THE DISPLAY END BYTE? END RETURN NO WRITE: LEFT HALF? YES CALL WRITE NO CS1=0 CS2=1 INC. TABLE POINTER YES CS1=1 CS2=0 DATA TO P1 Initialization Bytes: 0c0h Specifies the RAM line to be displayed at the top of the screen. Here it is line 0. E HIGH 040h This is the column address. It specifies one of 64 possible columns. Here it is 0. E LOW CS1=0 CS2=0 0b8h This is the page address. It specifies one of 8 possible pages. Here it is 0. 03fh Display on/off. 03fh turns it on and a 03eh turns it off. RETURN Page 3 Application Note Crystal Clear and Visibly Superior LCD Modules Software Source Code: $MOD751 ; ; ; ; ; ************************************************** * * * HD61202 Application Note V1.0 * * * ************************************************** ; ; ; ; The processor clock speed is 16MHz. Cycle time is .750mS. HD61202 demo software to display the Hantronix logo on a 128 x 64 LCD. org ljmp 00h start org 100h ; ************************************************* ; SUBROUTINES ; COMMAND sends the byte pointed to by ; the DPTR to the graphics module ; as a series of commands. Command: clr Command2: clr movc cjne Ret Command1: mov lcall inc sjmp ; Initialize the 64gs12 p3.1 ;set command a a,@a+dptr ;get byte a,#099h,command1 ;done? r1,a write dptr command2 ;send it Start: mov mov mov lcall mov mov lcall p3,#00 r0,#00h dptr,#msgi1 command r0,#01h dptr,#msgi1 command ;set 64gs12 left ;initialization bytes ; BYTE sends the byte pointed to by ; the DPTR to the graphics module ; as a series of data bytes. ;set 64gs12 right ;initialization bytes Byte: setb sjmp ; Display pattern p3.1 command2 ;set data ; WRITE sends the byte in R1 to the ; display. mov mov r4,#0b8h r5,#08h; ;page command ;page count mov mov lcall clr inc mov mov lcall djnz mov mov r0,#00h dptr,#msg1l byte p3.1 r4 a,r4 r1,a write r5,loop1 r4,#0b8h r5,#8h ;set 64gs12 left mov mov lcall clr inc mov mov lcall djnz sjmp r0,#01h dptr,#msg1r byte p3.1 r4 a,r4 r1,a write r5,loop2 $ Write: Loop1: mov jnz setb a,r0 write1 p3.2 ;CS the display ;right half ;left half mov setb Nop clr clr clr Ret p1,r1 p3.0 ;get data ;strobe it p3.0 p3.2 p3.3 ;de-select module setb sjmp p3.3 write2 Write2: ;set command ;bump page add ;repeat 8 times ;page add. Command ;page count Write1: Loop2: ;set 64gs12 right ;set command ;bump page add ;repeat 8 times ;end Page 4 Application Note Crystal Clear and Visibly Superior LCD Modules ;************************************************ ; TABLES AND DATA ; Initialization bytes Msgi1: db 0c0h,40h,0b8h,3fh,99h ; "Hantronix", left half Msg1l: db db db db db db db db db db db 0,0feh,10h,10h,10h,0feh,0 0fch,12h,12h,12h,0fch,0 0feh,08h,10h,20h,0feh,0 02h,02h,0feh,02h,02h,0 0feh,12h,32h,52h,8ch,0 7ch,82h,82h,82h,7ch,0 0feh,08h,10h,20h,0feh,0 0,0,82h,0feh,82h,0 0,0c6h,28h,10h,28h,0c6h,0 0,38h,7ch,0f8h,7ch,38h,0 0,99h ;H ;A ;N ;T ;R ;O ;N ;I ;X ;heart ; "Hantronix", right half (reverse video) Msg1r: db db db db db db db db db db db 0ffh,0c7h,83h,07h,83h,0c7h,0ffh 0ffh,39h,0d7h,0efh,0d7h,39h,0ffh 0ffh,0ffh,7dh,01h,7dh,0ffh 01h,0dfh,0efh,0f7h,01h,0ffh 83h,7dh,7dh,7dh,83h,0ffh 073h,0adh,0cdh,0edh,01h,0ffh 0fdh,0fdh,01h,0fdh,0fdh,0ffh 01h,0dfh,0efh,0f7h,01h,0ffh 03h,0edh,0edh,0edh,03h,0ffh 0ffh,01h,0efh,0efh,0efh,01h,0ffh 0ffh,99h ;heart ;X ;I ;N ;O ;R ;T ;N ;A ;H end Page 5