RDD106 - LSI csi

LSI/CSI
UL
®
RDD106
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747
(631) 271-0400 FAX (631) 271-0405
A3800
July 2005
SELECTABLE 6 DECADE CMOS DIVIDER
•
•
PIN ASSIGNMENT - TOP VIEW
1
DIVIDER
SELECT-2
2
V SS (-V)
3
RESET
4
The Output Division is selected according to the
following truth table:
DIVIDER SELECT INPUTS:
SELECT 2
SELECT 1
*1
F
*0
F
0
0
0
1
1
0
1
1
*Note: Not valid below 4.5V
OUTPUT
DIVISION
1,000,000
100,000
10,000
1,000
100
10
The information included herein is believed to be
accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.
RDD106-072605-1
RDD 106
DIVIDER
SELECT-1
8
V DD (+V)
7
OUTPUT
6
CLOCK OUTPUT
5
CLOCK INPUT
FIGURE 1
MAXIMUM RATINGS:
PARAMETER
DESCRIPTION OF OPERATION:
The RDD106 is a CMOS six decade divider circuit
that advances on each negative transition of the
input clock pulse. When the reset input is high the
circuit is cleared to zero. The clock input is applied
to a single stage inverting amplifier network whose
output is brought out so that an external crystal
network can be used to form an oscillator circuit.
If the clock output is not used, the amplifier acts
as an input buffer. Two select inputs are provided
which enables the circuit to divide by
101, 102, 103, 104, 105 or 106.
LSI
•
•
•
•
•
•
•
•
•
FEATURES:
Selectable Divide by 101, 102, 103, 104, 105 or 106
Clock Input Shaping Network Accepts
Fast or Slow Edge Inputs
Active Oscillator Network for External Crystal
Square Wave Output
Output TTL Compatible at +4.5V Operation
High Noise Immunity
Reset
All Inputs Protected
+3V to +15V Operation (VDD - VSS)
Low Power Dissipation
RDD106 (DIP); RDD106-S (SOIC)
- See Figure 1 -
SYMBOL
VALUE
UNIT
Storage Temperature
TSTG
-65 to +150
Operating Temperature
TA
-40 to +85
DC Supply Voltage
(VDD - VSS)
+18
Voltage at any input
VIN
VSS - 0.3 to VDD + 0.3
°C
°C
V
V
DC ELECTRICAL CHARACTERISTICS:
(All voltages referenced to VSS )
Quiescent Current
(Pin 1 = VDD)
VDD
4.5V
10V
Quiescent Current
(Pin 1 = F)
Quiescent Current
(Pin 1 = VSS)
Output Voltage, Low Level
-40°C +25°C
2.0
1.5
3.0
2.5
+85°C
1.0
2.0
UNIT
uA Max
uA Max
4.5V
10V
4.5V
10V
4.5V
10V
High Level 4.5V
10V
Pin1 Sink / Source Current 4.5V
(Pin 1 = VSS / VDD)
10V
Input Noise Immunity
4.5V
(Low and High)
10V
4.5
25
11
50
0.01
0.01
4.49
9.99
8
46
1.3
3.0
3.0
18
8.0
39
0.01
0.01
4.49
9.99
6
36
1.3
3.0
2.5
15
6.0
30
0.05
0.05
4.45
9.95
5
29
1.3
3.0
uA Max
uA Max
uA Max
uA Max
V Min
V Min
V Max
V Max
uA Max
uA Max
V Min
V Min
Output Drive Current:
N-Channel Sink Current
(VOUT = VSS + 0.4V)
4.5V
10V
2.5
7.0
2.0
5.5
1.5
4.0
mA Min
mA Min
P-Channel Source Current 4.5V
(VOUT = VDD - 1V)
10V
3.0
7.7
2.5
6.0
1.8
4.5
mA Min
mA Min
Input Capacitance (any input)
-
5.0
-
pF Max
DYNAMIC ELECTRICAL CHARACTERISTICS:
PIN 5
(CL = 50 pF, TA = 25°C)
VDD
3.0V
4.5V
10V
15V
MIN
0
0
0
0
MAX
5
10
20
30
UNIT
MHz
MHz
MHz
MHz
Clock Output Propagation Delay,
CL = 15pF
4.5V
10V
-
30
15
ns
ns
Output Rise & Fall Times
4.5V
10V
-
40
20
ns
ns
Propagation Delay to Output
(per decade)
4.5V
10V
-
160
75
ns
ns
Reset Pulse Width
4.5V
10V
160
75
-
ns
ns
Reset Removal Time
4.5V
10V
-
160
75
ns
ns
Reset Propagation Delay
to Output
4.5V
10V
-
200
100
ns
ns
Select Input Setup Time
4.5V
10V
-
100
50
ns
ns
Clock Input Frequency
10pF
10M
PIN 6
10pF
FIGURE 2.
TYPICAL OSCILLATOR CIRCUIT - 10MHz TO 30MHz
PIN 5
22pF
10M
22K
40pF
PIN 6
FIGURE 3.
TYPICAL OSCILLATOR CIRCUIT WITH TRIM - 2 MHz AND BELOW
PIN 5
10M
Freq
5MHz
10MHz
20MHz
30MHz
Dynamic VDD Current
22pF
3.0V
4.5V
10V
15V
-
0.3
1.0
6.5
17
mA
mA
mA
mA
40pF
22pF
PIN 6
FIGURE 4.
TYPICAL OSCILLATOR CIRCUIT WITH TRIM - 2MHz TO 10MHz
V DD
FIGURE 5. TYPICAL INPUT
If input signals are less than VSS or greater than
VDD, a series input resistor, R1, should be used to
limit the maximum input current to 2 milliamperes.
R1
CLOCK
INPUT
SIGNAL
5
V SS
V SS
5
CLOCK IN
+V
8
V DD
-V
3
V SS
FIGURE 6.
OSCILLATOR
EXTERNAL
COMPONENTS
RDD 106 BLOCK DIAGRAM
CLOCK
GENERATOR
R
÷ 10
÷ 10
÷ 10
÷ 10
÷ 10
÷ 10
6
CLOCK OUT
RESET
4
DIVIDER SELECT-1
1
DIVIDER SELECT-2
2
RDD106-071905-2
V DD
DECODER
1 OUT OF 6 SELECTOR
BUFFER
7 OUTPUT