LSI/CSI UL ® LS7290 LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405 A3800 STEPPER MOTOR CONTROLLER August 2005 - ADVANCE INFORMATION FEATURES: DESCRIPTION: The LS7290 contains a mode controlled look-up table for generating the motor duty cycle drive sequences. There are four outputs which are used to drive two H-Bridges for the two motor windings (Refer to Table 1). The LS7290 can step a motor in full steps, half steps or in 1/4, 1/8, 1/16 or 1/32 microsteps. The LS7290 uses 32 microstepping phase controls for each motor step in half step or in 1/4, 1/8, 1/16 or 1/32 microsteps. The LS7290 uses stepping as shown in Table 2 for full step control. A table pointer is used which is incremented or decremented by a value determined by the operating mode and the direction control. The 10-bit PWM control and the refresh rate are set using an internal oscillator controlled by a crystal or by use of an external input clock. Typical refresh rate is equal to 20kHz. The LS7290 also contains two comparators for disabling drive to each motor coil if an overcurrent condition exists. This is sensed using a fractional-Ohm resistor in each of the two motor coil drive circuits. INPUT/OUTPUT DESCRIPTION RESET INPUT Active low. Resets the PWM table pointer. Upon power-up, a POR circuit also resets the PWM table pointer. ENABLE INPUT Active low. When high (inactive), brings PHA, PHB, PHC, PHD, INH1 and INH2 outputs low. STEP INPUT Active low. A low-going pulse on this input causes the motor to advance one step. DIRECTION INPUT A low input causes the motor to move in a clockwise direction. A high input causes the motor to move in a counter clockwise direction. 7290-080405-1 MODE0 1 24 VDD MODE 1 2 23 INH1 MODE2 3 22 INH2 RESET 4 21 PHA STEP 5 20 PHB DIRECTION 6 19 PHC ENABLE 7 18 PHD LS7290 Full, 1/2, 1/4, 1/8, 1/16, 1/32, step mode selected with 3 mode inputs Direction control Reset input Step control input Enable input PWM chopper circuit for current control 10 bit PWM resolution Two overcurrent sensor comparators with external reference input Step control frequency and duty cycle controlled by an external frequency source or by an internal crystal controlled oscillator (typically 20MHz) • All inputs and outputs TTL/CMOS compatible (TTL for 5V operation) • 3.0V - 5.5V Operation (VDD - VSS). • LS7290 (DIP), LS7290-S (SOIC), LS7290-TS (TSSOP) - See Figure 1 LSI • • • • • • • • • PIN ASSIGNMENT TOP VIEW NC 8 17 NC CLOCK/SELECT 9 16 SENSE1 CLOCK/CRYSTAL 10 15 SENSE2 CRYSTAL 11 14 NC VSS 12 13 VREF FIGURE 1 MODE 0 - 2 INPUT Defines the stepping modes as follows: 000 full step mode 001 1/2 step mode 010 1/4 step mode 011 1/8 step mode 100 1/16 step mode 101 1/32 step mode SENSE1 / SENSE2 INPUTS The voltage on these comparator inputs are compared to an external reference to sense if an overcurrent condition exists. If a peak current causes the voltage across the external sense resistor to exceed the reference voltage, a latch is set and the drivers associated with the corresponding comparator are cut off. The next clock pulse samples the overcurrent condition and, if it no longer exists, resets the latch. Otherwise the latch remains set until the following clock pulse. VREF INPUT External voltage reference for overcurrent comparators. CLOCK SELECT INPUT Selects between an external input clock and a crystal oscillator. . CRYSTAL OSCILLATOR INPUTS When the internal oscillator is selected for use with an external crystal, a 20MHz crystal is connected between these 2 pins. When an external clock input is chosen, the clock is applied to the clock crystal input. INH1 / INH2 OUTPUT These outputs are used to provide PWM control to each of the two H-Bridge drivers. PHA / PHB / PHC / PHD OUTPUT The state of these phase outputs are determined by the lookup table and are used to control either the left or right half of each of the H-Bridge drivers. A low on a phase output enables the bottom driver while a high on the output enables the top driver. ENABLE MODE0 MODE1 MODE SELECT MODE2 RESET STEP LOOK-UP TABLE DIRECTION INH1 OUTPUT CONTROL LOGIC INH2 PHA PHB PHC CLOCK/CRYSTAL CRYSTAL PHD OSCILLATOR CLOCK/SELECT + - + - SENSE1 SENSE2 VREF FIGURE 2. LS7290 BLOCK DIAGRAM 7290-080405-2 ELECTRICAL SPECIFICATIONS (-25°C < TA < +85°C) PARAMETER Supply Voltage Supply Current SYMBOL VDD IDD MIN 3.0 TYP - MAX 5.5 2.0 UNIT V mA Enable Setup Time (before step pulse) ESU 1.0 Direction Setup Time DSU Step Pulse Width CONDITIONS Outputs floating, Inputs high - - µs - 1.0 - - µs - SPW 500 - - ns - Interstep Pulse Delay ISD 2 - - µs - Reset Pulse Width Reset to Step Pulse Delay Hi-Level Input Voltage Low-Level Input Voltage R RS ViH VIL 1 1 2 - - 0.8 µs µs V V VDD = 5 ± 0.25V VDD = 5 ± 0.25V Hi-Level Input Current Low-Level Input Current IH IL - - 40 -1.6 µA mA VIH = 2.4V, VDD = 5.5V VIL = 0.4V, VDD = 5.5V Output Sink Current Io Io -10 -5 - - mA mA Vo = 0.4V, VDD = 5V Vo = 0.4V, VDD = 3.3V Output Source Current Io Io 5 2.5 - - mA mA Vo = 4.0V, VDD = 5V Vo = 2.5V, VDD = 3.3V Comparator Offset Voltage Input Reference Voltage VOS VREF VREF 0.5 0.5 5 - 15 3.0 1.5 mV V V VREF = 1V VDD = 5V VDD = 3.3V 5V VM M0 MCU M1 2 M2 3 RESET 4 STEP 5 DIR ENABLE 23 22 6 7 LS7290 4 9 24 1 IN H1 IN H2 6 2 11 21 PH A 5 3 20 PH B 7 13 19 18 PH C L298 10 PH D 14 11 9 10 11 1 16 12 15 14 15 8 SENSE 1 SENSE 2 VREF Figure 3. Typical Application Schematic 7290-080405-3 STEPPER MOTOR WINDINGS STEP NUMBER 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 CURRENT WINDING 1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 CURRENT WINDING 2 +SIN 90˚ +SIN 84.30˚ +SIN 78.75˚ +SIN 73.1˚ +SIN 67.5˚ +SIN 61.8˚ +SIN 56.25˚ +SIN 50.6˚ +SIN 45˚ +SIN 39˚ +SIN 33.75˚ +SIN 28˚ +SIN 22.5˚ +SIN 16.8˚ +SIN 11.25˚ +SIN 5.6˚ +SIN 0˚ -SIN 5.6˚ -SIN 11.25˚ -SIN16.8˚ -SIN 22.5˚ -SIN 28˚ -SIN 33.75˚ -SIN 39˚ -SIN 45˚ -SIN 50.6˚ -SIN 56.25˚ -SIN 61.8˚ -SIN 67.5˚ -SIN 73.1˚ -SIN 78.75˚ -SIN 84.30˚ -SIN 90˚ INH1 INH2 PHA PHB PHC PHD 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 99.5% 98% 95.6% 93% 88% 83% 77% 71% 63% 56% 47% 38% 29% 20% 9.8% 0% 9.8% 20% 29% 38% 47% 56% 63% 71% 77% 83% 88% 93% 95.6% 98% 99.5% 100% 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 The values of the current are shown for 32 microsteps which is for one full step. For the next step the current in Winding 2 is held at full value while the current in winding 1 is varied from 100% down to 0% and back up to 100%. For 16, 8 or 4 microsteps 2, 4 or 8 microsteps are skipped, respectively, from this table. Skipping 16 microsteps produces half-step control. TABLE 1. MICROSTEPPING TABLE STEP NUMBER CURRENT WINDING 1 CURRENT WINDING 2 INH1 INH2 PHA PHB PHC PHD 0 +1 +1 100% 100% 1 0 1 0 1 2 3 -1 -1 +1 +1 -1 -1 100% 100% 100% 100% 100% 100% 0 0 1 1 1 0 1 0 0 0 1 1 TABLE 2. FULL STEPPING WITH TWO PHASES ON AT A TIME 7290-080405-4