Application Note 1667 Author: Theju Bernard ISL75051SRH High Performance 3A LDO Evaluation Board User Guide Description What’s Inside The ISL75051SRH is a high-performance, adjustable, low-voltage, high-current, low-dropout linear regulator specified at 3A rated output current for input voltages from 2.2V to 6V. The LDO outputs can be adjusted from 0.8V to 5V by means of two preset resistors. Salient features of the part include: The evaluation kit contains the following: • TID, ELDRS and SEE Rated • Very Fast Load Transient Response • ±2.0% Guaranteed VOUT Accuracy over Line, Load and Temperature • ISL75051SRHEVAL1Z evaluation board • ISL75051SRH datasheet • AN1667 application note Test Steps 1. Select the desired output voltage by shorting one of the jumpers from J2 through J6. The option of JP7 provides for continuous adjustment of VOUT using potentiometer R13. • Typical Dropout of 287mV at 3A 2. Set the OCP limit by using jumpers JP8 and JP9. JP9 = 0.8A min, and JP8 = 4A min. • EN Feature 3. Close JP10. Also closing jumper JP1 (2 and 3) selects R2 = 5.49k as pull-up for PGOOD. • PG Feature 4. Ensure that the output capacitor and CP are set according to recommended values shown in Table 1. • OCP Feature • Short-circuit and Over-temperature Protection The ISL75051SRHEVAL1Z evaluation board provides a simple platform to evaluate performance of the ISL75051SRH. The device output voltage is adjustable, and jumpers are provided to easily set popular output voltages. 5. Connect the input supply to VIN/GND and the load to VOUT/GND. Select the VIN to VOUT ratio to keep dissipation within the thermal limits of the device. 6. Use JP11 to enable/disable the IC; Open = Enable, and Close = Disable. (Note: For REVB boards, Close = Enable and Open = Disable.) FIGURE 1. ISL75051SRHEVAL1Z EVALUATION BOARD January 17, 2012 AN1667.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Copyright Intersil Americas Inc. 2012. All Rights Reserved. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1667 Optimizing LDO Performance TABLE 1. RECOMMENDED OUTPUT CAPACITOR VALUES Performance of the ISL75051SRH can be optimized by following the guidelines provided in this application note. Input and Output Capacitor Selection RH operation requires the use of a combination of tantalum and ceramic capacitors to achieve a good volume-to-capacitance ratio. The recommended combination is a 220µF, 25mΩ, 10V DSSC 04051-032 rated tantalum capacitor in parallel with a 0.1µF MIL-PRF-49470 CDR04 ceramic capacitor. This is to be connected between VIN to GND pins and VOUT to GND pins of the LDO, with PCB traces no longer than 0.5cm. The stability of the device depends on the capacitance and ESR of the output capacitor. The usable ESR range for the device is 6mΩ to 100mΩ. At the lower limit of ESR = 6mΩ, the phase margin is about 51°C. On the high side, an ESR of 100mΩ is found to limit the gain margin at around 10dB. The typical GM/PM seen on the ISL75051SRHEVAL1Z evaluation board for VIN = 3.3V, VOUT = 1.8V, and IOUT = 3A, with a 220µF, 10V, 25mΩ capacitor, is GM = 16.3dB and PM = 69.16°C. Pole Capacitor (CP) A small capacitor (CP) can be placed on the ADJ pin of the ISL75051SRH, as shown in Figure 2, across the bottom resistor in the feedback resistor divider. This is effectively a pole. The value of the capacitor can be calculated using Equation 1: F P = 1 ⁄ ( 2 • pi • R BOTTOM • C P ) (EQ. 1) The pole should be set to have the break frequency at 1MHz. VIN VOUT PG EN ISL75051SRH ADJ RTOP COUT CIN CP OCP RBOTTOM VOUT (V) RTOP (kΩ) RBOTTOM (Ω) CP (pF) COUT (µF) 5.0 4.32 499 120 220 4.0 4.32 634 120 220 2.5 4.32 1.13k 120 220 1.8 4.32 1.74k 100 220 1.5 (Note 1) 4.32 2.26k 100 47 1.5 4.32 2.26k 100 220 0.8 4.32 7.87k 68 220 NOTE: 1. Either option could be used depending on cost/performance requirements. Layout Guidelines Good PCB layout is important to achieving expected performance. When placing components and routing traces, minimize ground impedance and keep parasitic inductance low. Give the input and output capacitors a good ground connection, and place them as close to the IC as possible. Route the traces connecting the ADJ pin away from noisy planes and traces, and keep the board capacitance of the ADJ net to GND as low as possible. Thermal Guidelines If the die temperature exceeds +175°C typical, then the LDO output shuts down to zero until the die temperature cools to +155°C typical. The level of power combined with the thermal impedance of the package (RTHjc of 4°C/W for the 18 Ld CDFP package) determines whether the junction temperature exceeds the thermal shutdown temperature specified in the “Electrical Specifications” table of the ISL75051SRH datasheet. Mount the device on a high effective thermal conductivity PCB with thermal vias, per JESD51-7 and JESD51-5. Place a silpad between package base and PCB copper plane. Select the VIN and VOUT ratios to ensure that dissipation for the selected VIN range keeps TJ within the recommended operating level of 150°C for normal operation. FIGURE 2. ISL75051SRH TYPICAL APPLICATION Table 1 gives the recommended values for output capacitors (MLCC X5R/X7R) and CP for different voltage rails. Correct selection of the output capacitor and CP also helps increase PSRR at high frequencies. The board, however, uses a 100pF capacitor as a typical value most suited for the application range. 2 AN1667.0 January 17, 2012 Application Note 1667 Typical Performance Curves ILOAD = 0A. Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 1.8V, CIN = COUT = 10µF, TJ = +25°C, FIGURE 3. START-UP WAVEFORMS: VIN = 6.0V, VOUT = 0.8V, EN LOW TO HIGH FIGURE 4. START-UP WAVEFORMS: VIN = 2.2V, VOUT = 0.8V, EN LOW TO HIGH FIGURE 5. SHUTDOWN WAVEFORM: VIN = 6.0V, VOUT = 0.8V, EN HIGH TO LOW FIGURE 6. SHUTDOWN WAVEFORM: VIN = 2.2V, VOUT = 0.8V, EN HIGH TO LOW FIGURE 7. LOAD TRANSIENT, VIN = 3.3V, VOUT = 2.5V, COUT = 47µF 35mΩ FIGURE 8. LOAD TRANSIENT, VIN = 3.3V, VOUT = 2.5V, COUT = 220µF 25mΩ 3 AN1667.0 January 17, 2012 Application Note 1667 Typical Performance Curves ILOAD = 0A. (Continued) Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 1.8V, CIN = COUT = 10µF, TJ = +25°C, 0.30 8 7 0.25 VOLTAGE DROPOUT 6 OCP A 5 IOCP A = +128°C 4 3 IOCP A = +25°C IOCP A = -58°C 2 0.20 +125°C +150°C 0.15 +25°C 0.10 0.05 1 0 0 1 2 3 4 5 0.00 6 0 1 2 IOUT (A) ROCP (kΩ) FIGURE 9. ROCP (kΩ) vs OCP A OVER TEMP 1.824 1.822 -58°C, VOUT (mV) 0.5205 1.818 0.5200 VADJ (V) 1.816 VOUT (V) -58°C, VADJ (mV) 0.5210 1.820 1.814 1.812 1.810 +128°C, VOUT (mV) 1.808 +25°C, VADJ (mV) 0.5195 0.5190 0.5185 +128°C, VADJ (mV) 0.5180 1.806 0.5175 1.804 VIN = 2.5V VOUT = 1.8V 1.802 0.0 0.5 0.5170 VIN = 2.5V V = 1.8V 0.5165 OUT 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 1.0 IOUT (A) 0.808 2.0 0.522 +25°C, VOUT (mV) 2.5 3.0 3.5 FIGURE 12. LOAD REGULATION VADJ vs IOUT -58°C, VADJ (mV) -58°C, VOUT (mV) 0.520 0.806 +25°C, VADJ (mV) 0.518 0.804 0.802 VADJ (V) VOUT (V) 1.5 IOUT (A) FIGURE 11. LOAD REGULATION VOUT vs I OUT 0.810 4 FIGURE 10. DROPOUT vs I OUT 0.5215 +25°C, VOUT (mV) 3 0.800 +128°C, VOUT (mV) 0.798 0.796 0.516 0.514 +128°C, VADJ (mV) 0.512 0.794 0.792 VIN = 2.5V VOUT = 0.8V 0.790 0.0 0.5 0.510 VIN = 2.5V VOUT = 0.8V 1.0 1.5 2.0 2.5 IOUT (A) FIGURE 13. LOAD REGULATION VOUT vs I OUT 4 3.0 3.5 0.508 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 IOUT (A) FIGURE 14. LOAD REGULATION VADJ vs IOUT AN1667.0 January 17, 2012 Application Note 1667 Typical Performance Curves ILOAD = 0A. (Continued) Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 1.8V, CIN = COUT = 10µF, TJ = +25°C, 0.5215 2.525 0.5210 2.520 0.5200 0.5195 +25°C, VOUT (mV) VADJ (V) VOUT (V) 2.510 -58°C, VADJ (mV) 0.5205 -58°C, VOUT (mV) 2.515 +25°C, VADJ (mV) 2.505 +128°C, VOUT (mV) 2.500 0.5190 +128°C, VADJ (mV) 0.5185 0.5180 0.5175 2.495 0.5170 2.490 V = 2.5V IN VOUT = 0.8V 2.485 0.0 0.5 1.0 1.5 2.0 2.5 IOUT (A) FIGURE 15. LOAD REGULATION VOUT vs IOUT 5 3.0 3.5 0.5165 VIN = 3.3V V = 2.5V 0.5160 OUT 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 IOUT (A) FIGURE 16. LOAD REGULATION VADJ vs I OUT AN1667.0 January 17, 2012 Schematic 6 Application Note 1667 AN1667.0 January 17, 2012 Application Note 1667 ISL75051SRHEVAL1Z Bill of Materials PART NUMBER QTY UNITS REFERENCE DESIGNATOR DESCRIPTION PWB-PCB, ISL75051SRHEVAL1Z, REVC, ROHS MANUFACTURER IMAGINEERING INC MANUFACTURER PART ISL75051SRHEVAL1ZREV CPCB ISL75051SRHEVAL1ZREVCPCB 1 ea C0805X472K5RACTU-T 1 ea C7B CDR04BX104AKWS 4 ea C1B, C5B, C6B, C6D H1045-00101-50V5-T 1 ea C8 CAP, SMD, 0603, 100pF, PANASONIC 50V, 5%, C0G, ROHS ECJ-1VC1H101J H1045-00104-16V10-T 1 ea C1 CAP, SMD, 0603, 0.1µF, MURATA 16V, 10%, X7R, ROHS GRM39X7R104K016AD H1045-DNP 0 ea C1A, C5A, C6A, C6C CAP, SMD, 0603, DNPPLACE HOLDER, ROHS H1046-DNP 0 ea C7A CAP, SMD, 0805, DNPPLACE HOLDER, ROHS T525D227M010ATE025 2 ea C3D, C4D 108-0740-001 4 ea 131-4353-00 1 1514-2 KEMET CAP, SMD, 0805, 4700pF, 50V, 10%, X7R, AEC-Q200, ROHS CAP-MILQUAL, SMD, 1812, 0.1µF, 50V, 10%, X7R, ROHS AVX C0805X472K5RACTU CDR04BX104AKWS CAP-TANT, SMD, 7.3x4.3, KEMET 220µF, 10V, 20%, 25mΩ, DF:10, ROHS T525D227M010ATE025 J1-J4 JOHNSON CONN-JACK, BANANASS-SDRLESS, VERTICAL, COMPONENTS ROHS 108-0740-001 ea SP1 TEKTRONIX CONN-SCOPE PROBE TEST PT, COMPACT, PCB MNT, ROHS 131-4353-00 6 ea TP1-TP6 CONN-TURRET, TERMINAL POST, TH, ROHS 5002 6 ea TP7-TP12 CONN-MINI TEST POINT, KEYSTONE VERTICAL, WHITE, ROHS 68000-236HLF-1X3 1 ea JP1 CONN-HEADER, 1x3, BREAKAWY 1x36, 2.54mm, ROHS BERG/FCI 68000-236HLF 69190-202HLF 10 ea JP2-JP11 CONN-HEADER, 1x2, RETENTIVE, 2.54mm, 0.230 x 0.120, ROHS BERG/FCI 69190-202HLF SSL-LXA3025IGC-TR 1 ea LED1 ISL75051SRH 1 ea U1 (SEE ASSEMBLY INSTRUCTIONS) 2N7002LT1G-T 1 ea Q1 7 KEYSTONE 1514-2 5002 LED, SMD, 3x2.5mm, 4P, LUMEX RED/GREEN, 12/20MCD, 2V SSL-LXA3025IGC-TR INTERSIL IC-3A RAD HARD LDO REGULATOR, 18P, CDFP, ROHS ISL75051SRH TRANSISTOR-MOS, N-CHANNEL, SMD, SOT23, 60V, 115mA, ROHS ON SEMICONDUCTOR 2N7002LT1G AN1667.0 January 17, 2012 Application Note 1667 ISL75051SRHEVAL1Z Bill of Materials (Continued) PART NUMBER QTY UNITS REFERENCE DESIGNATOR DESCRIPTION MANUFACTURER MANUFACTURER PART 3299W-1-103LF 1 ea R13 POT-TRIM, TH, 3P, 10k, BOURNS 1/2W, 10%, 3/8SQ, 25TURN, TOPADJ, ROHS 3299W-1-103LF H2511-00R00-1/10W-T 1 ea R11 RES, SMD, 0603, 0Ω, 1/10W, TF, ROHS CR0603-10W-000T H2511-01000-1/10W1-T 1 ea R4 RES, SMD, 0603, 100Ω, VENKEL 1/10W, 1%, TF, ROHS CR0603-10W-1000FT H2511-01002-1/10W1-T 1 ea R17 RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS RK73H1JT1002F H2511-01131-1/10W1-T 1 ea R8 RES, SMD, 0603, 1.13k, YAGEO 1/10W, 1%, TF, ROHS RC0603FR-071K13L H2511-01741-1/10W1-T 1 ea R7 RES, SMD, 0603, 1.74k, PANASONIC 1/10W, 1%, TF, ROHS ERJ-3EKF1741V H2511-02261-1/10W1-T 1 ea R6 RES, SMD, 0603, 2.26k, YAGEO 1/10W, 1%, TF, ROHS RC0603FR-072K26L H2511-02671-1/10W1-T 0 ea R12 RES, SMD, 0603, 2.67k, YAGEO 1/10W, 1%, TF, ROHS RC0603FR-072K67L H2511-04321-1/10W1-T 1 ea R10 RES, SMD, 0603, 4.32k, 1/10W, 1%, TF, ROHS H2511-04991-1/10W1-T 1 ea R14 RES, SMD, 0603, 4.99k, PANASONIC 1/10W, 1%, TF, ROHS ERJ-3EKF4991V H2511-05110-1/10W1-T 1 ea R3 RES, SMD, 0603, 511Ω, VENKEL 1/10W, 1%, TF, ROHS CR0603-10W-5110FT H2511-05490-1/10W1-T 1 ea R1 RES, SMD, 0603, 549Ω, VENKEL 1/10W, 1%, TF, ROHS CR0603-10W-5490FT H2511-05491-1/10W1-T 1 ea R2 RES, SMD, 0603, 5.49k, VENKEL 1/10W, 1%, TF, ROHS CR0603-10W-5491FT H2511-06340-1/10W1-T 1 ea R9 RES, SMD, 0603, 634Ω, YAGEO 1/10W, 1%, TF, ROHS RC0603FR-07634RL H2511-06800-1/10W1-T 2 ea R15, R16 RES, SMD, 0603, 680Ω, ROHM 1/10W, 1%, TF, ROHS MCR03EZPFX6800 H2511-07871-1/10W1-T 1 ea R5 RES, SMD, 0603, 7.87k, YAGEO 1/10W, 1%, TF, ROHS RC0603FR-077K87L 4-40X1/2-SCREW 4 ea Four corners SCREW, 4-40x1/2in, PAN, NYLON, PHILLIPS, ROHS 4-40X3/4-STANDOFF 4 ea Four corners STANDOFF, 4-40x3/4in, KEYSTONE F/F, HEX, NYLON, ROHS 1902D 5X8-STATIC-BAG 1 ea Place assy in bag. BAG, STATIC, 5x8, ZIPLOC, ROHS INTERSIL 212403-013 ASSEMBLY INSTRUCTIONS 1 ea a) U1 - Cut a 0.4 inch square of part # SP2000-0.020-AC1212-NA Instructions for assembly. INTERSIL ASSEMBLY INSTRUCTIONS ASSEMBLY INSTRUCTIONS 1 ea b) Affix to PCB where U1 Instructions for will be installed. assembly. INTERSIL ASSEMBLY INSTRUCTIONS 8 VENKEL KOA AN1667.0 January 17, 2012 Application Note 1667 ISL75051SRHEVAL1Z Bill of Materials (Continued) PART NUMBER QTY UNITS REFERENCE DESIGNATOR DESCRIPTION MANUFACTURER MANUFACTURER PART ASSEMBLY INSTRUCTIONS 1 ea c) HAND SOLDER U1 on top of insulation Instructions for assembly. INTERSIL ASSEMBLY INSTRUCTIONS ASSEMBLY INSTRUCTIONS 1 ea d) Wash after soldering Instructions for assembly. INTERSIL ASSEMBLY INSTRUCTIONS DNP 0 ea LABEL-DATE CODE 1 ea LABEL-FOR DATE CODE AND BOM REV # INTERSIL LABEL-DATE CODE 0.3 ea INSULATION-SILICONE ELASTOMER, 12x12, 0.020in, W/ADHESIVE, ROHS BERGQUIST SP2000-0.020-AC-1212NA SP2000-0.020-AC-1212-NA 9 C3A, C3C, C4A, C4C (6TPF220ML) U1 (SEE ASSEMBLY INSTRUCTIONS) DO NOT POPULATE OR PURCHASE AN1667.0 January 17, 2012 Application Note 1667 Layout FIGURE 17. SILK SCREEN TOP FIGURE 18. TOP LAYER COMPONENT SIDE 10 AN1667.0 January 17, 2012 Application Note 1667 Layout (Continued) FIGURE 19. LAYER 2 FIGURE 20. LAYER 3 11 AN1667.0 January 17, 2012 Application Note 1667 Layout (Continued) FIGURE 21. BOTTOM LAYER SOLDER SIDE FIGURE 22. SILK SCREEN BOTTOM 12 AN1667.0 January 17, 2012 Application Note 1667 Layout (Continued) FIGURE 23. SILK SCREEN BOTTOM MIRROR Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 13 AN1667.0 January 17, 2012 Drill Drawings 14 Application Note 1667 AN1667.0 January 17, 2012