RENESAS HD74LVC16240ATEL

HD74LVC16240A
16-bit Buffers / Line Drivers with 3-state Outputs
REJ03D0362–0400Z
(Previous ADE-205-118B (Z))
Rev.4.00
Jul. 29, 2004
Description
The HD74LVC16240A has sixteen inverter drivers with three state outputs in a 48 pin package. This device is a
inverting buffer and has two active low enables (1G to 4G). Each enable independently controls four buffers. Low
voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LVC16240ATEL
TSSOP–48 pin
TTP–48DBV
T
EL (1,000 pcs/reel)
Function Table
Inputs
G
A
Output Y
H
L
L
X
H
L
Z
L
H
H:
L:
X:
Z:
High level
Low level
Immaterial
High impedance
Rev.4.00 Jul. 29, 2004 page 1 of 7
HD74LVC16240A
Pin Arrangement
1G 1
48 2G
1Y1 2
47 1A1
1Y2 3
46 1A2
GND 4
45 GND
1Y3 5
44 1A3
1Y4 6
43 1A4
VCC 7
42 VCC
2Y1 8
41 2A1
2Y2 9
40 2A2
GND 10
39 GND
2Y3 11
38 2A3
2Y4 12
37 2A4
3Y1 13
36 3A1
3Y2 14
35 3A2
GND 15
34 GND
3Y3 16
33 3A3
3Y4 17
32 3A4
VCC 18
31 VCC
4Y1 19
30 4A1
4Y2 20
29 4A2
GND 21
28 GND
4Y3 22
27 4A3
4Y4 23
26 4A4
4G 24
25 3G
(Top view)
Rev.4.00 Jul. 29, 2004 page 2 of 7
HD74LVC16240A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
Input diode current
Input voltage
Output diode current
IIK
VI
IOK
V
mA
V
mA
Output voltage
VO
Output current
VCC, GND current / pin
Storage temperature
IO
ICC or IGND
Tstg
–0.5 to 6.0
–50
–0.5 to 6.0
–50
50
–0.5 to VCC +0.5
–0.5 to 6.0
±50
100
–65 to +150
V
Conditions
VI = –0.5 V
VO = –0.5 V
VO = VCC +0.5 V
Output “H” or “L”
Output “Z” or VCC:OFF
mA
mA
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Symbol
Supply voltage
VCC
Input / output voltage
VI
VO
Operating temperature
Output current
Ta
IOH
IOL
Input rise / fall time *1
tr, tf
Rating
Unit
Conditions
1.5 to 5.5
V
Data hold
V
V
At operation
G, A
Output "H" or "L"
Output "Z" or VCC:OFF
2.0 to 5.5
0 to 5.5
0 to VCC
0 to 5.5
–40 to 85
–12
–24*2
12
24*2
10
°C
mA
mA
ns/V
Notes: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
2. Duty cycle ≤ 50%
Rev.4.00 Jul. 29, 2004 page 3 of 7
VCC = 2.7 V
VCC = 3.0 V to 5.5 V
VCC = 2.7 V
VCC = 3.0 V to 5.5 V
HD74LVC16240A
Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol
VCC (V)
Min
Max
Unit
Input voltage
VIH
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 5.5
2.7
3.0
3.0
4.5
2.7 to 5.5
2.7
3.0
4.5
0 to 5.5
2.7 to 5.5
2.0
VCC ×0.7
—
—
VCC –0.2
2.2
2.4
2.2
3.8
—
—
—
—
—
—
—
—
0.8
VCC×0.3
—
—
—
—
—
0.2
0.4
0.55
0.55
±5.0
±5.0
V
0
2.7 to 3.6
2.7 to 5.5
3.0 to 3.6
—
—
—
—
20
±20
20
500
µA
µA
VIL
Output voltage
VOH
VOL
Input current
Off state output current
IIN
IOZ
Output leak current
Quiescent supply current
IOFF
ICC
∆ICC
Test Conditions
V
V
IOH = –100 µA
IOH = –12 mA
IOH = –24 mA
V
IOL = 100 µA
IOL = 12 mA
IOL = 24 mA
µA
µA
VIN = 5.5 V or GND
VIN = VCC, GND
VOUT = 5.5 V or GND
VIN / VOUT = 5.5 V
VIN / VOUT = 3.6 to 5.5 V
VIN = VCC or GND
VIN = one input at(VCC –0.6)V, other
inputs at VCC or GND
µA
Switching Characteristics
Max
Unit
From
(Input)
To
(Output)
6.2
5.5
4.5
7.7
7.0
6.0
7.7
7.0
ns
A
Y
ns
G
Y
ns
G
Y
Ta = –40 to 85°C
Item
Symbol
VCC (V)
Min
Typ
Propagation delay time
tPLH
tPHL
Output enable time
tZH
tZL
Output disable time
tHZ
tLZ
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
—
1.5
—
—
1.5
—
—
1.5
—
—
—
—
—
—
—
—
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
2.7
—
—
—
—
—
—
—
—
—
—
3.0
15.0
6.0
—
1.0
1.0
—
—
Between output pins skew tOSLH
*1
tOSHL
Input capacitance
Output capacitance
Note:
CIN
CO
1. This parameter is characterized but not tested.
tosLH = | tPLHm – tPLHn |, tosHL = | tPHLm – tPHLn |
Rev.4.00 Jul. 29, 2004 page 4 of 7
ns
pF
pF
HD74LVC16240A
Test Circuit
VCC
VCC
Output
1G to 4G
Pulse Generator
Zout = 50 Ω
500 Ω S1
1Y1 to 4Y4
See Function Table
Input
450 Ω
CL =
50 pF
50 Ω Scope
1A1 to 4A4
Symbol
t PLH / t PHL
t ZH/ t HZ
t ZL / t LZ
Note:
OPEN
See under table
GND
*1
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
OPEN
GND
OPEN
GND
6V
2×Vcc
1. CL includes probe and jig capacitance.
Waveforms – 1
tr
tf
90 %
Input A
VIH
90 %
Vref
Vref
10 %
10 %
GND
t PLH
t PHL
VOH
Output Y
Vref
Vref
VOL
Notes:
1. tr = 2.5 ns, tf = 2.5 ns
2. Input waveform : PRR = 10 MHz, duty cycle 50%
Rev.4.00 Jul. 29, 2004 page 5 of 7
HD74LVC16240A
Waveforms – 2
tf
G
tr
90 %
Vref
10 %
VIH
90 %
Vref
10 %
t ZL
GND
t LZ
≈V OH1
Waveform - A
Vref
t ZH
Waveform - B
VOL + 0.3 V
t HZ
VOH – 0.3 V
Vref
VOL
VOH
≈V OL1
TEST
VIH
Vref
VOH1
VOL1
Notes:
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
2.7 V
Vcc
1.5 V
3V
50%Vcc
GND
GND
Vcc
1. tr = 2.5 ns, tf = 2.5 ns
2. Input waveform : PRR = 10 MHz, duty cycle 50%
3. Waveform – A shows input conditions such that the output is "L" level when enable by the
output control.
4. Waveform – B shows input conditions such that the output is "H" level when enable by the
output control.
Rev.4.00 Jul. 29, 2004 page 6 of 7
HD74LVC16240A
Package Dimensions
As of January, 2002
12.5
12.7 Max
48
Unit: mm
6.10
25
1
*0.19 ± 0.05
0.50
24
0.08 M
1.0
8.10 ± 0.20
0.65 Max
*Pd plating
Rev.4.00 Jul. 29, 2004 page 7 of 7
0.10 ± 0.05
0.10
*0.15 ± 0.05
1.20 Max
0˚ – 8˚
0.50 ± 0.1
Package Code
JEDEC
JEITA
Mass (reference value)
TTP–48DBV
—
—
0.20 g
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