RAiO RA8815 - NewHaven Display

RAiO
RA8815
128x33 Character/Graphic
LCD Driver
Specification
Version 2.2
July 1, 2006
RAiO Technology Inc.
@Copyright RAiO Technology Inc. 2005, 2006
RAiO TECHNOLOGY INC.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Update History
Version
Date
1.0
November 26, 2004
1.5
June 23, 2005
Description
First Release
Modify the sequence of signals EL_CHRG and EL_DCHG.
Add Table 8-1:Bump Szie and Pitch
Update the Power Range and Table 9-2.
Modify the description of PBK_EN of REG[13h]BLTR.
1.7
September 1, 2005
Modify the description of AUTO)SCR of REG[0Eh]SCCR.
Modify Section 9-3-2 Serial Interface, the unit of Access Time
should be μs.
Modify the Figure A-7 and A-8:ITO Layout Example.
2.0
November 11, 2005
Update Figure 6-29
Modify Figure 6-15 and Figure 6-16: Memory Write/Read on
2.1
January 10, 2006
6800(8-Bit) I/F.
Modify Table 6-2: Power Circuit Setup
Modify Table 8-1:Bump Size and Pitch
2.2
July 1, 2006
RAiO TECHNOLOGY INC.
Modify Figure 8-2:Gold Bump PAD Dimension
Modify Figure 6-27: 4x5 Key Matrix Curcuit
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RA8815
Preliminary Version 2.2
Chapter
1.
2.
3.
4.
128x33 Character/Graphic LCD Driver
Contents
Page
General Description ............................................................................
Feature ...............................................................................................
Block Diagram .....................................................................................
Pin Definition ......................................................................................
5
5
5
6
4-1 MPU Interface ...............................................................................................................................................6
4-2 LCD Panel Interface .....................................................................................................................................7
4-3 Clock and Power ..........................................................................................................................................8
4-4 Misc. ..............................................................................................................................................................8
5. Registers Description ......................................................................... 10
5-1 Register Table ........................................................................................................................................... 10
5-2 Register Contents ..................................................................................................................................... 10
6. Function Description .......................................................................... 23
6-1 MPU Interface ............................................................................................................................................ 23
6-1-1 Parallel Interface.............................................................................................................................. 23
6-1-2 Serial Interface ................................................................................................................................ 24
6-1-3 Register Read/Write ........................................................................................................................ 25
6-1-4 Memory Read/Write......................................................................................................................... 27
6-2 Memory....................................................................................................................................................... 29
6-3 System Clock............................................................................................................................................. 29
6-4 LCD Driver and Power Circuit.................................................................................................................. 30
6-4-1 Booster Circuit ................................................................................................................................. 31
6-4-2 Voltage Regulator............................................................................................................................ 32
6-4-3 Voltage Follower.............................................................................................................................. 33
6-4-4 LCD Driver....................................................................................................................................... 33
6-5 Interrupt ..................................................................................................................................................... 34
6-6 Key-Scan .................................................................................................................................................... 34
6-7 I/O Port ....................................................................................................................................................... 35
6-8 EL Signals .................................................................................................................................................. 35
6-9 ASCII Block................................................................................................................................................ 36
6-10 Power Control ......................................................................................................................................... 37
7. Display Functions .............................................................................. 38
7-1 Text Mode .................................................................................................................................................. 38
7-2 Graphic Mode ............................................................................................................................................ 38
7-3 Cursor Setting ........................................................................................................................................... 39
7-3-1 Cursor Position and Shift................................................................................................................. 39
7-3-2 Cursor Display and Blink ................................................................................................................. 39
7-3-3 Cursor Height .................................................................................................................................. 40
7-4 Display Window......................................................................................................................................... 40
7-5 Horizontal Scroll........................................................................................................................................ 41
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
7-6 Vertical Scroll ............................................................................................................................................ 42
8. Pin Diagram ....................................................................................... 44
8-1 COG Pad .................................................................................................................................................... 44
8-2 Pad X/Y Coordinate................................................................................................................................... 46
9. Electrical Characteristic ..................................................................... 50
9-1 Absolute Maximum Ratings..................................................................................................................... 50
9-2 DC Characteristic ...................................................................................................................................... 50
9-3 Timing Characteristic ............................................................................................................................... 51
9-3-1 Parallel Interface.............................................................................................................................. 51
9-3-2 Serial Interface ................................................................................................................................ 52
9-3-3 Reset Interface ................................................................................................................................ 54
Appendix A. ........................................................................................... 56
A-1 COG Application....................................................................................................................................... 56
A-1-1 Basic Connection of Serial I/F......................................................................................................... 56
A-1-2 Basic Connection of Parallel I/F...................................................................................................... 57
A-1-3 FPC Connection for Other Functions.............................................................................................. 58
A-2 ITO.............................................................................................................................................................. 62
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
1. General Description
The RA8815 is a Dot-Matrix LCD Driver that supports both character and graphic mode. It built-in a
256Kbyte character ROM that consists of Chinese, English and ASCII fonts. The embedded 528Byte display
RAM supports up to 128x33 dots LCD panel. The RA8815 also provides a scrolling buffer memory for
scrolling functions. It supports up, down, left and right scrolling features, and all of the scrolling is execute by
hardware.
In character mode, the RA8815 supports Chinese BIG5 code or GB code. The system(MPU) does not need
take a lot of time to show the Chinese font in graphic mode. It also provides small ASCII(8x8) and big
ASCII(8x16) font for English character, Japanese, European and Latin. The RA8815 integrates much
powerful hardware that including Contrast adjustment, 4x5 Key-Scan, eight General Purpose I/O and EL
Backlight signals for EL driver.
The RA8815 is a high integration chip of LCD Controller. It reduce a lot of time for system develop, and save
much cost for hardware system that due to it provides many features for related LCD display application.
2. Feature
Support both Character and Graphic Mode
Support 8080/6800 8/4-bit Parallel Interface
and 3-Wire/4-Wire Serial Interface
Built-in 256KB Font ROM: Chinese, English,
ASCII, Japanese, Latin, Latin-ext A, Latin-ext
B
Support ASCII 8x8/8x16 Half Size Font,
16x16 Full Size Chinese Font
Support Maximum 128Seg x 33Com LCD
Panel. 2 x 8 Chinese Fonts(16x16), or 4 x 16
English Fonts(8x8)
Built-in 528 Bytes Display RAM and 354Byte
Scrolling Buffer
Built-in 2X~3X(Voltage Booster), Voltage
Regulator, Voltage Follower
Support 1/33 Duty, 1/6~1/4 Bias Panel
Eight General Purpose I/O
Built-in 4x5 Key-scan Circuit
Support Horizontal/Vertical Scrolling Functions
Built-in 256Byte SRAM for Create Font
Provide Signals for EL Driver
Provide 32-Steps Contrast Adjust
Build-in RC Oscillator
Voltage Operation: Chip
2.5~3.6V,COG
Module
2.7~3.8V
Package: Gold Bump Die
3. Block Diagram
The RA8815 is consist of Display RAM, 256Kbyte Font ROM, Command Registers, LCD Controller, LCD
Driver, Voltage Booster, Voltage Regulator, MPU Interface and Key-Scan circuit.
M PU
LC D P anel
R A8815
EL B ack
L ig h t
D rive r
G P IO
4 x 5
K ey Scan
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Figure 3-1: System Block
DB[0:7]
528bytes
Display RAM + Buffer
RD(EN)
WR(R/W)
CS
MPU
I/F
D/C(RS)
Block
256bytes
CGRAM
256Kx8 Font ROM
C86
LCDC Control Block
BIT4
P/S
Cursor
Control
Register
KST[3..0]
Key Scan
Control
Block
& INT
KIN[4..0]
INT
Scroll
Control
Scan
Control
Block
Driver I/F
IO[7..0]
GPIO
EL_CHRG
EL_DCHG
RA, RB
RC
Oscillator
CLK_SEL
EXT_CLK
Voltage
Regulator
VREG
Voltage
Follower
VREF
Voltage
Booster
RST
Test &
Power
Circuit
TEST[2..0]
FG
S[1:0]
128
Segment
Drivers
C[2:1]P C[2:1]M V0~V4 VLCD
SEG0~SEG127
33
Common
Drivers
COM0~COM31
COMS_A[1:0]
COMS_B[1:0]
Figure 3-2: Internal Block
4. Pin Definition
4-1 MPU Interface
Pin Name
I/O
DB[7..0]
DB0: SCK
DB1: SDA/SDO
DB2: RS/SDI
I/O
DB3: CS
DB[7:6]: SMOD
Description
Data Bus
When the MPU uses parallel mode and 8-bit then all of the DB[7:0] are
valid. When use 4-bit then only DB[4:0] are valid, and DB[7:4] have to
keep floating.
When P/ S is “0”, then the interface between MPU and RA8815 is Serial
Mode. The pins DB[7:6](SMOD[1:0]) are used to select which serial mode:
SMOD:
Serial Mode
----------------------------------------------------------------0 X : 3-Wire, SCK, SDA, CS are used.
1 0 : 4-Wire, SCK, SDA, RS, CS are used.
1 1 : 4-Wire, SCK, SDO, SDI, CS are used.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
In serial mode, all of the related signals are defined by DB[3:0]:
SCK(DB0) : Serial Clock.
SDA(DB1) : Bi-direction Mode Serial Data.
SDO(DB1) : Data Out.
RS(DB2) : Memory/Register Cycle Select.
SDI(DB2) : Serial Data In.
CS (DB3) : Chip Select, active low.
The unused pin must keep NC for serial mode.
Read Control or Enable
RD
EN
WR
R/ W
I
When use 8080 series interface, RD is the read signal and active low.
When use 6800 series interface, EN is the Enable signal and active high.
This pin must keep NC for serial mode.
Write Control or Read-Write Control
When use 8080 series interface, WR is the write signal and active low.
I
When use 6800 series interface, this pin is R/ W , active high for read
cycle and active low for write cycle.
This pin must keep NC for serial mode.
Data/Command Select or Register Select)
When use 8080 series interface, this is Data or Command signal. When
D/ C
RS
I
CS
I
INT
O
C86
I
BIT4
I
P/ S
I
D/ C is “0”, means Register Cycle(or Command Cycle). When D/ C is
“1”, means Data Access Cycle(Data Cycle).
When use 6800 series interface, this is the RS signal. When RS is “0”,
means Register Cycle and “1” means Data Access Cycle.
This pin must keep NC for serial mode.
Chip Select
This is a chip enable for RA8815.
This pin must keep NC for serial mode.
Interrupt Signal
This is an interrupt output for MPU. Active low。
MPU Select
C86 = 0
The MPU interface is 8080 series.
C86 = 1
The MPU interface is 6800 series(Default).
This pin must keep NC for serial mode.
Data Bit Select
BIT4 = 0 The parallel mode is use 8-bit data bus.
BIT4 = 1 The parallel mode is use 4-bit data bus(Default).
This pin must keep NC for serial mode.
Parallel/Serial Select
P/ S = 0
DB[7:6].
The MPU interface is serial mode(Default). See the setting of
P/ S = 1
The MPU interface is parallel mode.
4-2 LCD Panel Interface
Pin Name
SEG0 ~ SEG127
COM0 ~ COM31
I/O
O
O
RAiO TECHNOLOGY INC.
Description
Segment Signals for Panel
Common Signals for Panel
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RA8815
Preliminary Version 2.2
COMS_A[1:0]
COMS_B[1:0]
DUM_L
DUM_R
128x33 Character/Graphic LCD Driver
O
Icon Common Signals for Panel
O
Dummy PAD
4-3 Clock and Power
Pin Name
I/O
RA, RB
I
V0~V4
O
C1P, C1M
I
C2P, C2M
I
VLCD
O
VREF
I
VREG
I
CLK_SEL
I
EXT_CLK
I
VDD
VDDP
GND
GNDP
Description
Resister Input
These are used to connect a resistor for internal oscillator.
Voltage Source of LCD Driver
The relationship of the power is VLCD>VREG≧V0≧V1≧V2≧V3≧V4≧
VSS。
Capacitor Input
These are used to connect a capacitor for internal Booster.
Capacitor Input
These are used to connect a capacitor for internal Booster.
Booster Output
Reference Voltage Input
This is the refeence voltage input when use an external regulator.
Voltage Regulator Output
When the internal voltage regulator is disable, this pin is connect to
VLCD and used to generate V0~V4.
Clock Select
This pin is used to select the clock source. When CLK_SEL “1”, the clock
is generated by internal oscillator and the external resistor that connect
on RA and RB. When CLK_SEL is “0”, the system clock is drive by
external pin - EXT_CLK.
External Clock
When CLK_SEL is “0”, this pin is the external clock input. When
CLK_SEL is “1”, this pin do not used and has to connect VDD or GND.
P
VDD Power
P
Ground
4-4 Misc.
Pin Name
I/O
KST[3..0]
O
KIN[4..0]
I
IO[7..0]
EL_CHRG
EL_DCHG
I/O
O
O
RST
I
Reset
TEST[2:0]
S[1:0], FG
I
Test Pins
These pins must keep NC for normal mode.
RAiO TECHNOLOGY INC.
Description
Key Strobe Output
Key Data Input
The unused pins keep floating(NC).
General Purpose I/O
EL Charge Signal
EL Discharge Signal
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Table 4-1: Pin Definition of Parallel/Serial Mode of MPU
Parallel Mode
Pin Name
I/O
8080
Serial Mode
6800
8Bit
4Bit
8Bit
4Bit
3-Wire
4-Wire
(A-Typ)
4-Wire
(B-Typ)
DB7
DB6
DB5
DB4
I/O
I/O
I/O
I/O
DB7
DB6
DB5
DB4
-----
DB7
DB6
DB5
DB4
-----
0
X
---
1
0
---
1
1
---
DB3
I/O
DB3
DB3
DB3
DB3
DB2
DB1
DB0
I/O
I/O
I/O
DB2
DB1
DB0
DB2
DB1
DB0
DB2
DB1
DB0
DB2
DB1
DB0
CS
-SDA
SCK
CS
RS
SDA
SCK
CS
SDI
SDO
SCK
RD , EN
I
RD
RD
EN
EN
--
--
--
WR , R/ W
I
WR
WR
R/ W
R/ W
--
--
--
D/ C , RS
I
D/ C
D/ C
RS
RS
--
--
--
CS
C86
BIT4
I
CS
CS
CS
CS
--
--
--
I
I
0
0
0
1
1
0
1
1
---
---
---
P/ S
I
1
1
1
1
0
0
0
“X” : 0 or 1(Do not care).
“--" : Not used, keep floating(NC).
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
5. Registers Description
5-1 Register Table
Table 5-1: Register Table
ID
Name
D7
D6
D5
D4
D3
D2
D1
D0
Description
0
DWFR
B/C
--
NW5
NW4
NW3
NW2
NW1
NW0
1
PWRR
SRST
MCLR
--
--
KWK
IOWK
DOFF_Z
SLP
2
SYSR
LS3
LS2
LS1
LS0
GB_EN
--
RS1
RS0
3
MWMR
BIEN
ASCS
BOLD
INV
MD1
MD0
Wave Form Select
Power Control
System Setting
Memory Mode
BMOD1 BMOD0
BLK
CR
X4
X3
X2
X1
X0
Y4
Y3
Y2
Y1
Y0
IRE
KF1/
KSTB1
KF0/
KSTB0
KSD3
KSD2
KSD1
KSD0
AKD4
AKD3
AKD2
AKD1
AKD0
CURCR
H3
5
X-CUR
--
--
X5
6
Y-CUR
--
Y6
Y5
KEYR
KSB
KDB1
KDB0
SIRQ
KSTB1
KSTB0
KSD4
SIRQ
AKD6
AKD5
KSDR
H1
--
4
7
H2
CUR_E
N
H0
KSTB_S
K_AUTO
EL
8
SWSXR
--
--
--
SSX4
SSX3
SSX2
9
SWSYR
--
--
SSY5
SSY4
SSY3
SSY2
A
SWRXR
--
--
--
SRX4
SRX3
SRX2
B
SWRYR
--
--
SRY5
SRY4
SRY3
SRY2
C
SCOR
SL7
SL6
D
ASCR
SPD3
SPD2
E
SCCR
F
ISR
10
CSTR
11
DRCR_A
12
DRCR_B
13
BLTR
14
IODR
15
IODAR
16
ELCR
17
CGMI
18
CGMD
SL5/SR5 SL4/SR4 SL3/SR3 SL2/SR2
SPD1
SCR_IM SCR_IM SCR_M
D1
D0
D
SPD0
SBUF
STP3
STP2
Cursor Control
Cursor X Position
Cursor Y Position
Key-scan Control
Key-scan Data
X-Scroll Start
SSY1
SSY0
Y-Scroll Start
SRX1
SRX0
X-Scroll Range
SRY1
SRY0
Y-Scroll Range
SL1/SR1 SL0/SR0 Scroll Unit
STP1
STP0
Auto Scroll Control
SSX1
SSX0
SCR_DI SCR_DI SCR_IN AUTO_S
Scroll Control
R1
R0
TEN
CR
Interrupt Status
BR2
BR1
BR0
CT4
CT3
CT2
CT1
CT0
Contrast
BOFF
EN_R
EN_G
ROFF
-TMPS
CDIR
SDIR
Driver Control
CK_BS1 CK_BS0 RR2
RR1
RR0
HD2
HD1
HD0
Driver Control
BLK_EN PBK_EN
-GINV
BLT3
BLT2
BLT1
BLT0
Blink Setting
OE7
OE6
OE5
OE4
OE3
OE2
OE1
OE0
IO Port Direction
IOD7
IOD6
IOD5
IOD4
IOD3
IOD2
IOD1
IOD0
IO Port Data
EL_EN
---ELT3
ELT2
ELT1
ELT0
EL Control
-----UMI2
UMI1
UMI0
Create Font Select
CGMD7 CGMD6 CGMD5 CGMD4 CGMD3 CGMD2 CGMD1 CGMD0 Create Font Data
BF
--
--
--
--
SCR_I
KI
BI
5-2 Register Contents
The RA8815 accept two Command Cycle from MPU. One is Register Cycle(RS = 0) and the other is
Memory Cycle(RS = 1). The MPU has to assign the register number of RA8815 that before access these
registers. Therefore, the first byte that MPU pass to RA8815 will be store into Index Register. And RA8815
will assume the next byte is read from or write into the register which Index Register assigned.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
IR (Index Register)
RW
0
RS
0
DB7
0
DB6
0
DB5
0
DB4
ID4
DB3
ID3
DB2
ID2
DB1
ID1
DB0
ID0
ID[4:0]: These bits are used to store the register number that MPU want to access on next cycle.
The ID[[4:0] provide 32 register number(00h~1Fh). But currently the RA8815 only used 25 registers
(00h~18h). All of these registers are be initially to “00h” after RESET.
Memory Data (RAMD)
RW
0/1
RS
1
DB7
D7
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
If RS is “1”, It means MPU execute the Memory Cycle for RA8815. When RW is “0”, MPU will write data to
Display RAM or ICON RAM that according the setting of MD[1:0](REG[03h] bit1-0). For example, MPU
write Big5/CG code to memory in Text Mode, or write bitmap data to display memory in Graphic mode.
When RW is “1”, the MPU read data from different paths of RA8815. It depend on the operation mode as
following:
1. Full Size Text Mode: From up to down of Left side(16-Bytes), and then up to down of Right
side(16-Bytes), total is 32-Bytes.
2. Half Size Text Mode: From up to down, total 16-Bytes data.
3. Small ASCII Text Mode: From up to down, total 8-Bytes data.
4. Graphics Mode: From left to right, each reading is one byte(8-Pixels).
[00h] Driver Waveform Register (DWFR)
RW
0
DB7
B/C
DB6
--
DB5
NW5
DB4
NW4
DB3
NW3
DB2
NW2
DB1
NW1
DB0
NW0
B/C: Select waveform of drive. 0
B-Type waveform. 1
C-Type waveform.
NW[5:0]: These bits are used to assign the Segment/Row number that when internal Frame signals can to
it and want to change the state. This function support only when B/C is “1” (C-Type wave form).
[01h] Power Control Register (PWRR)
RW
0
DB7
SRST
DB6
MCLR
DB5
--
DB4
--
DB3
KWK
DB2
IOWK
DB1
DOFF_Z
DB0
SLP
SRST: S/W reset. 1
All of the register will be initialed again except the display memory. 0
No action.
MCLR: Clear memory. 1
Clear the Display RAM data to “00h”. 0
No action. If both MCLR and SRST
set to ”1” then RA8815 will clear the display RAM and then Reset.
KWK: Key-scan wake up Setting. 0
Key-scan Wake up function off. 1
Key-scan wake up function on.
IOWK: I/O wake up Setting. 0
IO port wake up function off. 1
IO port wake up function on.
DOFF_Z: Display off. 0
LCD driver and display off. 1
LCD driver and display on.
SLP: Sleep mode setting. 1
Enter sleep mode, and turn off the clock. 0
RA8815 wake up. This bit
was clear to “0” when wake up from I/O port or Key-scan.
[02h] System Register (SYSR)
RW
0
DB7
LS3
DB6
LS2
DB5
LS1
DB4
LS0
DB3
GB_EN
DB2
--
DB1
RS1
DB0
RS0
LS[3:0]: Setup the segment number. The maximum segment of RA8815 is 128.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
LS3 LS2 LS1 LS0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
:
:
:
1
Line No.
16
32
48
64
80
96
112
128
Reserved
Reserved
1
1
1
Reserved
GB_EN: Setup the GB code or BIG5 code. 1
GB Code. 0
BIG5 Code.
RS[1:0]: Setup the common number. The maximum common of RA8815 is 32(Not including Icon).
RS1
RS0
Row No.
0
0
1
1
0
1
0
1
16
32
Reserved
Reserved
[03h] Memory Write Mode Register (MWMR)
RW
0
DB7
BMOD1
DB6
BMOD0
DB5
BIEN
DB4
ASCS
DB3
BOLD
DB2
INV
DB1
MD1
DB0
MD0
BMOD[1:0]: Setup the range for memory written.
BMOD1
BMOD0
Memory Range of Write
0
0
1
0
1
x
Normal Display Range
Display Range + Scroll-Buffer
Scroll-Buffer
BIEN: Busy interrupt control. 1
Busy interrupt enable (After write data to memory). 0
Busy interrupt
disable.
ASCS: Select ASCII Table。0
Select ASCII Table-1. 1
Select ASCII Table-2. Refer Chapter 6-9.
BOLD: Select Bold Font to write Display RAM. 0
Normal font. 1
Bold font.
INV: Select reverse font to write Display RAM. 0
Normal font. 1
Reverse font.
MD[1:0]: Select operation mode for Display RAM.
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MD1
MD0
Operation Mode
0
0
1
0
1
0
Graphic Mode
Small ASCII (8X8)
Big ASCII(8X16)
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
1
1
Full Size(16X16)
When Full-Size mode(MD[1:0] = 11), if the first byte data is less than 80h, RA8815 will assume it’s an
ASCII code and show the Big ASCII font. But if want to show the Big ASCII font that code is large than 80h,
then the operation mode has to change to Big ASCII mode(MD[1:0] = 10).
[04h] Cursor Control Register (CURCR)
RW
0
DB7
H3
DB6
H2
DB5
H1
DB4
H0
DB3
--
DB2
BLK
DB1
CR
DB0
CUR_EN
H[3:0]: Setup the cursor height.
H3
H2
H1
H0
Height
(Pixel)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
In Small ASCII mode(8X8), the H3 is reserved. The setting of cursor height is only form 1~8pixels(H[3:0] =
x000b~x111b).
BLK: Cursor blink select. 0
No Blinking. 1
Cursor Blinking.
CR: Cursor return. 0
No action. 1
Cursor return. Cursor will return to the left of panel.
CUR_EN: Cursor display select. 0
Cursor hides. 1
Cursor Display.
[05h] Cursor Position Register of X (X-CUR)
RW
0
DB7
--
DB6
--
DB5
X5
DB4
X4
DB3
X3
DB2
X2
DB1
X1
DB0
X0
X[5:0]: Setup the cursor position on segment. The unit is 8-pixels. Because maximum segment of RA8815
is 128-pixels, therefore the range of X[5:0] is 0~Fh. When the X[5:0] is 20h or 21h, then the cursor
position is assign to horizontal Scroll-Buffer.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
[06h] Cursor Position Register of Y (Y-CUR)
RW
0
DB7
--
DB6
Y6
DB5
Y5
DB4
Y4
DB3
Y3
DB2
Y2
DB1
Y1
DB0
Y0
Y[6:0]: Setup the cursor position on common. The unit is 1-pixels. Because maximum common of RA8815
is 32-pixels, therefore the range of Y[6:0] is 0~1Fh. When the Y[6:0] is 40h~4Fh, then the cursor
position is assign to vertical Scroll-Buffer. When Y[6:0] is 50h then cursor is located at COMS(Icon).
[07h] Key-scan Control Register (KEYR) (Write Only)
RW
DB7
DB6
DB5
0
KSB
KDB1
KDB0
DB4
DB3
KSTB_SE
K_AUTO
L
DB2
IRE
DB1
KF1/
KSTB1
DB0
KF0/
KSTB0
KSB: Key-scan control. 0
Key-scan disable. 1
Key-scan enable.
KDB[1:0]: Setup the de-bounce times of Key-scan in Auto-Mode. The one time means the time that Keyscan for one loop.
KDB1
KDB0
Times
0
0
1
1
0
1
0
1
8
16
32
64
KSTB_SEL: In non-Auto-mode, 0
the DB[1:0] are defined as KF[1:0]. 1
The DB[1:0] are defined as
KSTB[1:0] 。In Auto-Mode, the DB[1:0] is also defined as KF[1:0].
K_AUTO: Setup the scan mode. 1
Auto-Mode. The RA8815 will auto detect the key and store the code
into AKD[6:0] for MPU reading. 0
Non-Auto-Mode. The RA8815 will not store the code to
AKD[6:0]. The MPU has to read data from KSTB[1:0] and KSD[4:0] to make sure which key was
pressed. Of course, MPU could know if not only one key pressed at the same time In Non-AutoMode.
IRE: Setup the Interrupt of Key-scan. 0
Hardware Interrupt disable while key was pressed. 1
Generate hardware interrupt while key was pressed.
KF[1:0]: Setup the frequency of Key-scan.
KF1
KF0
Pulse Width
Key-scan Cycle Time
(4x5)
0
0
1
1
0
1
0
1
256us
512us
1.024ms
2.048ms
1.024ms
2.048ms
4.096ms
9.182ms
KSTB[1:0]: In Non-Auto-Mode, These two bits are used to setup the strobe for the Row of key matrix. If
any key pressed, the MPU can read data from KSTB[1:0] and KSD[4:0] to make sure which
key was pressed. The strobe data are also readable from Bit[6:5] of register KSDR.
[07h] Key-scan Data Register (KSDR) (Read Only)
If K_AUTO = 0:
RW
DB7
DB6
DB5
DB4
1
SIRQ
KSTB1
KSTB0
KSD4
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DB3
KSD3
DB2
KSD2
DB1
KSD1
DB0
KSD0
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
SIRQ: Indicate the interrupt of Key-scan. This bit was clear when REG[0Fh] bit 1 write “0”.
KSTB[1:0]: These two bit show which pin of KST[3:0] active.
KSD[4:0]: KIN Return Data. These bits are used in Non-Auto-Mode. The MPU can read data from
KSTB[1:0] and KSD[4:0] to make sure which key was pressed.
If K_AUTO = 1:
RW
1
DB7
SIRQ
DB6
AKD6
DB5
AKD5
DB4
AKD4
DB3
AKD3
DB2
AKD2
DB1
AKD1
DB0
AKD0
SIRQ: Indicate the interrupt of Key-scan. This bit was clear when REG[0Fh] bit 1 write “0”.
AKD[6:0]: Scan Data(Code). In Auto–Mode, the MPU read data from this register to know the status of key
matrix. The RA8815 supports 4x5 key matrix -- total 20Keys. The BCD number of 0~19h are
mapping to these keys.
AKD[6:0]
Scan Data
0~19h
20~39h
42
Other
Key No. Input
Long Key No. Input
Key Release
Reserved
[08h] Scroll Window Start X Register (SWSXR)
RW
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
---SSX4
SSX3
SSX2
SSX1
SSX0
SSX[4:0]: When the shift direction is from right to left, then these bits are used to setup Segment (X) start
point of scroll window. The unit is half size width(8-Pixels).
Note: When the shift direction is from left to right, these bits have to set 0.
[09h] Scroll Window Start Y Register (SWSYR)
RW
0
DB7
--
DB6
--
DB5
SSY5
DB4
SSY4
DB3
SSY3
DB2
SSY2
DB1
SSY1
DB0
SSY0
SSY[5:0]: Setup the Common (Y) start point of scroll window. The unit is pixel.
[0Ah] Scroll Window Rang X Register (SWRXR)
RW
0
DB7
--
DB6
--
DB5
--
DB4
SRX4
DB3
SRX3
DB2
SRX2
DB1
SRX1
DB0
SRX0
SRX[4:0]: Setup Segment (X) offset of scroll window. The unit is half size width(8-Pixels).
Note:
1. SRX must large or equal than 1, that means the minimum scroll range of X is 16 pixels.
2. The “SSX+SRX” can not exceed the range of Segment (X) of LCD panel. For example, if the panel
resolution is 96x32, then SSX+SRX must less than 96/8=12. That means the maximum of “SSX+SRX” is
11.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
[0Bh] Scroll Window Rang Y Register (SWRYR)
RW
0
DB7
--
DB6
--
DB5
SRY5
DB4
SRY4
DB3
SRY3
DB2
SRY2
DB1
SRY1
DB0
SRY0
SRY[5:0]: Setup the Common (Y) offset of scroll window. The unit is pixel.
Note:
1. SRY must large or equal than 1, that means the minimum scroll range of Y is 2 pixels.
2. The “SSY+SRY” can not exceed the range of Common (Y) of LCD panel. For example, if the panel
resolution is 96x32, then SSY+SRY must less than 32. That means the maximum of “SSY+SRY” is 31.
[0Ch] Scroll Offset Register (SCOR)
RW
0
DB7
SL7
DB6
SL6
DB5
DB4
DB3
DB2
DB1
DB0
SL5/SR5 SL4/SR4 SL3/SR3 SL2/SR2 SL1/SR1 SL0/SR0
SL[7:0]: Setup the shift unit of horizontal scroll. The unit is pixel and active when register SCR_MD1
(REG[0Eh]bit 3) is clear to “0”.
SR[5:0]: Setup the shift unit of vertical scroll. The unit is pixel and active when register SCR_MD1
(REG[0Eh]bit 3) is set to “1”.
In auto scroll mode, this register is also used to setup the start position of scroll of Common or Segment.
[0Dh] Auto-Scroll Control Register (ASCR)
RW
0
DB7
SPD3
DB6
SPD2
DB5
SPD1
DB4
SPD0
DB3
STP3
DB2
STP2
DB1
STP1
DB0
STP0
SPD[3:0]: Setup the speed of auto scroll.
SPD3
SPD2
SPD1
SPD0
Scroll Time
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1 Unit
3 Units
5 Units
7 Units
17 Units
19 Units
21 Units
23 Units
129 Units
131 Units
133 Units
135 Units
145 Units
147 Units
149 Units
151 Units
1 Unit = 1 Frame Times
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
STP[3:0]: Setup the shift unit on auto scroll mode.
STP3
STP2
STP1
STP0
Shift Pixel
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
[0Eh] Scroll Control Register (SCCR)
RW
0
DB7
DB6
DB5
SCR_IM SCR_IM
SCR_MD
D1
D0
DB4
SBUF
DB3
DB2
DB1
DB0
SCR_DI SCR_DI SCR_INT AUTO_S
R1
R0
EN
CR
SCR_IMD[1:0]: The definition is as following and they are available at Auto–Scroll-Mode.
0X: Setup 1-pixel shift to caused interrupt(SCR_INTEN must be 1).
10: Setup 8-pixel shift to caused interrupt(SCR_INTEN must be 1)
11: Setup 16-pixel shift to caused interrupt(SCR_INTEN must be 1)
SCR_MD: Scroll Mode Select. 0
Non-Auto-Scroll, the scroll offset clear to “0”. 1 Auto-Scroll Mode.
SBUF: Scroll-Buffer Control. 0
Scroll-Buffer disable. The scroll will not including the Scroll-Buffer, only
for display area. 1 Scroll-Buffer enable. The scroll area is including the display and Scroll-Buffer.
SCR_DIR[1:0]: Select the direction of scroll.
SCR_DIR1
SCR_DIR0
Direction of Scroll
0
0
1
1
0
1
0
1
Left to Right(Horizontal)
Right to Left(Horizontal)
Up to Down(Vertical)
Down to Up(Vertical)
SCR_INTEN: Setup the scroll interrupt. 0
Scroll interrupt disable. 1
In auto scroll mode, when scroll 1,
8 or 16-pixels generate an interrupt to MPU.
AUTO_SCR: Auto-Scroll control. 0
Stop the Auto-Scroll. If want to close the Auto-Scroll mode or display
new data on the screen, then the Bit5 - SCR_MD must clear to 0 first. 1
Auto-Scroll going.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
[0Fh] Interrupt Status Register (ISR)
RW
1
DB7
BF
DB6
--
DB5
--
DB4
--
DB3
--
DB2
SCR_I
DB1
KI
DB0
BI
BF: Busy Flag. 1
Display RAM is in busy(Data Write). 0
Display RAM is idle(Write complete).
SCR_I: Scroll interrupt. 1
Interrupt for scroll complete,0
No scroll Interrupt.
KI: Key-scan interrupt. 1
Interrupt for key pressed. 0
No Key pressed Interrupt.
BI: Busy Interrupt. 1
Interrupt for the activity of writing data to display RAM completed. 0
No busy
Interrupt
[10h] Contrast Adjust Register (CSTR)
RW
0
DB7
BR2
DB6
BR1
DB5
BR0
DB4
CT4
DB3
CT3
DB2
CT2
DB1
CT1
DB0
CT0
BR[2:0]: Setup the LCD Bias(Base on 128x33).
BR2
BR1
BR0
Bias
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
X
1/4
1/4.5
1/5
1/5.5
1/6
1/6.5
1/7
CT[4:0]: Setup the Contrast(32 Level). Normally depend on the liquid, power and panel size to adjust the
best display quality.
CT4 CT3 CT2 CT1 CT0
0
0
0
0
0
0
Contrast
0
0
0
1
Light
1
1
Dark
:
:
:
1
1
1
[11h] Driver Control Register1 (DRCR_A)
RW
0
DB7
BOFF
DB6
EN_R
DB5
EN_G
DB4
ROFF
DB3
--
DB2
--
DB1
CDIR
DB0
SDIR
BOFF: Booster control. 1
Internal Booster enable. 0
Internal Booster disabled and used external
voltage.
EN_R: Reference voltage control. 1
Internal reference voltage enable for Regulator. 0
Disable the
internal reference voltage. The Regulator use external reference voltage.
EN_G: VREG control. 1
The VREG is generated by internal Regulator. 0
Use external VREG, and
the EN_R and BOFF have to clear “0”(Off) to reduce power consumption.
ROFF: Voltage Follower control. 1
Internal Voltage Follower enable for LCD Bias voltage. 0
Disable
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
internal Voltage Follower, and use external voltage to generate LCD Bias voltage. If use external
Voltage Follower, then EN_G, EN_R and BOFF have to clear “0”(Off) to reduce power
consumption.
CDIR: Common sequency select. 0
Pins COM0~31 are mapping to Common 0~31. 1 Pins COM0~31
are mapping to Common 31~0.
SDIR: Segment sequency select. 0
Pins SEG0~127 are mapping to Segment 0~127. 1
Pins
SEG0~127 are mapping to Segment 127~0.
[12h] Driver Control Register (DRCR_B)
RW
0
DB7
DB6
CK_BS1 CK_BS0
DB5
RR2
DB4
RR1
DB3
RR0
DB2
HD2
DB1
HD1
DB0
HD0
CK_BS[1:0]: Select the clock of Booster. Assume the RC oscillator clock is 45KHz.
CK_BS1
CK_BS0
Clock of Booster
0
0
1
1
0
1
0
1
SYS_CLK/2
22.5KHz
SYS_CLK/4
11.25KHz
SYS_CLK/6
7.5KHz
SYS_CLK/8
5.625KHz
RR[2:0]: Setup the Resistor Ratio of Regulator. The ratio is VREF : VREG.
RR2
RR1
RR0
Resistor Ratio
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
X2
X2.5
X3
X3.5
X4
X4.5
X5
--
Note: The VREF is 1.6V.
HD[2:0]: Setup the LCD driving current. Normally big panel use bigger driving current to void bad display
quality.
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HD2
HD1
HD0
Driving Current
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Min
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Max
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
[13h] Blink Timer Register (BLTR)
RW
0
DB7
DB6
BLK_EN PBK_EN
DB5
--
DB4
GINV
DB3
BLT3
DB2
BLT2
DB1
BLT1
DB0
BLT0
BLK_EN: Blinking. 0
Blinking off. 1
Blinking on.
PBK_EN: Whole or Partial Blinking selection. 0
Whole screen Blinking. 1
Partial screen Blinking. The
blinking area is depending on the scroll window. That means the partial area is setting by
register SWSXR, SWSYR, SWRXR and SWRYR. When the Partial Blinking off, the above four
registers had better clear to 0. Note, only BLK_EN set to “1” when blink is active.
GINV: Setup display reverse. 0
Normal display. 1
Display reverse.
BLT[3:0]: Setup blinking time.
BLT3
BLT2
BLT1
BLT0
Blink Time
(Unit: Frames)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
8
16
24
32
40
48
56
64
72
80
88
96
104
112
120
128
[14h] IO Direction Control Register (IODR)
RW
0
DB7
OE7
DB6
OE6
DB5
OE5
OE[7:0]: Select the I/O port direction. 0
DB4
OE4
DB3
OE3
Input. 1
Output.
DB4
IOD4
DB3
IOD3
DB2
OE2
DB1
OE1
DB0
OE0
DB2
IOD2
DB1
IOD1
DB0
IOD0
[15h] IO Data Register (IODAR)
RW
0
DB7
IOD7
DB6
IOD6
DB5
IOD5
IO[7:0]: This register stores the input data of I/O port when I/O port is input mode.
[16h] EL Control Register (ELCR)
RW
0
DB7
EL_EN
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DB6
--
DB5
--
DB4
--
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DB3
ELT3
DB2
ELT2
DB1
ELT1
DB0
ELT0
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
EL_EN: EL signals output . 0
Off. 1
On.
ELT[3:0]: Setup the output time of EL signals. The following table is base on the RC oscillator fix at 45KHz.
The output time is longer when RC oscillator clock is slower.
ELT3
ELT2
ELT1
ELT0
Output Time(Sec)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
2
4
6
8
10
12
14
16
18.
20
22
24
26
28
30
DB4
--
DB3
--
[17h] CGRAM Register (CGMI)
RW
0
DB7
--
DB6
--
DB5
--
DB2
UMI2
DB1
UMI1
DB0
UMI0
UMI[2:0]: Select the create font number. The RA8815 allow user create eight 16x16 full size font. The
mapping font code is FFF0h~FFF7h.
UMI2 UMI1 UMI0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Font Code
0
1
0
1
0
1
0
1
FFF0h
FFF1h
FFF2h
FFF3h
FFF4h
FFF5h
FFF6h
FFF7h
[18h] CGRAM Data Register (CGMD)
RW
0
DB7
CGMD7
DB6
CGMD6
DB5
CGMD5
DB4
CGMD4
DB3
CGMD3
DB2
CGMD2
DB1
CGMD1
DB0
CGMD0
CGMD[7:0]: This register is used to transfer or read the data of 16x16 full size font. The MPU write
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
continuous 32-bytes data of bit-map of 16x16 full size font into this register that after program
the REG[17h]. If user want to show the self-create font, just write the two bytes font code to
RA8815.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
6. Function Description
6-1 MPU Interface
6-1-1 Parallel Interface
The MPU interface of RA8815 supports both 8080 and 6800 series with in 4-Bit or 8-bit bus width. If
the “C86” connects to GND, then the MPU is defined as 8080 type interface. If pin “C86” connects
to VDD, then it’s defined as 6800 type interface. Refer to the Figure 6-2.
If the pin “BIT4” connects to GND, then the bus width of MPU interface is 8-Bit. If the pin “BIT4”
connects to VDD, then the bus width is 4-Bit. And only the DB[3:0] of data bus are available.
8080
MPU
RA8815
D/C
A0
A1-A7
IORQ
VDD
P/S
Decoder
CS
C86
DB0-3(DB0-7)
-
D0-D3(D0-D7)
RD
RD
WR
WR
RES
RST
BIT4
VDD
or
GND
Figure 6-1: 8080 (4/8-Bit) MPU Interface
6800
MPU
RA8815
A0
A1-A7
VMA
VDD
RS
P/S
Decoder
CS
C86
D0-D3(D0-D7)
DB0-3(DB0-7)
EN
EN
R/W
R/W
RES
RST
BIT4
VDD
or
GND
Figure 6-2: 6800 (4/8-Bit) MPU Interface
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
6-1-2 Serial Interface
The RA8815 aslo support three type serial interface. One is 3-Wires and the others are 4-Wires(AType, B-Type). This feature is control by the pin “P/ S ” and DB[7:6]. Refer to Table 4-1. In serial
mode the DB[7:6] are used as SMOD[1:0] to select the different serial mode. Please also refer to
Table 6-1. The Figure 6-3 to 6-5 are the interface diagram of MPU and RA8815 which in serial mode.
Table 6-1
SMOD
Serial Mode Interface
0 X
3-Wires. Use signals SCK, SDA and CS .
1 0
4-Wires (A-Type). Use signals SCK, SDA, RS and CS .
1 1
4-Wires (B-Type). Use signals SCK, SDO, SDI and CS .
MPU
RA8815
SMOD1(DB7)
SMOD0(DB6)
P/S
IO0
SCK(DB0)
IO1
SDA(DB1)
IO2
CS(DB3)
Figure 6-3: 3-Wires MPU interface
MPU
VDD
RA8815
SMOD1(DB7)
SMOD0(DB6)
IO0
SCK(DB0)
IO1
SDA(DB1)
IO2
RS(DB2)
IO3
CS(DB3)
P/S
Figure 6-4: 4-Wires(A-Type) MPU interface
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
MPU
VDD
RA8815
SMOD1(DB7)
SMOD0(DB6)
IO0
SCK(DB0)
IO1
SDO(DB1)
IO2
SDI(DB2)
IO3
CS(DB3)
P/S
Figure 6-5: 4-Wires(B-Type) MPU interface
6-1-3 Register Read/Write
The RA8815 accepts two access cycles from MPU. One is read data from register or write data to
register. Another is read data from memory or write data to memory. As description of Chapter 5-2,
MPU must tell the RA8815 that which register will be access. Therefore the first data that write to
RA8815 is to select the register number. And the second data is the exact data that writing into or
reading from this register.
Because the features of RA8815 are controlled by the contents of internal registers, so if we write
data to register is like to give a command to RA8815. Therefore we can say that the Register
Access Cycle is same as Command Cycle.
The Figure 6-6 and 6-7 show the register access timing of 8080 MPU(8-Bit) with RA8815. Figure 6-8
and 6-9 show the register access timing of 6800MPU(8-Bit) interface. Figure 6-10 to 6-12 show the
register access timing of serial interface.
DB[7:0]
REG No.
DB[7:0]
DATA
CS
CS
WR
WR
RD
RD
D/C
D/C
Figure 6-6: Register Wrie on 8080(8-Bit) I/F
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REG No.
DATA
Figure 6-7: Register Read on 8080(8-Bit) I/F
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RA8815
Preliminary Version 2.2
DB[7:0]
128x33 Character/Graphic LCD Driver
REG No.
DB[7:0]
DATA
CS
CS
R/W
R/W
EN
EN
RS
RS
Figure 6-8: Register Write on 6800(8-Bit) I/F
REG No.
DATA
Figure 6-9: Register Read on 6800(8-Bit) I/F
CS
SDA
RW
RS(0)
R7 R6 ………………….. R0
D7 D6 …………………. D0
SCK
Register No.
R/W DATA.
Figure 6-10: Register Read/Write Access on 3-Wires I/F
CS
RS
0
SDA
RW
Don’t Care
R7 R6 …………..…….. R0
D7 D6 ……….……………. D0
SCK
Register No.
R/W DATA.
Figure 6-11: Register Read/Write Access on 4-Wires(A-Type) I/F
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
CS
RW
SDI
SDO
RS(0)
R7 R6 ………………….. R0
Don’t Care
WD7 WD6 ……………. WD0
RD7 RD6 ……………... RD0
SCK
Register No.
R/W DATA.
Figure 6-12: Register Read/Write Access on 4-Wires(B-Type) I/F
6-1-4 Memory Read/Write
Another cycle for MPU to RA8815 is memory Read/Write cycle. Normally it used to show
information on the LCD screen. A memory writes means write a data into the mapping address that
cursor located. After a memory write complete, the cursor will auto increase. And the data of next
memory write will fill into the new memory address that new curser position located. Because all of
the memory read/write cycles are transfer the display data, so we can abbreviate the name of
Memory Access Cycle to Data Cycle.
The Figure 6-13 and 6-14 show the memory access timing of 8080 MPU(8-Bit) with RA8815. Figure
6-15 and 6-16 show the memory access timing of 6800MPU(8-Bit) interface. Figure 6-17 to 6-19
show the memory access timing of serial interface.
DB[7:0]
DATA(n)
DATA(n+1)
DB[7:0]
CS
CS
WR
WR
RD
RD
D/C
D/C
Figure 6-13: Memory Write on 8080(8-Bit) I/F
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DATA(n)
DATA(n+1)
Figure 6-14: Memory Read on 8080(8-Bit) I/F
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RA8815
Preliminary Version 2.2
DB[7:0]
128x33 Character/Graphic LCD Driver
DATA(n)
DATA(n+1)
DB[7:0]
CS
CS
R/W
R/W
EN
EN
RS
RS
Figure 6-15: Memory Write on 6800(8-Bit) I/F
DATA(n)
DATA(n+1)
Figure 6-16: Memory Read on 6800(8-Bit) I/F
CS
SDA
RW
RS(1)
MD7 MD6 …………….. MD0
SCK
Mem. R/W DATA.
Figure 6-17: Memory Read/Write Access on 3-Wries I/F
CS
RS
1
SDA
RW
Don’t Care
MD7 MD6 ……….……. MD0
SCK
Mem. R/W Data
Figure 6-18: Memory Read/Write Access on 4-Wires(A-Type) I/F
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
CS
SDI
SDO
RW
Don’t Care
RS(1)
WD7 WD6 ……………. WD0
RD7 RD6 ……………... RD0
SCK
Mem. R/W Data
Figure 6-19: Memory Read/Write Access on 4-Wires(B-Type) I/F
6-2 Memory
The RA8815 built-in three memory:
1. 256Kbyte Font ROM
2. 528Byte Display RAM
3. Character Generator RAM(CGRAM)
The 256Kbyrte Font ROM stores bit map data of Chinese font. It also including English, Japaness,
Europen, Latin(Latin-ext A, Latin-ext B) and ASCII. In text mode, RA8815 will read the bit map data
from Font ROM and pass to display RAM that when RA8815 received the standard code from MPU.
The LCD control citcuit will read data of display RAM continuous and send to driver circuit. So the text
will show on the LCD screen. Therefore, the MPU will save a lot of time to caculate the position of
cursor and read mant bit map data from font ROM then write to dispaly RAM. The MPU will promote
the display efficiency to handle Chinese text display. And it will reduce the system develope time.
The display range of RA8815 is 128x33 dots. So it needs 528Byte(128*33/8) display RAM. In addition,
RA8815 also built-in a scroll buffer to provide the scrlling and shiftting functions.
The Character Generator RAM(CGRAM) is used for user to create special fonts. There are eight space
of full size font to reserved for user. Their codes are fixed from FFF0h to FFF7h. The MPU could write
the mapping code to RA8815 and show the bit map font on screen that after the user font(writing 32
byte to CGRAM) was created.
6-3 System Clock
The clock of RA8815 is generated by the internal circuit and resister that between pin RA and RB.
Normally the resistor is vaule is 270Kohm and the clock frequency is around 55KHz. When the
bit0(SLP) of register PWRR set to “1”, then the clock will be stop.
Whe the input pin “CLK_SEL” set to “0”, then system clock can also input from external clock through
pin “EXT_CLK”.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
6-4 LCD Driver and Power Circuit
The driver circuit of RA8815 is a low power design. The power supply circuit is consist of Booster,
Voltage Regulator and Voltage Follower. For different requirement of power, the Driver Control
Register(REG[11h]) is used to enable or disaable for related circuit.
D[n:0]
VLCD
Cxn
CK_BS
Booster
LT
Latch x m
LP
Latch x n
VREG
Regulator
Voltage
Follower
R-String
BOFF
V0
V1
V2
V3
V4
ROFF
COM /
Segment
Driver
COM[31:0]
COMS
SEG[127:0]
DOFF
V[4:0]
VREF
Figure 6-20: LCD Driver and Power Supply Circuit Block
The user could use the setting of register REG[11h] to select the internal or external power. Please
refer to the following of Table 6-2 and Table 6-3.
Table 6-2: Power Circuit Setup
Driver Control Register
(DRCR_A)
State
‘1’
‘0’
Functions
Bit7
Booster Circuit Control Bit
ON
OFF
Bit6
Bit5
Bit4
Reference Voltage Circuit Control Bit
Voltage Regulator Circuit Control Bit
Voltage Follower Circuit Control Bit
ON
ON
ON
OFF
OFF
OFF
Table 6-3: Setting Table of Power Circuit
Driver Control
Register
(DRCR_A)
D7 D6 D5
D4
1
1
1
Booster
Voltage
Regulator
Reference
Voltage(VREF)
of Voltage
Regulator
1
ON
ON
Internal
Voltage
Follower
External Power
ON
VDD
0
1
1
1
OFF
ON
Internal
ON
VLCD, VDD
1
0
1
1
ON
ON
External
ON
VREF, VDD
0
0
1
1
OFF
ON
External
ON
VLCD, VREF, VDD
0
0
0
1
OFF
OFF
Don’t Need
ON
VREG, VDD
0
0
0
0
OFF
OFF
Don’t Need
OFF
V0~V4, VDD
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
6-4-1 Booster Circuit
The RA8815 built-in a Booster which create 3-times or 2-times of “VDD-VSS” that we called “VLCD”.
The VLCD is supply the power for next stage curcuit – Voltage Regulator and internal Driver cuicuit.
If connect an 1uF capacitor on pin C1P and C1M, then the VLCD is eaual to 2*VDD. If the pin C2P
and C2Malso connect n 1uF capacitor then the VLCD is 3*VDD. Refer to the following description of
Figure 6-21.
Because the RA8815 supports maximumn LCD panel is 128x33. Therefore sometimes you can get
the good display quality that base on lower power such as 5V only. In that case, user only need to
connect 5V to VDD, VLCD, C1P and C2P. And you do not need to add capacitor on C1P/C1M and
C2P/C2M.
VDD
C 2P
C 1P
C 1M
C 2P
C 2M
C 2M
VLCD
VLCD
VSS
VSS
RA8815
C 1M
RA8815
C 1P
VDD
2 X S te p -u p V o lta g e C irc u it
3 X S te p -u p V o lta g e C irc u it
V L C D = 3 x V D D = 7 .2 V
V L C D = 2 xV D D = 6 V
V D D = 2 .4 V
VDD=3V
VSS=0V
VSS=0V
3 X S te p -u p V o lta g e R e la tio n s h ip s
2 X S te p -u p V o lta g e R e la tio n s h ip s
Figure 6-21: Application Circuit of Booster
The clock source of Booster is also control by register DRCR_B. Please refer to the description of
REG[12h] in Chapter 5-2. Normally, if use the internal Driver Power, then the application circuit is
follow Figure 6-22. If use external VLCD, that means do not use the internal Booster, then the
connection is show as Figure 6-23.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
External
Power
Supply
VLCD
C1
VLCD
C2M
C1
C1
C2
C2
C2
C2M
C2P
C2P
C1M
C1P
C1M
C1P
C2
VREF
C2
V0
C2
V1
VREF
V0
V1
C2
V2
C2
V2
C2
V3
C2
V3
C2
V4
C2
V4
VSS
VSS
Figure 6-22: Internal VLCD(3*VDD)
Figure 6-23: External VLCD
Note: The capacitor value of C1 is 1uF and C2 is 0.1uF.
6-4-2 Voltage Regulator
The Voltage Regulator is consists of Band-Gap and OP-Amp. The purpose is used to generated a
stable power - VREG for Voltage Follower. The RA8815 also built-in a fixed reference power - VREF for
Voltage Regulator to generated VREG. The basic formula is as following:
VREG=(1+R1/R2)×VREF
R1
VREG
R2
VREF
Figure 6-24: Voltage Regulator
The resistor ratio(VREF and VREG) of Voltage Regulator is adjustable by register DRCR_B. There are
total seven cases - 2/2.5/3/3.5/4/4.5/5X. Refer to the description of Bit[5:3] of register RCR_B on
Chapter 5-2. The Voltage Regulator also provide -0.05% auto adjust for temperature compensation.
The internal VREF of RA8815 value is 1.6V. It’s also could supply from external circuit. Please refer to
Table 6-3 and Table 6-4:
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Table 6-4: Select VREF
Register DRCR_A
Bit6(EN_R)
VREF
0
1.60V (Ta=25°C)
1
External
6-4-3 Voltage Follower
The internal Voltage Follower provides V0~V4 power for LCD Driver circuit. Of course, the user
could select internal or external Voltage Follower. The relationship of V0~V4 and LVLCD is as
following:
VLCD > V0 > V1 > V2 > V3 > V4 > GND
Figure 6-25A shows the circuit of using internal Voltage Follower. For external V0~V4, the
connection is show as Figure 6-25B.
External
Power
Supply
C2
C2
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1P
C1M
C1P
VREF
VREF
V0
V0
V1
C2
V2
C2
V3
C2
V4
External
Power
Supply
V1
V2
V3
V4
VSS
VSS
Figure 6-25A: Use Internal Voltage Follower
Figure 6-25B Use External Voltage Follower
6-4-4 LCD Driver
The Segment/Common Driver of RA8815 is used to latch the data of pre-stage, then send to Level
Shifter for combination. The combined data will follow the Timing Generator to control the switchs
then pass the V0~V4 to Common and Segment.
The LCD Bias of RA8815 is adjustable by register CSTR that from 1/4 to 1/7. The user can also
adjust the display quality from this register. Meanwhile, the driving current is also adjustable by
register DRCR_B that in order to meet different panel.
As Figure 6-26, the RA8815 provides 128 Segment and 33 Common signals. One of the Common
signal – COMS is provide for the Icon of LCD Panel. The COMS_A[1:0] and COMS_B[1:0] are
located on the both side of RA8815 that in order to easier layout for COG panel. The COMS_A[1:0]
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
and COMS_B[1:0] have independent buffers, so if the area of Icon is bigger, then you can connect
the COMS_A0 and COMS_A1 together. Or connect COMS_B0 and COMS_B1 together.
128
Segment
Drivers
SEG0~SEG127
33
Common
Drivers
COM0~COM31
COMS_A0
COMS_A1
COMS
COMS_B0
COMS_B1
Figure 6-26:The Driver of Segment and Common
The DOFF_Z of register PWRR is used to cotrol the On/Off of LCD Panel, When DOFF_Z is set to
“0” then LCD Driver was closed. At this state, the driver output signals COM0~COM31 and
SEG0~SEG127 are connect to GND, and the screen of LCD Panel was Off.
6-5 Interrupt
The RA8815 provide a interrupt signal( INT ) to response three possible interrupt:
Busy Interrupt– When the data write to display RAM was complete.
Scroll Interrupt - When the scroll window shifted 1, 8 or 16-pixels.
Key-scan Interrupt - When a key was pressed.
The interrupt of above can be enabled or disable by register. The MPU can read the interrupt message
form interrupt status register. The INT is active low, so when MPU detect the interrupt happen then
must clear interrupt status for INT return to high. If user do not use the hardware interrupt( INT ), then
MPU can get the interrupt message by reading the status register.
6-6 Key-Scan
The RA8815 built-in 4x5 key-scan circuit for extra key board function to help user integrate a key
matrix application. In auto-mode, MPU can read the key code from register to know the key was shortpress, long-presee or key released. Use can also adjust the cycle time of key-scan. Figure 6-27 is the
simple application curcuit. Table 6-5 is the mapping keyboard code of key matrix as Figure 6-27. So
MPU knows which ket be pressed by reading register – KSDR.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
RA8815
KST3
KST2
KST1
KST0
VDD
10KΩ
KIN4
KIN3
KIN2
KIN1
KIN0
Figure 6-27: 4x5 Key Matrix Curcuit
Table 6-5: Keyboard Code of Auto-Mode
Short-Press
Long-Press
KST3 KST2 KST1 KST0 KST3 KST2 KST1 KST0
KIN0
15h
10h
05h
00h
35h
30h
25h
20h
KIN1
16h
11h
06h
01h
36h
31h
26h
21h
KIN2
17h
12h
07h
02h
37h
32h
27h
22h
KIN3
18h
13h
08h
03h
38h
33h
28h
23h
KIN4
19h
14h
09h
04h
39h
34h
29h
24h
In Auto-Mode of Key-Scan function, if the key pressed over one second, then the RA8815 will cause
interrupt and change the data of register – KSDR to a long-press code. Therefore MPU knows which
key was pressed ove one second.
6-7 I/O Port
The RA8815 provide eight Igeneral purpose I/O pins. Each I/O pin is easy to setup as input or output.
They can use to drive LED, wakeup the RA8815 or provide information for whole system.
6-8 EL Signals
The RA8815 provide two special signals for EL driver circuit. The signals active time can also setup by
register ELCR. The waveform and application are show as Figure 6-28 and 6-29.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
≒ 700 us
≒ 700 us
EL_DCHG
EL_CHRG
≒3 us
≒24 us
≒24 us
≒3 us
Figure 6-28: Control Signals for EL Driver
L1=3MH
+3V 3
D1
1N4148
EL_CHRG
充電
EL_DCHG
放電
R1=2K
Q1
2SC1623
EL
R3
2K
Q2
2SC1623
R2 =2K
Figure 6-29: EL Driver Circuit
6-9 ASCII Block
0 1 2 3 4 5 6 7 8 9 A B C D E F
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Figure 6-30: Samll ASCII(Table 0)
The RA8815 built-in three ASCII block which contines ASCII and special symbol for user to show on
display directly in text mode. Actually these three ASCII block are store in 256Kbyte Font ROM(see
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Chapter 6-2). As the Figures 6-30~6-32, the left of each table is the High Nibble, and the right is the
Low Nibble. The selection of these block is by MD0 and MD1 of register MWMR.
The Figure 6-30 is the table of small ASCII. Each character size is 8x8 dots. Therefore if the LCD
panel size is 128Segx33Com then it can show four rows, and each row has 16 samll ASCII font. Figure
6-31 and 6-32 are the table of big ASCII. For the same panel size, it can show two row, and
each row has 16 character.
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 1 2 3 4 5 6 7 8 9 A B C D E F
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A
A
B
B
C
C
D
D
E
E
F
F
Figure 6-31: Big ASCII (Table 1)
Figure 6-32: Big ASCII (Table 2)
6-10 Power Control
The RA8815 supports Normal Mode and Sleep Mode for operation. If write “0” to bit0 of register PWRR,
then RA8815 will enter sleep mode. The functions of LCD display and driver will stop. All of the signals
of COM and SEG will keep low, Key Strobe signals will keep high, and I/O keep the original state.
Because the RC clock was stop, so the power consumption is very samll.
The RA8815 provide three way to wake up the system:
1. Write ”1” to the bit0 of register PWRR.
2. Key-scan to wake up
3. I/O wake up
In wake up phase, the RA8815 will wake up the RC oscillator first, and it will take around 250ms. Then
the RA8815 is enable to accept the command from MPU and LCD driver wake up for activity.
The VDD power operation range of RA8815 is 2.5~3.6V. But on the COG module, some power
consumption will lose on the connection of FPC and chip that due to the ITO layout issue. So normally
the VDD power range of COG module on the FPC side is around V2.7~3.8V.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
7. Display Functions
7-1 Text Mode
The RA8815 built-in a 256KB Font ROM that includung Traditional Chinese or Simpled Chinese,
English,Japaness, ASCII, Europen and Latin(Latin-ext A, Latin-ext B). In text mode, it supports full-size
font(Chinese or English) display or half-size(Dnglish) display. The full-size font is consist of 16x16 bit
map. And half-size is consist of 8x16 or 8x8. Refer to the following Figure 7-1:
16x16 Pixel
8x16 Pixel
8x8 Pixel
Figure 7-1: Full-Size and Half-Size Font
The Chinese display is operating at text mode. So if the RA8815 received two Chinese codes(BIG5 or
GB) then the mapped font will show on the cursor position. Because each Chinese code including two
bytes data, therefore the MPU has to send the code twice – High byte and Low byte. For English or
Numeric, only one byte is need. The maximum supports panel size of RA8815 is 128x33dots. So in text
mode it could show 2x8 Chinese fonts and 4x16 English fonts.
The register MWMR is used to setup the font size for display. The user can also select the different
display mode such as bold, inverse or normal mode in this register.
7-2 Graphic Mode
In the graphics mode, the RA8815 is fill the bit map data into display memory directly. So if the [MD1,
MD0] of register is set to ”00” (Graphics Mode), then write the data into memory, the data will show on
the screen that cursor pointed.
Figure 7-2: Graphics Mode Display
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
The display RAM size of RA8815 is 528Byte(128*33/8). Each memory bit is mapping to the LCD panel.
If the data is “1” then the mapped dot is turn on. Please refer the Figure 7-3.
Segment
D7 D6 D5 D4 D3 D2 D1 D0 1 1
1 0 0 1 1
0
1
2
3
4
5
6
7 …..
0
Display Data RAM
Display On LCD
Figure 7-3: Display Data Mapping to the Screen
The RA8815 also provide a clean feature to clear all of the display RAM. If the “MCLR” of register
PWRR is set to “1”, then all of contents of Display RAM will be clear to “0”. In the graphics mode, the
user could select the blinking or inverse through register BLTR. The blinking are is assigned by the
size of Scroll Window.
7-3 Cursor Setting
7-3-1 Cursor Position and Shift
The unit of Segment Address is 8-Bit, Commom is 1-Bit. For example, if user want to show a font
“制” on the third position(full-size) of top, then the register X-CUR has to set 04h and Y-CUR set to
00h. If the second row wan to show “器” as Figure 7-4, then the X-CUR set to 00h and Y-CUR set
to 10h.
Both of text mode and graphics mode, the cursor position are use the same resgidter - X-CUR and
Y-CUR. If fill data to display RAM or show a Chinese font on the screen, the cursor will auto
increase, and the boundry is the display window.
00 01
02 03
04 05 …..……………..........……………….............….....…........…. 0F
00
:
:
10
:
:
1F
128(Segment) x 32(Common)
Figure 7-4: An Example for Cursor Setting
7-3-2 Cursor Display and Blink
The RA8815 provide cursor On/Off and blinking features. These functions are control by register
CURCR. The cycle time of blinking is depend on the setting of register BLTR. The range is from 8
to 128 frames.
RAiO TECHNOLOGY INC.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
7-3-3 Cursor Height
The cursor height is also setting by register CURCR. For full-size mode the cursor height is
adjustable from 1 to16 pixels, and half size is form 1 to 8 pixels. Please refer to Figure 7-5.
1 Pixel
2 Pixel
3 Pixel
16 Pixel
Figure 7-5: Cursor Height
7-4 Display Window
Normally, the Display Window size is same as LCD panel. It’s setting by register SYSR. The
maximumnis range is 128(Segment)x32(Common). The RA8815 provide a extran Common(Com-S) as
the selection of Icon. Therefore the total 128 Icon for usage. Before access the Com-S, the register YCUR has set to 50h, then program the X-CUR to select Icon.
The RA8815 provides two positions for the panel layout of COM-S. It’s convenient for user to deisgn
the position of Icon fro their application. Refer to the Figure 7-6.
Icon
(Com S)
Common
(COM0~31)
…………………………
0
1
2
:
:
:
:
31
0 1 2 3 …………………………………………………………………………………………………………………………………127
Segment(SEG0~127)
Segment(SEG0~127)
0 1 2 3 …………………………………………………………………………………………………………………………………127
Common
(COM0~31)
Icon
(Com S)
0
1
2
:
:
:
:
31
…………………………
Figure 7-6: Display Window and Icon
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
7-5 Horizontal Scroll
The RA8815 provide Horizontal Scroll feature. User could assign the range of srolling, scroll unit and
speed. Refer to the following example as Figure 7-7. The scroll unit is set to 2 pixels.
Figure 7-7: Horizontal Scroll
The RA8815 allows horizontal scroll for right or left way. The user could use the scrolling buffer to show
the Shift funtion. For example, store the data or text on the Horizontal Scroll Buffer first, then fill the new
data/text into the buffer that after the screen shift 16pixels. You can repeat these action and find the
screen is shift like caption of advertisement. The Figure 7-8 is an example to show he Horizontal Shift.
The shift unit is 8pixels and the gray area is the scroll buffer. The displat data will not show on the
screen.
Please refer to application note for the related horizontal scroll feature.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Figure 7-8: Horizontal Shift
7-6 Vertical Scroll
The RAS8815 alos provides the Vertical Scroll and Shift features that like horizontal function. User could
assign the range of srolling, scroll unit and speed. Refer to the following example as Figure 7-9. The
vertical scroll unit is set to 2 pixels.
The RA8815 allows vertical scroll for up or down way. The user could use the scrolling buffer to show
the Shift funtion. For example, store the data or text on the Vertical Scroll Buffer first, then fill the new
data/text into the buffer that after the screen shift 16pixels. Please refer to application note for the
related vertical scroll features.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Figure 7-9: Vertical Scroll
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19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
COMS_A0
COMS_A1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PT1
Top View
(9065 x 1586)
PT3
PT4
PT5
Chip Size
Bump Size
Bump Pitch
Bump Height
RAiO TECHNOLOGY INC.
PT6
GND
68
VDD
69
RA
70
RB
71
DB7, SMOD1
72
DB6, SMOD0
73
DB5
74
DB4
75
DB3, CS
76
DB2, RS, SDI
77
DB1, SDA, SDO 78
DB0, SCL
79
RD, EN
80
WR, R/W
81
D/C, RS
82
CS
83
C86
84
BIT4
85
P/S
86
INT
87
EXT_CLK
88
CLK_SEL
89
KST3
90
KST2
91
KST1
92
KST0
93
KIN4
94
KIN3
95
KIN2
96
KIN1
97
KIN0
98
IO7
99
IO6
100
IO5
101
IO4
102
IO3
103
IO2
104
IO1
105
IO0
106
EL_CHRG
107
EL_DCHG
108
RST
109
TEST2
110
TEST1
111
TEST0
112
GND
113
GND
114
VDD
115
VDD
116
S0
116-1
116-2
FG
116-3
S1
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VREF
VREF
VREG
VREG
VREG
264
263
262
261
260
259
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
DUM_L
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
DUM_R
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
8. Pin Diagram
8-1 COG Pad
PT2
Y
PT13
Logo
PT13
RA8815
PT7
(0, 0)
P1
X
PT13: 199 to 200
44/63
PT8
PAD 1~18, PAD 117~134 (COM Pads)
PAD 19~116 (MCU/Power Pads)
PT9
PT1: PAD 1~18, PAD 117~134
57μm
PT2: PAD 135~143, 144~159, 160~175, 176~191,
64.8μm
PT3: PAD 19~32, PAD 33~42
57μm
PT4: PAD 32 to 33
63.3μm
PT5: PAD 42 to 43
84.2μm
PT6: PAD 43 to 67, PAD 68 to 70
100μm
PT7: PAD 67 to 68
500μm
PT8: PAD 70 to 112
80μm
PT9: PAD 112 to 116
60μm
PT10: PAD 116 to 116-1
63.2μm
PT11: PAD 116-1 to 116-3
55μm
PT10 PT11
P2
Figure 8-1:Pin Diagram
Table 8-1:Bump Size and Pitch
9065μm x 1586μm
74μm x 38μm
PAD 135~264 (SEG Pads),
38μm x 74μm
PAD 161-1 ~ 161-3 (S0, FG, S1)
192~199, 200~207, 208~223, 224~239, 240~255, 256~264
PT12: PAD 143 to 144, 159 to 160, 175 to 176, 191 to 192, 74.6μm
199 to 200, 207 to 208, 223 to 224, 239 to 240, 255 to 256
89μm
15±3μm
www.raio.com.tw
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COMS_B0
COMS_B1
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
G1
G2
G3
A
B
H
D
C
Al-pad
Bump
Passivation
N
J
K
L
Unit: um
Size
Symbol
A
54
B
30
C
66
D
90
E
27~70
F
57~100
E
G1/G2/G3
4/8/12
F
H
12
J
74
Bump
M
Al-Pad
K
38
L
15 ± 3
M
19~62
N
3~46
Figure 8-2:Gold Bump PAD Dimension
B
B
A
A
A
B
P1
C
B
A
B
P2
Unit: um
B
C
Symbol
Size and Coordinate
A
20
B
30
C
90
P1
(-66.1, -727.3)
P2
(4124.7, -727.3)
Figure 8-3:Fixed Point Dimension
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
8-2 Pad X/Y Coordinate
Pad No.
Pad Name
X
Y
Pad No.
Pad Name
X
Y
1
COMS_A0
-4437.9
491.3
36
GND
-3237.6
-698.3
2
COMS_A1
-4437.9
434.3
37
GND
-3180.6
-698.3
3
COM0
-4437.9
377.3
38
GND
-3123.6
-698.3
4
COM1
-4437.9
320.3
39
VDD
-3066.6
-698.3
5
COM2
-4437.9
263.3
40
VDD
-3009.6
-698.3
6
COM3
-4437.9
206.3
41
VDD
-2952.6
-698.3
7
COM4
-4437.9
149.3
42
VDDP
-2895.6
-698.3
8
COM5
-4437.9
92.3
43
V0
-2811.4
-698.3
9
COM6
-4437.9
35.3
44
V0
-2711.4
-698.3
10
COM7
-4437.9
-35.3
45
V0
-2611.4
-698.3
11
COM8
-4437.9
-92.3
46
V0
-2511.4
-698.3
12
COM9
-4437.9
-149.3
47
V1
-2411.4
-698.3
13
COM10
-4437.9
-206.3
48
V1
-2311.4
-698.3
14
COM11
-4437.9
-263.3
49
V1
-2211.4
-698.3
15
COM12
-4437.9
-320.3
50
V1
-2111.4
-698.3
16
COM13
-4437.9
-377.3
51
V2
-2011.4
-698.3
17
COM14
-4437.9
-434.3
52
V2
-1911.4
-698.3
18
COM15
-4437.9
-491.3
53
V2
-1811.4
-698.3
19
VLCD
-4212.9
-698.3
54
V2
-1711.4
-698.3
20
VLCD
-4155.9
-698.3
55
V3
-1611.4
-698.3
21
VLCD
-4098.9
-698.3
56
V3
-1511.4
-698.3
22
VLCD
-4041.9
-698.3
57
V3
-1411.4
-698.3
23
VLCD
-3984.9
-698.3
58
V3
-1311.4
-698.3
24
VLCD
-3927.9
-698.3
59
V4
-1211.4
-698.3
25
C2M
-3870.9
-698.3
60
V4
-1111.4
-698.3
26
C2M
-3813.9
-698.3
61
V4
-1011.4
-698.3
27
C2P
-3756.9
-698.3
62
V4
-911.4
-698.3
28
C2P
-3699.9
-698.3
63
VREF
-811.4
-698.3
29
C1M
-3642.9
-698.3
64
VREF
-711.4
-698.3
30
C1M
-3585.9
-698.3
65
VREG
-611.4
-698.3
31
C1P
-3528.9
-698.3
66
VREG
-511.4
-698.3
32
C1P
-3471.9
-698.3
67
VREG
-411.4
-698.3
33
GNDP
-3408.6
-698.3
68
GND
88.6
-698.3
34
GNDP
-3351.6
-698.3
69
VDD
188.6
-698.3
35
GND
-3294.6
-698.3
70
RA
288.6
-698.3
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Pad No.
Pad Name
X
Y
Pad No.
Pad Name
X
Y
71
RB
368.6
-698.3
108
EL_DCHG
3328.6
-698.3
72
DB7
448.6
-698.3
109
RST
3408.6
-698.3
73
DB6
528.6
-698.3
110
TEST2
3488.6
-698.3
74
DB5
608.6
-698.3
111
TEST1
3568.6
-698.3
75
DB4
688.6
-698.3
112
TEST0
3648.6
-698.3
76
DB3
768.6
-698.3
113
GND
3708.6
-698.3
77
DB2
848.6
-698.3
114
GND
3768.6
-698.3
78
DB1
928.6
-698.3
115
VDD
3828.6
-698.3
79
DB0
1008.6
-698.3
116
VDD
3888.6
-698.3
80
RD
1088.6
-698.3
116-1
S0
3951.8
-698.3
81
WR
1168.6
-698.3
116-2
FG
4006.8
-698.3
82
D/ C
1248.6
-698.3
116-3
S1
4061.8
-693.3
83
CS
1328.6
-698.3
117
COMS_B1
4437.9
-491.3
84
C86
1408.6
-698.3
118
COMS_B0
4437.9
-434.3
85
BIT4
1488.6
-698.3
119
COM31
4437.9
-377.3
86
P/ S
1568.6
-698.3
120
COM30
4437.9
-320.3
87
INT
1648.6
-698.3
121
COM29
4437.9
-263.3
88
EXT_CLK
1728.6
-698.3
122
COM28
4437.9
-206.3
89
CLK_SEL
1808.6
-698.3
123
COM27
4437.9
-149.3
90
KST3
1888.6
-698.3
124
COM26
4437.9
-92.3
91
KST2
1968.6
-698.3
125
COM25
4437.9
-35.3
92
KST1
2048.6
-698.3
126
COM24
4437.9
35.3
93
KST0
2128.6
-698.3
127
COM23
4437.9
92.3
94
KIN4
2208.6
-698.3
128
COM22
4437.9
149.3
95
KIN3
2288.6
-698.3
129
COM21
4437.9
206.3
96
KIN2
2368.6
-698.3
130
COM20
4437.9
263.3
97
KIN1
2448.6
-698.3
131
COM19
4437.9
320.3
98
KIN0
2528.6
-698.3
132
COM18
4437.9
377.3
99
IO7
2608.6
-698.3
133
COM17
4437.9
434.3
100
IO6
2688.6
-698.3
134
COM16
4437.9
491.3
101
IO5
2768.6
-698.3
135
DUM_R
4230.9
698.3
102
IO4
2848.6
-698.3
136
SEG127
4166.1
698.3
103
IO3
2928.6
-698.3
137
SEG126
4101.3
698.3
104
IO2
3008.6
-698.3
138
SEG125
4036.5
698.3
105
IO1
3088.6
-698.3
139
SEG124
3971.7
698.3
106
IO0
3168.6
-698.3
140
SEG123
3906.9
698.3
107
EL_CHRG
3248.6
-698.3
141
SEG122
3842.1
698.3
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Pad No.
Pad Name
X
Y
Pad No.
Pad Name
X
Y
142
SEG121
3777.3
698.3
179
SEG84
1350.3
698.3
143
SEG120
3712.5
698.3
180
SEG83
1285.5
698.3
144
SEG119
3637.9
698.3
181
SEG82
1220.7
698.3
145
SEG118
3573.1
698.3
182
SEG81
1155.9
698.3
146
SEG117
3508.3
698.3
183
SEG80
1091.1
698.3
147
SEG116
3443.5
698.3
184
SEG79
1026.3
698.3
148
SEG115
3378.7
698.3
185
SEG78
961.5
698.3
149
SEG114
3313.9
698.3
186
SEG77
896.7
698.3
150
SEG113
3249.1
698.3
187
SEG76
831.9
698.3
151
SEG112
3184.3
698.3
188
SEG75
767.1
698.3
152
SEG111
3119.5
698.3
189
SEG74
702.3
698.3
153
SEG110
3054.7
698.3
190
SEG73
637.5
698.3
154
SEG109
2989.9
698.3
191
SEG72
572.7
698.3
155
SEG108
2925.1
698.3
192
SEG71
498.1
698.3
156
SEG107
2860.3
698.3
193
SEG70
433.3
698.3
157
SEG106
2795.5
698.3
194
SEG69
368.5
698.3
158
SEG105
2730.7
698.3
195
SEG68
303.7
698.3
159
SEG104
2665.9
698.3
196
SEG67
238.9
698.3
160
SEG103
2591.3
698.3
197
SEG66
174.1
698.3
161
SEG102
2526.5
698.3
198
SEG65
109.3
698.3
162
SEG101
2461.7
698.3
199
SEG64
44.5
698.3
163
SEG100
2396.9
698.3
200
SEG63
-44.5
698.3
164
SEG99
2332.1
698.3
201
SEG62
-109.3
698.3
165
SEG98
2267.3
698.3
202
SEG61
-174.1
698.3
166
SEG97
2202.5
698.3
203
SEG60
-238.9
698.3
167
SEG96
2137.7
698.3
204
SEG59
-303.7
698.3
168
SEG95
2072.9
698.3
205
SEG58
-368.5
698.3
169
SEG94
2008.1
698.3
206
SEG57
-433.3
698.3
170
SEG93
1943.3
698.3
207
SEG56
-498.1
698.3
171
SEG92
1878.5
698.3
208
SEG55
-572.7
698.3
172
SEG91
1813.7
698.3
209
SEG54
-637.5
698.3
173
SEG90
1748.9
698.3
210
SEG53
-702.3
698.3
174
SEG89
1684.1
698.3
211
SEG52
-767.1
698.3
175
SEG88
1619.3
698.3
212
SEG51
-831.9
698.3
176
SEG87
1544.7
698.3
213
SEG50
-896.7
698.3
177
SEG86
1479.9
698.3
214
SEG49
-961.5
698.3
178
SEG85
1415.1
698.3
215
SEG48
-1026.3
698.3
RAiO TECHNOLOGY INC.
48/63
www.raio.com.tw
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Pad No.
Pad Name
X
Y
Pad No.
Pad Name
X
Y
216
SEG47
-1091.1
698.3
253
SEG10
-3508.3
698.3
217
SEG46
-1155.9
698.3
254
SEG9
-3573.1
698.3
218
SEG45
-1220.7
698.3
255
SEG8
-3637.9
698.3
219
SEG44
-1285.5
698.3
256
SEG7
-3712.5
698.3
220
SEG43
-1350.3
698.3
257
SEG6
-3777.3
698.3
221
SEG42
-1415.1
698.3
258
SEG5
-3842.1
698.3
222
SEG41
-1479.9
698.3
259
SEG4
-3906.9
698.3
223
SEG40
-1544.7
698.3
260
SEG3
-3971.7
698.3
224
SEG39
-1619.3
698.3
261
SEG2
-4036.5
698.3
225
SEG38
-1684.1
698.3
262
SEG1
-4101.3
698.3
226
SEG37
-1748.9
698.3
263
SEG0
-4166.1
698.3
227
SEG36
-1813.7
698.3
264
DUM_L
-4230.9
698.3
228
SEG35
-1878.5
698.3
229
SEG34
-1943.3
698.3
230
SEG33
-2008.1
698.3
231
SEG32
-2072.9
698.3
232
SEG31
-2137.7
698.3
233
SEG30
-2202.5
698.3
234
SEG29
-2267.3
698.3
235
SEG28
-2332.1
698.3
236
SEG27
-2396.9
698.3
237
SEG26
-2461.7
698.3
238
SEG25
-2526.5
698.3
239
SEG24
-2591.3
698.3
240
SEG23
-2665.9
698.3
241
SEG22
-2730.7
698.3
242
SEG21
-2795.5
698.3
243
SEG20
-2860.3
698.3
244
SEG19
-2925.1
698.3
245
SEG18
-2989.9
698.3
246
SEG17
-3054.7
698.3
247
SEG16
-3119.5
698.3
248
SEG15
-3184.3
698.3
249
SEG14
-3249.1
698.3
250
SEG13
-3313.9
698.3
251
SEG12
-3378.7
698.3
252
SEG11
-3443.5
698.3
RAiO TECHNOLOGY INC.
49/63
www.raio.com.tw
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
9. Electrical Characteristic
9-1 Absolute Maximum Ratings
Table 9-1
Parameter
Symbol
Rating
Unit
Supply Voltage Range
VDD
-0.3 to 6.5
V
Input Voltage Range
VIN
-0.3 to VDD+0.3
V
External VLCD Voltage Range
VLCD
-0.3 to 8.0
V
Operation Temperature Range
TOPR
-20 to 80
℃
Storage Temperature Range
TST
-45 to 125
℃
9-2 DC Characteristic
Table 9-2
Parameter
Symbol
Min.
Typ.
Max.
Unit
Operating Voltage
VDD
2.5
3.3
3.6
V
Bare Die
Operating Voltage
VDD
2.7
3.3
3.8
V
COG Module
VLCD Voltage
VLCD
--
5~7
7.8
V
Input High Voltage
VIH
0.8°VDD
--
VDD
V
Input Low Voltage
VIL
Gnd
--
0.2°VDD
V
Output High Voltage
VOH
0.8°VDD
--
VDD
V
Output Low Voltage
VOL
Gnd
--
0.2°VDD
V
Condition
Input Leakage Current
IIL
-1
--
+1
μA
VIN = VDD to VSS
Output Leakage Current
IOL
-3
--
+2
μA
VIN = VDD to VSS
--
56
--
--
55
--
--
47
--
VDD=2.4V, R = 270K
Oscillator Frequency
FCL
VDD=3.3V, R = 270K
KHz
VDD=3.0V, R = 270K
Standby Mode Current
(Normal Mode Current)
ISB
--
70
--
μA
No MPU I/F Access
VDD=3.3V, FCL = 55KHz
Segment=128,
Common=32
FRM = 60Hz
TA=25℃
Display Off Current
IDISPLAY
--
25
--
μA
The same as above
Sleep Mode Current
ISLEEP
--
0.2
0.5
μA
The same as above
VDD = 2.4 to 3.6V, Gnd = 0V, Ta = -20 to 80℃
RAiO TECHNOLOGY INC.
50/63
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
9-3 Timing Characteristic
9-3-1 Parallel Interface
tCSW6
RS, CS
tCYC6
R/W
tAC6
tWEN6
tRWH6
EN
tDS6
tDH6
DB[7:0]
(Write)
tOH6
DB[7:0]
(Read)
tOS6
Figure 9-1:6800 MPU Timing
6800 MPU Interface
Item
Address Setup Time
Read/Write Setup Time
Read/Write Hold Time
Signal
RS, CS
R/ W
Enable Access Time
Access Cycle Time
EN
Write Data Setup Time
Write Data Hold Time
Read Data Access Time
Read Data Hold Time
RAiO TECHNOLOGY INC.
DB[7:0]
Symbol
Rating
Condition
Unit
Min.
Max.
tCSW6
0
--
tWEN6
10
--
tRWH6
10
--
tAC6
90
--
Command Cycle
200
--
Data Cycle
400
--
tDS6
0
--
tDH6
10
--
tOS6
--
0
tOH6
10
--
tCYC6
51/63
ns
www.raio.com.tw
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
tCSW8
D/C, CS
tCYC8
tAC8
RD, WR
tCSH8
tDS8
DB[7:0]
(Write)
tDH8
tOS8
tOH8
DB[7:0]
(Read)
Figure 9-2:8080 MPU Timing
8080 MPU Interface
Item
Signal
Address Setup Time
Symbol
RS, CS
Address Hold Time
Read/Write Access Time
RD , WR
Access Cycle Time
Write Data Setup Time
Write Data Hold Time
DB[7:0]
Read Data Setup Time
Read Data Setup Time
Rating
Condition
Unit
Min.
Max.
TCSW8
10
--
TCSH8
10
--
tAC8
90
--
Command Cycle
200
--
Data Cycle
400
--
tDS6
0
--
tDH6
10
--
tOS6
--
0
tOH6
10
--
TCYC8
ns
9-3-2 Serial Interface
tCYC3
CS
tCSH3
SDA
RW
SCK
tDS3
tCKL3
RS(0)
R7 R6 ………………….. R0
D7 D6 …………………. D0
tDH3
tCKH3
Register No.
R/W DATA.
Figure 9-3:3-Wire Timing
RAiO TECHNOLOGY INC.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
3-Wire Serial Interface
Item
Signal
Access Time
CS
CS Setup Time
Clock Low Pulse Width
Clock High Pulse Width
Data Setup Time
SCK
SDA
Data Hold Time
Symbol
Rating
Condition
Unit
Min.
Max.
tCYC3
3.6
--
tCSH3
20
--
tCKL3
100
--
tCKH3
100
--
tDS3
20
--
tDH3
10
--
μs
ns
tCYC4A
CS
tCSH4
RS
0
SDA
Don’t Care
RW
tDS4
SCK
tCKL4
R7 R6 …………..…….. R0
D7 D6 ……….……………. D0
tDH4
tCKH4
Register No.
R/W DATA.
Figure 9-4:4-Wire(A-Type) Timing
4-Wire(A-Type) Serial Interface
Item
Signal
Access Time
CS Setup Time
Clock Low Pulse Width
Clock High Pulse Width
Data Setup Time
Data Hold Time
RAiO TECHNOLOGY INC.
CS
SCK
SDA, RS
Symbol
Rating
Condition
Unit
Min.
Max.
tCYC4A
3.4
--
tCSH4
20
--
tCKL4
100
--
tCKH4
100
--
tDS4
20
--
tDH4
10
--
53/63
μs
ns
www.raio.com.tw
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
tCYC4B
CS
tCSH4
SDI
RW
tDS4
SDO
RS(0)
R7 R6 ………………….. R0
WD7 WD6 ……………. WD0
tDH4
Don’t Care
RD7
RD6 …………..... RD0
tOS4B
SCK
tCKL4
tOH4B
Register No.
tCKH4
R/W DATA.
Figure 9-5:4-Wire(B Type) Timing
4-Wire(B-Type) Serial Interface
Item
Signal
Access Time
CS Setup Time
Clock Low Pulse Width
Clock High Pulse Width
Data Write Setup Time
Data Write Hold Time
Data Read Setup Time
Data Read Hold Time
CS
SCK
SDI
SDO
Symbol
Rating
Condition
Unit
Min.
Max.
tCYC4A
3.6
--
tCSH4
20
--
tCKL4
100
--
tCKH4
100
--
tDS4
20
--
tDH4
10
--
tOS4B
20
--
tOH4B
10
--
μs
ns
9-3-3 Reset Interface
tRST
RST
Internal
State
During Reset
Reset Complete
tRSTH
Figure 9-6: Reset Timing
RAiO TECHNOLOGY INC.
54/63
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RA8815
Preliminary Version 2.2
Item
Reset Pulse Width
Reset Complete Hold
Time
RAiO TECHNOLOGY INC.
128x33 Character/Graphic LCD Driver
Signal
Symbol
RST
tRST
RST
tRSTH
55/63
Condition
FCL= 55KHz
Rating
Unit
Min.
Max.
100
--
ms
150
250
ms
www.raio.com.tw
RAiO TECHNOLOGY INC.
17
68
GND
69
VDD
70
RA
71
RB
72
DB7, SMOD1
73
DB6, SMOD0
74
DB5
75
DB4
76
DB3, CS
77
DB2, RS, SDI
DB1, SDA, SDO 78
79
DB0, SCL
80
RD, EN
81
WR, R/W
82
D/C, RS
83
CS
84
C86
85
BIT4
86
P/S
87
INT
88
EXT_CLK
89
CLK_SEL
90
KST3
91
KST2
92
KST1
93
KST0
94
KIN4
95
KIN3
96
KIN2
97
KIN1
98
KIN0
99
IO7
100
IO6
101
IO5
102
IO4
103
IO3
104
IO2
105
IO1
106
IO0
107
EL_CHRG
108
EL_DCHG
109
RST
110
TEST2
111
TEST1
112
TEST0
113
GND
114
GND
115
VDD
116
VDD
116-1
S0
116-2
FG
116-3
S1
Top View
16
264
263
262
261
260
259
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
DUM_L
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
DUM_R
Icon
15
RA8815
14
13
12
11
10
9
8
7
6
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
4
3
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
COMS_A0
COMS_A1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
2
1
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VREF
VREF
VREG
VREG
VREG
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Appendix A.
A-1 COG Application
A-1-1 Basic Connection of Serial I/F
128x33
COG
RA8815
FPC
#N
#1
Figure A-1:COG Module
Y
(0, 0)
X
56/63
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COMS_B0
COMS_B1
Figure A-1b:Basic Connection of Serial I/F
www.raio.com.tw
RAiO TECHNOLOGY INC.
57/63
26
264
263
262
261
260
259
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
DUM_L
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
DUM_R
Preliminary Version 2.2
25
24
23
22
21
20
19
GND
68
VDD
69
70
RA
71
RB
72
DB7, SMOD1
73
DB6, SMOD0
74
DB5
75
DB4
76
DB3, CS
DB2, RS, SDI
77
DB1, SDA, SDO 78
79
DB0, SCL
80
RD, EN
81
WR, R/W
82
D/C, RS
83
CS
84
C86
85
BIT4
P/S
86
INT
87
88
EXT_CLK
89
CLK_SEL
90
KST3
91
KST2
92
KST1
93
KST0
94
KIN4
KIN3
95
KIN2
96
97
KIN1
98
KIN0
99
IO7
100
IO6
101
IO5
102
IO4
103
IO3
104
IO2
IO1
105
IO0
106
107
EL_CHRG
108
EL_DCHG
109
RST
110
TEST2
111
TEST1
112
TEST0
113
GND
GND
114
VDD
115
116
VDD
116-1
S0
116-2
FG
116-3
S1
(0, 0)
18
17
16
Top View
15
RA8815
14
13
12
11
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9
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5
1
2
3
4
5
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4
3
19
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52
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54
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59
60
61
62
63
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65
66
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COMS_A0
COMS_A1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
2
1
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VREF
VREF
VREG
VREG
VREG
RA8815
128x33 Character/Graphic LCD Driver
The RA8815 provide many interfaces for MPU that including parallel, 3-Wire serial and 4-Wire
serial, and some useful I/O interface like I/O and Key-scan. Therefore there are many options for
user to connect the COG die to FPC. The Figure A-1b is the basic connection of serial mode in
COG module. If the MPC interface is serial mode, then these signals are necessary for FPC.
A-1-2 Basic Connection of Parallel I/F
Y
X
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COMS_B0
COMS_B1
Figure A-1c:Basic Connection of Parallel I/F
The figure A-1c is the basic connection of parallel mode in COG module. If the MPC interface is
parallel mode, then these signals are necessary for FPC.
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RAiO TECHNOLOGY INC.
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154
153
152
151
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149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
DUM_L
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
DUM_R
Preliminary Version 2.2
37
36
35
34
33
32
31
68
GND
69
VDD
70
RA
71
RB
72
DB7, SMOD1
73
DB6, SMOD0
74
DB5
75
DB4
76
DB3, CS
77
DB2, RS, SDI
DB1, SDA, SDO 78
79
DB0, SCL
80
RD, EN
81
WR, R/W
82
D/C, RS
83
CS
84
C86
85
BIT4
86
P/S
87
INT
88
EXT_CLK
89
CLK_SEL
90
KST3
91
KST2
92
KST1
93
KST0
94
KIN4
95
KIN3
96
KIN2
97
KIN1
98
KIN0
99
IO7
100
IO6
101
IO5
102
IO4
103
IO3
104
IO2
105
IO1
106
IO0
107
EL_CHRG
108
EL_DCHG
109
RST
110
TEST2
111
TEST1
112
TEST0
113
GND
114
GND
115
VDD
116
VDD
116-1
S0
116-2
FG
116-3
S1
(0, 0)
30
29
28
Top View
27
RA8815
26
25
24
23
22
21
20
19
18
17
19
20
21
22
23
24
25
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28
29
30
31
32
33
34
35
36
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42
43
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45
46
47
48
49
50
51
52
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54
55
56
57
58
59
60
61
62
63
64
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66
67
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
16
15
14
13
12
11
10
9
8
7
6
5
4
3
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VREF
VREF
VREG
VREG
VREG
COMS_A0
COMS_A1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
2
1
RA8815
128x33 Character/Graphic LCD Driver
A-1-3 FPC Connection for Other Functions
Y
X
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COMS_B
COMS_B
Figure A-2:Example(A) of FPC Connection
As previous mention, the RA8815 provides many interfaces for MPU that including parallel, 3-Wire serial
and 4-Wire serial, and some useful I/O interface like I/O and Key-scan. The Figure A-2 is an example for
RA8815 COG die that connect all of the signals to FPC.
The RA8815 also provides two common outputs for Icon that let the panel layout easier to meet their
application.
The Figure A-3 is a simple example that use serial 3-Wires, 2 times VDD, internal RC oscillator and
interrupt signal. Therefore only 18pins used. But in this case, some signals(P/ S 、CLK_SEL、EXT_CLK)
have to connect to VDD or GND directly through ITO resistance. If the system wants to use another
features such as Key-scan, then the user have to connect the KIN[4:0] and KST[3:0] to FPC.
The pad number 68, 69, 113, 114, 115, 116 are VDD or GND. Their purposes are used to pull-up or pulldown for some signals on panel. They do not need to connect to FPC.
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RAiO TECHNOLOGY INC.
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18
17
16
15
68
GND
69
VDD
70
RA
71
RB
72
DB7, SMOD1
73
DB6, SMOD0
74
DB5
75
DB4
76
DB3, CS
77
DB2, RS, SDI
DB1, SDA, SDO 78
79
DB0, SCL
80
RD, EN
81
WR, R/W
82
D/C, RS
83
CS
84
C86
85
BIT4
86
P/S
87
INT
88
EXT_CLK
89
CLK_SEL
90
KST3
91
KST2
92
KST1
93
KST0
94
KIN4
95
KIN3
96
KIN2
97
KIN1
98
KIN0
99
IO7
100
IO6
101
IO5
102
IO4
103
IO3
104
IO2
105
IO1
106
IO0
107
EL_CHRG
108
EL_DCHG
109
RST
110
TEST2
111
TEST1
112
TEST0
113
GND
114
GND
115
VDD
116
VDD
116-1
S0
116-2
FG
116-3
S1
(0, 0)
14
13
12
Top View
11
RA8815
10
9
8
7
6
5
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
3
19
20
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37
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47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
COMS_A0
COMS_A1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
2
1
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VREF
VREF
VREG
VREG
VREG
264
263
262
261
260
259
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
DUM_L
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
DUM_R
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
Y
X
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COMS_B0
COMS_B1
Figure A-3:Example(B) of COG Module
The Figure A-4 is another example that uses 8080/8bit MPU, 2-times VDD, internal RC Oscillator, EL
driver and interrupt signal. In this case, the FPC only uses 29pins. Some configure pin are connect to VDD
or GND through ITO resistance, such as C86, BIT4, P/ S , CLK_SEL and EXT_CLK.
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RAiO TECHNOLOGY INC.
60/63
29
28
27
26
264
263
262
261
260
259
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
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199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
DUM_L
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
DUM_R
Preliminary Version 2.2
25
24
23
22
21
20
19
68
GND
69
VDD
70
RA
71
RB
72
DB7, SMOD1
73
DB6, SMOD0
74
DB5
75
DB4
76
DB3, CS
77
DB2, RS, SDI
DB1, SDA, SDO 78
79
DB0, SCL
80
RD, EN
81
WR, R/W
82
D/C, RS
83
CS
84
C86
85
BIT4
86
P/S
87
INT
88
EXT_CLK
89
CLK_SEL
90
KST3
91
KST2
92
KST1
93
KST0
94
KIN4
95
KIN3
96
KIN2
97
KIN1
98
KIN0
99
IO7
100
IO6
101
IO5
102
IO4
103
IO3
104
IO2
105
IO1
106
IO0
107
EL_CHRG
108
EL_DCHG
109
RST
110
TEST2
111
TEST1
112
TEST0
113
GND
114
GND
115
VDD
116
VDD
116-1
S0
116-2
FG
116-3
S1
(0, 0)
18
17
16
Top View
15
RA8815
14
13
12
11
10
9
8
7
6
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
4
3
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
COMS_A0
COMS_A1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
2
1
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VREF
VREF
VREG
VREG
VREG
RA8815
128x33 Character/Graphic LCD Driver
Y
X
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COMS_B0
COMS_B1
Figure A-4:Example(C) of COG Module
The Figure A-5 is an example for RA8815 to connect the driver signals(COM/SEG) to LCD panel. In this
case, the panel size is 128x32. If the Common of panel is less than 32, then care for the selection of
Common. Because RA8815 supports text mode, so the user cannot separate the common willfully and
connect them to panel.
Please note the COG is reverse and stamp on the glass, so the point of COM0/SEG0 is on the right-bottom
corner. Refer to Figure A-5.
www.raio.com.tw
RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
128 x 32
Icon
COM31
:
:
:
:
:
COM16
COM15
:
:
:
:
:
:
COM0
SEG127
………………………………………………………………
SEG0
..………………….
COM16
:
COM31 :
COM0
RA8815
:
:
(Back View)
COM15
COMS
Figure A-5: The Connection of RA8815 with LCD Panel(128x32)
96 X 24
COM23
:
:
:
COM16
COM15
:
:
:
:
:
:
COM0
SEG95
………………………………………………………………
SEG0
…………….
COM16
:
COM23
RA8815
(Back View)
COM0
:
:
COM15
Figure A-6: The Connection of RA8815 with LCD Panel(96x24)
The Figure A-6 is an example of connection that use 96x24 panel. In this case, it supports one row for full
size(16x16) and half-size(8x8) font. Or three rows for half-size(8x8) fonts. If the application of user is on
graphics mode, then separate the common signal for same number and each size is 13 common signals.
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
A-2 ITO
Table A-1: ITO Resistance of COG
PAD Name
ITO(Ohm)
PAD Name
ITO(Ohm)
PAD Name
ITO(Ohm)
VDD , VDDP
150
C2P
200
P/ S
600
GND , GNDP
150
C2M
200
CLK_SEL
600
VREF
200
RA
200
EXT_CLK
600
VLCD
200
RB
200
KST[3..0]
600
VREG
200
DB[7:0]
600
KIN[4..0]
600
V4
200
RD , EN
600
IO[7:0]
600
V3
200
WR , R/ W
600
EL_CHRG
600
V2
200
D/ C , RS
600
EL_DCHG
600
V1
200
CS
600
RST
600
V0
200
INT
600
TEST[2..0]
600
C1P
200
C86
600
C1M
200
BIT4
600
ITO Layout
C1P
C1P
C2P
C1M
C1M
C2M
C2P
VLCD
VLCD
C2M
VLCD
VLCD
VLCD
VLCD
Chip PAD
FPC PAD
Figure A-7:ITO Layout Example - VLCD(2*VDD)
The RA8815 power signals (such as VDD, GND, VLCD, V[4:0], C1P, C1M) have to keep the smaller
ITO resistance for panel layout. So the wires of layout need to keep as thick as possible to reduce the
ITO resistance. The Figure A-7 is an example for VLCD layout of panel. Because the RA8815 provide
six pads for VLCD, therefore the layout engineer has to connect all of these pads to FPC. In this case,
the VLCD is two times of VDD, so the C2P have to connect to VLCD and do not forget keep the wire
thicker.
The Figure A-8 is a layout example of RA8815 to FPC on COG module. The VDD and GND of RA8815
should as close as possible to FPC. The RA8815 provide six GND pad, user have to connect these six
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RA8815
Preliminary Version 2.2
128x33 Character/Graphic LCD Driver
C1M
C1M
C1P
C1P
GNDP
GNDP
GND
GND
GND
GND
VDD
VDD
VDD
VDDP
V0
V0
V0
V0
V1
V1
V1
V1
V2
V2
V2
V2
V3
V3
V3
V3
V4
V4
V4
V4
VLCD
VLCD
VLCD
VLCD
VLCD
VLCD
C2M
C2M
C2P
C2P
pad to FPC with a thick wire. For the design of FPC, the related power signals(VDD, GND, VLCD) of
layout need to keep as thick as possible to reduce the wire resistance. And the VDD, GND pad of FPC
keep double width than other signals.
Chip Pad
ITO Layout
FPC Pad
Figure A-8:ITO Layout Example
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