SM55J Series 3.3 V CMOS Clock Oscillators December 2013 • Pletronics’ SM55J Series is a quartz crystal controlled precision square wave generator with a CMOS output. • The package is designed for high density surface mount designs. • This is a low cost mass produced oscillator. • Tape and Reel or cut tape packaging is available. • • • • 40 to 170 MHz 3.2 x 5 mm LCC Ceramic Package Enable/Disable Function Disable function includes low standby power mode • 3rd Overtone Crystals used • Low Jitter PRELIMINARY Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2011/65/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 0.064 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter Unit VCC Supply Voltage -0.3V to +4.0V Vi Input Voltage -0.3V to VCC + 0.3V Vo Output Voltage -0.3V to VCC + 0.3V Io Output Current +20 mA to -20 mA Thermal Characteristics The maximum die or junction temperature is 125oC The thermal resistance junction to board is 30 to 50oC/Watt depending on the solder pads, ground plane and construction of the PCB. Product information is current as of publication date. The product conforms Inc. to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters. Copyright © 2010 Pletronics SM55J Series 3.3 V CMOS Clock Oscillators December 2013 Part Number: SM55 45 J E V - 75.0M -XX Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Frequency in MHz Supply Voltage VCC V = 3.3V _ + 10% Optional Enhanced OTR Blank = Temp. range -10 to +70oC C = Temp. range -20 to +70oC E = Temp. range -40 to +85oC Series Model Frequency Stability 45 = _ + 50 ppm 44 = _ + 25 ppm 20 = _ + 20 ppm Series Model Part Marking and Legend: P ff.fff M C YMDxx P ff.fff M C YYWWxx PLE SM55 ff.fff M C YMDxx P5xYWWx C ff.fff M 5xYWWxx ff.fff M C PLExx PLE = Pletronics FF.FFF M = Frequency in MHz YYWW or YWW or YMD = Date of Manufacture (year and week, or year-month-day) All other marking is internal factory codes Specifications such as frequency stability, supply voltage and operating temperature range, etc. are not identified from the marking. External packaging labels and packing list will correctly identify the ordered Pletronics part number. Codes for Date Code YMD Code 10 Code A 1 2 3 4 B C D E F G H J K L M Year 2010 2011 2012 2013 2014 Month JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC Code Day Code Day 1 1 H 17 2 2 J 18 www.pletronics.com 3 3 K 19 4 4 L 20 5 5 M 21 6 6 N 22 425-776-1880 7 7 P 23 8 8 R 24 9 9 T 25 A 10 U 26 B 11 V 27 C 12 W 28 D 13 X 29 E 14 Y 30 F 15 Z 31 2 G 16 SM55J Series 3.3 V CMOS Clock Oscillators December 2013 Electrical Specification for 3.30V + _ 10% over the specified temperature range Item Min Max Unit 40 170 MHz “45" -50 +50 ppm “44" -25 +25 “20" -20 +20 Frequency Range Frequency Accuracy Output Waveform Typ Condition For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures CMOS Output High Level VCC-0.4 - V Output Low Level - 0.4 V Output Symmetry 45 55 % Phase Noise at 50% point of VCC (See load circuit) at 25 oC, 125 MHz typical 10 Hz - -78 - dBc/Hz 100 Hz - -107 - dBc/Hz 1 kHz - -132 - dBc/Hz 10 kHz - -144 - dBc/Hz 100 kHz - -151 - dBc/Hz 1 MHz - -155 - dBc/Hz 10 MHz - -158 - dBc/Hz 30 - Kohm V disable - 30 % V enable 70 - % -10 +10 uA -10 +10 uA Standby Current ICC - 10 uA Disable time - 200 nS Time for output to reach a high Z state Start up time - 10 mS Time for output to reach specified frequency -10 +70 o C Standard Temperature Range -20 +70 o C Extended Temperature Range “C” -40 +85 o C Extended Temperature Range “E” Storage Temperature Range -55 +125 o C Output Load Capacitance (Cl) - 15 Enable/Disable Internal Pull-up Output leakage VOUT = VCC VOUT = 0V Operating Temperature Range to VCC of VCC applied to pad 1 Pad 1 low, device disabled pF A 0.01 nF or larger capacitor mounted proximal to the device between Vcc and Vss is required. www.pletronics.com 425-776-1880 3 SM55J Series 3.3 V CMOS Clock Oscillators December 2013 Electrical Specification for 3.30V + _ 10% over the specified temperature range Item Min Typ Max Unit Condition Output TRISE and TFALL - 1.0 2.0 nS VCC Supply Current (ICC) - 3.5 7.0 mA 50 MHz - 4.0 8.0 mA 65 MHz - 4.5 9.0 mA 85 MHz - 5.5 10.5 mA 100 MHz - 7.0 13.5 mA 133 MHz - 10.5 21.0 mA 170 MHz CLOAD = 15 pF 10% to 90% of VCC See Load Circuit no load Specifications with Pad 1 E/D open circuit www.pletronics.com 425-776-1880 4 SM55J Series 3.3 V CMOS Clock Oscillators December 2013 Load Circuit and Test Waveform Symmetry Vhigh 90% * Vcc 50% * Vcc 10% * Vcc Vlow Ground Trise Tfall Reliability: Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002, Condition B Vibration MIL-STD-883 Method 2007, Condition A Solderability MIL-STD-883 Method 2003 Thermal Shock MIL-STD-883 Method 1011, Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII www.pletronics.com Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial 425-776-1880 5 SM55J Series 3.3 V CMOS Clock Oscillators December 2013 Mechanical: Inches A 0.197 + _ 0.006 5.00 + _ 0.15 B 0.126 + _ 0.006 3.20 + _ 0.15 C Not to Scale 1 Typical dimensions mm 0.045 + _ 0.004 1.15 + _ 0.10 1 D 0.048 1.23 E1 0.100 2.54 F1 0.004 0.10 G1 0.050 1.27 1 H 0.055 1.40 I1 0.024 0.60 J1 0.004 0.10R K1 0.008 0.020R Contacts : Gold 11.8 to 39.4 µinches (0.3 to 1.0 µm) over Nickel 50 to 350 µinches (1.27 to 8.89 µm) Pad Function Note 1 Output Enable/Disable When this pad is not connected the oscillator shall operate. When this pad is logic low the output will be inhibited (high impedance state.) Recommend connecting this pad to VCC if the oscillator is to be always on. 2 Ground (GND) 3 Output 4 Supply Voltage (VCC) Recommend connecting appropriate power supply bypass capacitors as close as possible. Layout and application information For Optimum Jitter Performance, Pletronics recommends: • a ground plane under the device • no large transient signals (both current and voltage) should be routed under the device • do not layout near a large magnetic field such as a high frequency switching power supply • do not place near piezoelectric buzzers or mechanical fans. www.pletronics.com 425-776-1880 6 SM55J Series 3.3 V CMOS Clock Oscillators December 2013 Temperature (°C) Reflow Cycle (typical for lead free processing) 260°C Maximum 10 Seconds Maximum 250 215°C±10°C 200 175°C±10°C 150 100 Approximately 50 Seconds 120 to 160 Seconds Allowed rate of temperature change Maximum 4°C per second The part may be reflowed 3 times without degradation. Tape and Reel: available for quantities of 250 to 1000 per reel, cut tape for < 250 Constant Dimensions Table 1 Tape Size D0 8mm D1 Min E1 P0 1.0 12mm 1.5 16mm +0.1 -0.0 24mm P2 S1 Min T Max 0.6 0.6 T1 Max 2.0 _ +0.05 1.5 1.75 4.0 1.5 _ +0.1 _ +0.1 0.1 2.0 _ +0.1 1.5 Variable Dimensions Table 2 Tape Size B1 Max E2 Min F P1 T2 Max W Max Ao, Bo & Ko 16 mm 12.1 14.25 7.5 _ +0.1 8.0 _ +0.1 8.0 16.3 Note 1 Note 1: Embossed cavity to conform to EIA-481-B Dimensions in mm Not to scale REEL DIMENSIONS A B inches 7.0 10.0 13.0 mm 177.8 254.0 330.2 inches 2.50 4.00 3.75 mm 63.5 101.6 95.3 Tape Width 16.4 +2.0 -0.0 16.0 C mm D mm 13.0 +0.5 / -0.2 16.4 +2.0 -0.0 16.4 +2.0 -0.0 Reel dimensions may vary from the above www.pletronics.com 425-776-1880 7 SM55J Series 3.3 V CMOS Clock Oscillators December 2013 IMPORTANT NOTICE Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and other changes to this product at anytime. PLE reserves the right to discontinue any product or service without notice. Customers are responsible for obtaining the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to PLE’s terms and conditions of sale supplied at the time of order acknowledgment. PLE warrants performance of this product to the specifications applicable at the time of sale in accordance with PLE’s limited warranty. Testing and other quality control techniques are used to the extent PLE deems necessary to support this warranty. Except where mandated by specific contractual documents, testing of all parameters of each product is not necessarily performed. PLE assumes no liability for application assistance or customer product design. Customers are responsible for their products and applications using PLE components. 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Resale of PLE products or services with statements different from or beyond the parameters stated by PLE for that product or service voids all express and implied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statements. Contacting Pletronics Inc. Pletronics Inc. 19013 36th Ave. West Lynnwood, WA 98036-5761 USA Tel: 425-776-1880 Fax: 425-776-2760 E-mail: [email protected] URL: www.pletronics.com Copyright © 2010, Pletronics Inc. www.pletronics.com 425-776-1880 8