HD74AC182 Carry Lookahead Generator REJ03D0258–0200Z (Previous ADE-205-378 (Z)) Rev.2.00 Jul.16.2004 Description The HD74AC182 is a high-speed carry lookahead generator. It is generally used with the HD74AC181 or HD74AC381 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits. Features • Outputs Source/Sink 24 mA • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC182FPEL SOP-16 pin (JEITA) FP-16DAV FP EL (2,000 pcs/reel) HD74AC182RPEL SOP-16 pin (JEDEC) FP-16DNV RP EL (2,500 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement G1 1 16 VCC P1 2 15 P2 G0 3 14 G2 P0 4 13 Cn G3 5 12 Cn+X P3 6 11 Cn+y 10 G P 7 GND 8 9 Cn+z (Top view) Rev.2.00, Jul.16.2004, page 1 of 6 HD74AC182 Logic Symbol P0 G0 P1 G1 P2 G2 P3 G3 G Cn P Cn+x Cn+y Cn+z Pin Names Cn G0, G2 G1 G3 P0, P1 P2 P3 Cn + x to Cn + z G P Carry Input Carry Generate Inputs (Active Low) Carry Generate Input (Active Low) Carry Generate Input (Active Low) Carry Propagate Inputs (Active Low) Carry Propagate Input (Active Low) Carry Propagate Input (Active Low) Carry Outputs Carry Generate Output (Active Low) Carry Propagate Output (Active Low) Logic Diagram Cn G0 P0 G1 P1 Cn+x G2 P2 Cn+y G3 P3 Cn+z G P Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Functional Description The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry Propagate (P0 to P3) and Carry Generate (G0 to G3) signals and an Active High Carry input (Cn) and provides anticipated Active High carries (Cn + x, Cn + y , Cn + z) across four groups of binary adders. The HD74AC182/HD74ACT182 also has Active Low Carry Propagate (P) and Carry Generate (G) outputs which may be used for further level of lookahead. The logic equations provided at the outputs are: Rev.2.00, Jul.16.2004, page 2 of 6 HD74AC182 Cn + x = G0 + P0Cn Cn + y = G1 + P1G0 + P1P0Cn Cn + z = G2 + P2G1 + P2P1G0 + P2P1P0Cn G = G3 + P3G2 + P3P2G1 + P3P2P1G0 P = P3P2P1P0 Also, the HD74AC182/HD74ACT182 can be used with binary ALUs in an active Low or active High input operand mode. The connections (Figure a) to and from the ALU to the carry lookahead generator are identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about the same speed. A 28-bit ALU is formed by dropping the last HD74AC182/HD74ACT182. Truth Table Inputs G0 Cn P0 G1 Outputs P1 G2 P2 G3 P3 Cn + x Cn + y G Cn + z P X H H L L X H L X X L H H X X X L X H H L X L H H H X H H X X L L X X X L X X L X X L H H H X X X L X X X L X H H H L X X X H X H H H H X H H X X L L L X H X X X H X X X H L X X L H X X X L X X L X X L X X L L H H H X X L X X L X X X L X H H H H X X X H X H H H H X H H X X H H H X H X X X H X X X H L X X H L X X X L X X L X X L X X L L L L L X X L X X L X L H L X X X H X X H X X H H X L X L X L H L H L H : L : X : H High Voltage Level Low Voltage Level Immaterial Rev.2.00, Jul.16.2004, page 3 of 6 H HD74AC182 Absolute Maximum Ratings Item Symbol Ratings Unit Condition Supply voltage DC input diode current VCC IIK –0.5 to 7 –20 V mA VI 20 –0.5 to Vcc+0.5 mA V VI = Vcc+0.5V DC input voltage DC output diode current IOK –50 50 mA mA VO = –0.5V VO = Vcc+0.5V DC output voltage DC output source or sink current VO IO –0.5 to Vcc+0.5 ±50 V mA DC VCC or ground current per output pin Storage temperature ICC, IGND Tstg ±50 –65 to +150 mA °C VI = –0.5V Recommended Operating Conditions Item Symbol Ratings Unit Supply voltage Input and output voltage VCC VI, VO 2 to 6 0 to VCC V V Operating temperature Input rise and fall time (except Schmitt inputs) VIN 30% to 70% VCC Ta tr, tf –40 to +85 8 °C ns/V Condition VCC = 3.0V VCC = 4.5 V VCC = 5.5 V DC Characteristics Item Input Voltage Symbol Unit Condition min. 2.1 typ. 1.5 max. — min. 2.1 max. — 4.5 5.5 3.15 3.85 2.25 2.75 — — 3.15 3.85 — — 3.0 4.5 — — 1.50 2.25 0.9 1.35 — — 0.9 1.35 5.5 3.0 — 2.9 2.75 2.99 1.65 — — 2.9 1.65 — 4.5 5.5 4.4 5.4 4.49 5.49 — — 4.4 5.4 — — 3.0 4.5 2.58 3.94 — — — — 2.48 3.80 — — 5.5 3.0 4.94 — — 0.002 — 0.1 4.80 — — 0.1 4.5 5.5 — — 0.001 0.001 0.1 0.1 — — 0.1 0.1 3.0 4.5 — — — — 0.32 0.32 — — 0.37 0.37 IIN 5.5 5.5 — — — — 0.32 ±0.1 — — 0.37 ±1.0 µA VIN = VCC or GND IOLD IOHD 5.5 5.5 — — — — — — 86 –75 — — mA mA VOLD = 1.1 V VOHD = 3.85 V — 80 µA VIN = VCC or ground VOH VOL Input leakage current Dynamic output current* Ta = –40 to +85°°C 3.0 VIH VIL Output voltage Ta = 25°°C Vcc (V) Quiescent supply 5.5 — — 8.0 ICC current *Maximum test duration 2.0 ms, one output loaded at a time. Rev.2.00, Jul.16.2004, page 4 of 6 V VOUT = 0.1 V or VCC –0.1 V VOUT = 0.1 V or VCC –0.1 V V VIN = VIL or VIH IOUT = –50 µA VIN = VIL or VIH IOH = –12 mA IOH = –24 mA IOH = –24 mA VIN = VIL or VIH IOUT = 50 µA VIN = VIL or VIH IOL = 12 mA IOL = 24 mA IOL = 24 mA HD74AC182 AC Characteristics Ta = +25°C CL = 50 pF Item Propagation delay Pn to P Propagation delay Pn to P Propagation delay Ta = –40°C to +85°C CL = 50 pF tPLH VCC (V)*1 Min 3.3 1.0 Typ 8.0 Max 10.5 1.0 Max 11.5 ns tPHL 5.0 3.3 1.0 1.0 5.5 8.0 8.0 10.5 1.0 1.0 9.0 11.5 ns 1.0 1.0 5.5 9.5 8.0 12.0 1.0 1.0 9.0 13.0 ns Symbol Min Unit tPLH 5.0 3.3 Cn to Cn + x, y, z Propagation delay tPHL 5.0 3.3 1.0 1.0 7.5 9.0 10.0 12.0 1.0 1.0 11.0 13.0 ns Cn to Cn + x, y, z Propagation delay tPLH 5.0 3.3 1.0 1.0 7.0 10.5 10.0 13.0 1.0 1.0 11.0 14.0 ns Pn or Gn to Cn + x, y, z Propagation delay tPHL 5.0 3.3 1.0 1.0 8.0 11.5 10.5 14.0 1.0 1.0 11.5 15.5 ns 5.0 1.0 9.0 11.5 1.0 12.5 Pn or Gn to Cn + x, y, z Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Capacitance Item Input capacitance Power dissipation capacitance Rev.2.00, Jul.16.2004, page 5 of 6 Symbol CIN CPD Typ 4.5 50.0 Unit pF pF Condition VCC = 5.5 V VCC = 5.0 V HD74AC182 Package Dimensions As of January, 2003 Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.40 ± 0.06 0.20 7.80 +– 0.30 1.15 0 ˚ – 8˚ 0.10 ± 0.10 0.80 Max *0.20 ± 0.05 2.20 Max 5.5 16 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) *Ni/Pd/Au plating FP-16DAV — Conforms 0.24 g As of January, 2003 Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.40 ± 0.06 0.15 *0.20 ± 0.05 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0˚ – 8˚ + 0.67 0.60 – 0.20 0.25 M *Ni/Pd/Au plating Rev.2.00, Jul.16.2004, page 6 of 6 Package Code JEDEC JEITA Mass (reference value) FP-16DNV Conforms Conforms 0.15 g Sales Strategic Planning Div. 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